Lines Matching refs:hardware

28 to receive data from the hardware. A "full" descriptor has data in it,
36 ring is handed off to the hardware, which sequentially fills in the
41 and "tail" pointers, managed by the OS, and a hardware current
43 currently being filled. When this descr is filled, the hardware
46 and everything in front of it should be "empty".  If the hardware
50 The tail pointer tails or trails the hardware pointer. When the
51 hardware is ahead, the tail pointer will be pointing at a "full"
56 flowing, then the tail pointer can catch up to the hardware pointer.
64 dma-mapping it so as to make it visible to the hardware. The OS will
91 In the above, the hardware has filled in one descr, number 20. Both
115 the hardware can fill them, there is no problem. If, for some reason,
116 the OS fails to empty the RX ring fast enough, the hardware GDACTDPA
127 In particular, it will clear the descriptor on which the hardware had
128 stopped. However, once the hardware has decided that a certain
133 this descr to be filled. However, the hardware has skipped this descr,
136 while the hardware is waiting for a different set of descrs to become
162 Since its already full, the hardware can do nothing more, and thus has
167 to do, and the hardware has nowhere to put incoming data.
172 the hardware has skipped a descr or two (sometimes dozens under heavy
191 in the ring. The hardware can empty the ring about four times per jiffy,
199 interrupts, as the hardware can empty the queue faster than the kernel