Lines Matching refs:STORE
124 STORE A=3, STORE B=4, y=LOAD A->3, x=LOAD B->4
125 STORE A=3, STORE B=4, x=LOAD B->4, y=LOAD A->3
126 STORE A=3, y=LOAD A->3, STORE B=4, x=LOAD B->4
127 STORE A=3, y=LOAD A->3, x=LOAD B->2, STORE B=4
128 STORE A=3, x=LOAD B->2, STORE B=4, y=LOAD A->3
129 STORE A=3, x=LOAD B->2, y=LOAD A->3, STORE B=4
130 STORE B=4, STORE A=3, y=LOAD A->3, x=LOAD B->4
131 STORE B=4, ...
182 STORE *A = 5, x = LOAD *D
183 x = LOAD *D, STORE *A = 5
216 a = LOAD *X, STORE *X = b
224 STORE *X = c, d = LOAD *X
244 X = LOAD *A, Y = LOAD *B, STORE *D = Z
245 X = LOAD *A, STORE *D = Z, Y = LOAD *B
246 Y = LOAD *B, X = LOAD *A, STORE *D = Z
247 Y = LOAD *B, STORE *D = Z, X = LOAD *A
248 STORE *D = Z, X = LOAD *A, Y = LOAD *B
249 STORE *D = Z, Y = LOAD *B, X = LOAD *A
268 STORE *A = X; STORE *(A + 4) = Y;
269 STORE *(A + 4) = Y; STORE *A = X;
270 STORE {*A, *(A + 4) } = {X, Y};
344 A write memory barrier gives a guarantee that all the STORE operations
345 specified before the barrier will appear to happen before all the STORE
415 A general memory barrier gives a guarantee that all the LOAD and STORE
417 the LOAD and STORE operations specified after the barrier with respect to
895 STORE A = 1
896 STORE B = 2
897 STORE C = 3
899 STORE D = 4
900 STORE E = 5
903 that the rest of the system might perceive as the unordered set of { STORE A,
904 STORE B, STORE C } all occurring before the unordered set of { STORE D, STORE E
934 STORE A = 1
935 STORE B = 2
937 STORE C = &B LOAD X
938 STORE D = 4 LOAD C (gets &B)
980 STORE A = 1
981 STORE B = 2
983 STORE C = &B LOAD X
984 STORE D = 4 LOAD C (gets &B)
1021 STORE A=1
1023 STORE B=2
1057 STORE A=1
1059 STORE B=2
1093 STORE A=1
1095 STORE B=2
1265 STORE X=1 LOAD X STORE Y=1
1293 STORE X=1 LOAD X STORE Y=1
1850 ACQUIRE M, STORE *B, STORE *A, RELEASE M
1870 ACQUIRE N, STORE *B, STORE *A, RELEASE M
1968 STORE current->state
2003 between the STORE to indicate the event and the STORE to set TASK_RUNNING:
2007 set_current_state(); STORE event_indicated
2009 STORE current->state <write barrier>
2010 <general barrier> STORE current->state
2019 X = 1; STORE event_indicated
2154 STORE *ADDR = 0, STORE *ADDR = 4, STORE *DATA = 1, STORE *DATA = 5
2259 STORE waiter->task;
2282 STORE waiter->task;
2301 STORE waiter->task;
2469 STORE *ADDR = 3, STORE *ADDR = 4, STORE *DATA = y, q = LOAD *DATA
2839 LOAD *A, STORE *B, LOAD *C, LOAD *D, STORE *E.
2871 LOAD *A, ..., LOAD {*C,*D}, STORE *E, STORE *B
2898 U=LOAD *A, STORE *A=V, STORE *A=W, X=LOAD *A, STORE *A=Y, Z=LOAD *A