Lines Matching refs:handler

91   an SoC. This means that there is a fast IRQ handler for the GPIOs that
92   gets called in a chain from the parent IRQ handler, most typically the
96   handler will be called immediately from the parent irqchip, while
98   something like this sequence in its interrupt handler:
110   in chained IRQ handler.
112   - chained IRQ handler can be converted to generic irq handler and this way
113   it will be threaded IRQ handler on -RT and hard IRQ handler on non-RT
116   so IRQ core will complain if it will be called from IRQ handler wich is forced
128   performed by generic IRQ handler which is configured using request_irq().
130   its interrupt handler:
144   in a quick IRQ handler with IRQs disabled. Instead they need to spawn a
147   this in its interrupt handler:
168 * gpiochip_set_chained_irqchip(): sets up a chained irq handler for a
169   gpio_chip from a parent IRQ and passes the struct gpio_chip* as handler
170   data. (Notice handler data, since the irqchip data is likely used by the
172   to set up a nested irqchip if NULL is passed as handler.
181   handle_bad_irq() as flow handler parameter in gpiochip_irqchip_add() if it is
183   before using/enabling GPIO IRQ. Then set the handler to handle_level_irq()
238   from chained IRQ handler;
241 - Chained GPIO irqchips: get rid of chained IRQ handler and use generic irq
242   handler if possible :)