Lines Matching refs:SPU
6 spufs - the SPU file system
10 The SPU file system is used on PowerPC machines that implement the Cell
16 can use spu_create(2) to establish SPU contexts in the spufs root.
18 Every SPU context is represented by a directory containing a predefined
20 logical SPU. Users can change permissions on those files, but not actu-
53 the contents of the local storage memory of the SPU. This can be
55 data in the address space of the SPU. The possible operations on an
61 file. The file size is the size of the local storage of the SPU,
66 SPU local storage within the process address space. Only
71 The first SPU to CPU communication mailbox. This file is read-only and
85 The second SPU to CPU communication mailbox. This file is similar to
98 block until the SPU writes to its interrupt mailbox channel.
108 The CPU to SPU communation mailbox. It is write-only and can be written
118 has been opened without O_NONBLOCK, the call will block until the SPU
152 Internal registers of the SPU. The representation is an ASCII string
156 npc requires an SPU context save and is therefore very inefficient.
162 decr SPU Decrementer
166 spu_tag_mask MFC tag mask for SPU DMA
168 event_mask Event mask for SPU interrupts
181 a running SPU task. When a complete string has been read, all
211 The two signal notification channels of an SPU. These are read-write
213 triggers an interrupt on the SPU. The value written to the signal
214 files can be read from the SPU through a channel read or from host user
215 space through the file. After the value has been read by the SPU, it
297 ate(2) to address a specific SPU context. When the context gets sched-
298 uled to a physical SPU, it starts execution at the instruction pointer
301 Execution of SPU code happens synchronously, meaning that spu_run does
302 not return while the SPU is still running. If there is a need to exe-
303 cute SPU code in parallel with other code on either the main CPU or
307 When spu_run returns, the current value of the SPU instruction pointer
332 on the SPU. The bit masks for the status codes are:
334 0x02 SPU was stopped by stop-and-signal.
336 0x04 SPU was stopped by halt.
338 0x08 SPU is waiting for a channel.
340 0x10 SPU is in single-step mode.
342 0x20 SPU has tried to execute an invalid instruction.
344 0x40 SPU has tried to access an invalid channel.
420 Processor Units (SPUs). It creates a new logical context for an SPU in
422 point to a non-existing directory in the mount point of the SPU file
430 descriptor is closed, the logical SPU context is destroyed.
436 Allow mapping of some of the hardware registers of the SPU into
459 EEXIST An SPU context already exists at the given path name.
479 ENOSPC There are not enough SPU resources available to create a new
480 context or the user specific limit for the number of SPU con-