Lines Matching refs:IP

1    d) Xilinx IP cores
3    The Xilinx EDK toolchain ships with a set of IP cores (devices) for use
10    Each IP-core has a set of parameters which the FPGA designer can use to
14    device drivers how the IP cores are configured, but it requires the kernel
20    properties of the device node.  In general, device nodes for IP-cores
48    Typically, the compatible list will include the exact IP core version
49    followed by an older IP core version which implements the same
89    Some IP cores actually implement 2 or more logical devices.  In
90    this case, the device should still describe the whole IP core with
92    ranges property can be used to translate from parent IP-core to the
99    enumerate logical devices within an IP core.  For example, the
232    That covers the general approach to binding xilinx IP cores into the