Lines Matching refs:of

8 Please refer to pinctrl-bindings.txt in this directory for details of the
9 common pinctrl bindings used by client devices, including the meaning of the
12 The Rockchip pin configuration node is a node of a group of pins which can be
14 config of the pins in that group. The 'pins' selects the function mode(also
19 defined as gpio sub-nodes of the pinmux controller.
22   - compatible: one of "rockchip,rk2928-pinctrl", "rockchip,rk3066a-pinctrl"
30 	 as some SoCs carry parts of the iomux controller registers there.
35   - reg: first element is the general register space of the iomux controller
37 	 second element is the separate pull register space of the rk3188.
42   - reg: register of the gpio bank (different than the iomux registerset)
43   - interrupts: base interrupt of the gpio bank in the interrupt controller
46   - #gpio-cells: number of cells in GPIO specifier. Since the generic GPIO
47     binding is used, the amount of cells must be specified as 2. See generic
48     GPIO binding documentation for description of particular cells.
50   - #interrupt-cells: the value of this property should be 2 and the interrupt
60   - rockchip,pins: 3 integers array, represents a group of pins mux and config
63     The phandle of a node containing the generic pinconfig options