Lines Matching refs:controller

1 Freescale Layerscape PCIe controller
3 This PCIe host controller is based on the Synopsys DesignWare PCIe IP
6 This controller derives its clocks from the Reset Configuration Word (RCW)
10 register available in the Freescale PCIe controller register set,
11 which can allow determining the underlying DesignWare PCIe controller version
18 - reg: base addresses and lengths of the PCIe controller
19 - interrupts: A list of interrupt outputs of the controller. Must contain an
22   "intr": The interrupt that is asserted for controller interrupts
25   The second entry must be '0' or '1' based on physical PCIe controller index.
32 		reg = <0x00 0x03400000 0x0 0x00010000   /* controller registers */
35 		interrupts = <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>; /* controller interrupt */