Lines Matching refs:clock

11  - clocks: <&cru SCLK_MAC>: clock selector for main clock, from PLL or PHY.
12 	   <&cru SCLK_MAC_PLL>: PLL clock for SCLK_MAC
13 	   <&cru SCLK_MAC_RX>: clock gate for RX
14 	   <&cru SCLK_MAC_TX>: clock gate for TX
15 	   <&cru SCLK_MACREF>: clock gate for RMII referce clock
16 	   <&cru SCLK_MACREF_OUT> clock gate for RMII reference clock output
17 	   <&cru ACLK_GMAC>: AXI clock gate for GMAC
18 	   <&cru PCLK_GMAC>: APB clock gate for GMAC
19  - clock-names: One name for each entry in the clocks property.
23  - clock_in_out: For RGMII, it must be "input", means main clock(125MHz)
25    PHY provides the reference clock(50MHz), "output" means GMAC provides the
26    reference clock.
29  - assigned-clocks: main clock, should be <&cru SCLK_MAC>;
30  - assigned-clock-parents = parent of main clock.
50 	clock-names = "stmmaceth",
63 	assigned-clock-parents = <&ext_gmac>;