Lines Matching refs:interrupt

3 All Tegra SoCs contain a legacy interrupt controller that routes
7 The HW block exposes a number of interrupt controllers, each
19 - interrupt-controller : Identifies the node as an interrupt controller.
20 - #interrupt-cells : Specifies the number of cells needed to encode an
21   interrupt source. The value must be 3.
22 - interrupt-parent : a phandle to the GIC these interrupts are routed
28   interrupt specifier must be that of the GIC.
29 - Only SPIs can use the ictlr as an interrupt parent. SGIs and PPIs
34 	ictlr: interrupt-controller@60004000 {
40 		interrupt-controller;
41 		#interrupt-cells = <3>;
42 		interrupt-parent = <&intc>;