Lines Matching refs:interrupt

4 The Abilis TB10x SOC contains a custom interrupt controller. It performs
5 one-to-one mapping of external interrupt sources to CPU interrupts and
13 - interrupt-congroller: Identifies the node as an interrupt controller.
14 - #interrupt cells: Specifies the number of cells used to encode an interrupt
16 - interrupt-parent: Specifies the parent interrupt controller.
17 - interrupts: Specifies the list of interrupt lines which are handled by
18   the interrupt controller in the parent controller's notation. Interrupts
24 intc: interrupt-controller {	/* Parent interrupt controller */
25 	interrupt-controller;
26 	#interrupt-cells = <1>;	/* For example below */
30 tb10x_ictl: pic@2000 {		/* TB10x interrupt controller */
33 	interrupt-controller;
34 	#interrupt-cells = <2>;
35 	interrupt-parent = <&intc>;