Lines Matching refs:clock

1 Binding for TI divider clock
5 This binding uses the common clock binding[1].  It assumes a
6 register-mapped adjustable clock rate divider that does not gate and has
7 only one input clock or parent.  By default the value programmed into
52 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
53 [2] Documentation/devicetree/bindings/clock/ti/autoidle.txt
56 - compatible : shall be "ti,divider-clock" or "ti,composite-divider-clock".
57 - #clock-cells : from common clock binding; shall be set to 0.
58 - clocks : link to phandle of parent clock
62 - clock-output-names : from common clock binding.
65 - ti,min-div : min divisor for dividing the input clock rate, only
67 - ti,max-div : max divisor for dividing the input clock rate, only needed
73 - ti,autoidle-shift : bit shift of the autoidle enable bit for the clock,
81 	#clock-cells = <0>;
82 	compatible = "ti,divider-clock";
90 	#clock-cells = <0>;
91 	compatible = "ti,divider-clock";
99 	#clock-cells = <0>;
100 	compatible = "ti,composite-divider-clock";
108 	#clock-cells = <0>;
109 	compatible = "ti,composite-divider-clock";