Lines Matching refs:clock

1 Binding for Silicon Labs Si5351a/b/c programmable i2c clock generator.
7 The Si5351a/b/c are programmable i2c clock generators with up to 8 output
9 3 output clocks are accessible. The internal structure of the clock
17 - #clock-cells: from common clock binding; shall be set to 1.
18 - clocks: from common clock binding; list of parent clock
19   handles, shall be xtal reference clock or xtal and clkin for
20   si5351c only. Corresponding clock input names are "xtal" and
27   to overwrite clock source of pll A (number=0) or B (number=1).
31 Each of the clock outputs can be overwritten individually by
32 using a child node to the I2C device node. If a child node for a clock
36 - reg: number of clock output.
39 - silabs,clock-source: source clock of the output divider stage N, shall be
48 - silabs,disable-state : clock output disable state, shall be
49   0 = clock output is driven LOW when disabled
50   1 = clock output is driven HIGH when disabled
51   2 = clock output is FLOATING (HIGH-Z) when disabled
52   3 = clock output is NEVER disabled
58 	compatible = "fixed-clock";
59 	#clock-cells = <0>;
60 	clock-frequency = <25000000>;
65 	/* Si5351a msop10 i2c clock generator */
66 	si5351a: clock-generator@60 {
71 		#clock-cells = <1>;
75 		clock-names = "xtal";
83 		 * - pll0 as clock source of multisynth0
84 		 * - multisynth0 as clock source of output divider
86 		 * - set initial clock frequency of 74.25MHz
92 			silabs,clock-source = <0>;
94 			clock-frequency = <74250000>;
100 		 * - pll1 as clock source of multisynth1
101 		 * - multisynth1 as clock source of output divider
108 			silabs,clock-source = <0>;
114 		 * - xtal as clock source of output divider
118 			silabs,clock-source = <2>;