Lines Matching refs:clocks

10     which generates clocks for IMEM/FSYS/G3D/GSCL/HEVC/MSCL/G2D/MFC/PERIC/PERIS
11     domains and bus clocks.
13     which generates clocks for LLI (Low Latency Interface) IP.
15     which generates clocks for DRAM Memory Controller domain.
17     which generates clocks for UART/I2C/SPI/I2S/PCM/SPDIF/PWM/SLIMBUS IPs.
19     which generates clocks for PMU/TMU/MCT/WDT/RTC/SECKEY/TZPC IPs.
21     which generates clocks for USB/UFS/SDMMC/TSI/PDMA IPs.
23     which generates clocks for G2D/MDMA IPs.
25     which generates clocks for Display (DECON/HDMI/DSIM/MIXER) IPs.
27     which generates clocks for Cortex-A5/BUS/AUDIO clocks.
32     which generates clocks for 3D Graphics Engine IP.
34     which generates clocks for GSCALER IPs.
36     which generates clocks for Cortex-A53 Quad-core processor.
38     which generates clocks for Cortex-A57 Quad-core processor, CoreSight and
41     which generates clocks for M2M (Memory to Memory) scaler and JPEG IPs.
43     which generates clocks for MFC(Multi-Format Codec) IP.
45     which generates clocks for HEVC(High Efficiency Video Codec) decoder IP.
47     which generates clocks for FIMC-ISP/DRC/SCLC/DIS/3DNR IPs.
49     which generates clocks for MIPI_CSIS{0|1}/FIMC_LITE_{A|B|D}/FIMC_3AA{0|1}
52     which generates clocks for Cortex-A5/MIPI_CSIS2/FIMC-LITE_C/FIMC-FD IPs.
59 - clocks: list of the clock controller input clock identifiers,
61 	to find the input clocks for a given controller.
66 	Input clocks for top clock controller:
72 	Input clocks for cpif clock controller:
75 	Input clocks for mif clock controller:
79 	Input clocks for fsys clock controller:
91 	Input clocks for g2d clock controller:
96 	Input clocks for disp clock controller:
107 	Input clocks for bus0 clock controller:
110 	Input clocks for bus1 clock controller:
113 	Input clocks for bus2 clock controller:
117 	Input clocks for g3d clock controller:
121 	Input clocks for gscl clock controller:
126 	Input clocks for apollo clock controller:
130 	Input clocks for atlas clock controller:
134 	Input clocks for mscl clock controller:
139 	Input clocks for mfc clock controller:
143 	Input clocks for hevc clock controller:
147 	Input clocks for isp clock controller:
152 	Input clocks for cam0 clock controller:
158 	Input clocks for cam1 clock controller:
170 All available clocks are defined as preprocessor macros in
193 		clocks = <&xxti>,
205 		clocks = <&xxti>;
215 		clocks = <&xxti>,
246 		clocks = <&xxti>,
266 		clocks = <&xxti>,
285 		clocks = <&xxti>,
308 		clocks = <&cmu_top CLK_ACLK_BUS0_400>;
317 		clocks = <&cmu_top CLK_ACLK_BUS1_400>;
326 		clocks = <&xxti>, <&cmu_mif CLK_ACLK_BUS2_400>;
335 		clocks = <&xxti>, <&cmu_top CLK_ACLK_G3D_400>;
346 		clocks = <&xxti>,
357 		clocks = <&xxti>, <&cmu_mif CLK_SCLK_BUS_PLL_APOLLO>;
366 		clocks = <&xxti>, <&cmu_mif CLK_SCLK_BUS_PLL_ATLAS>;
377 		clocks = <&xxti>,
388 		clocks = <&xxti>, <&cmu_top CLK_ACLK_MFC_400>;
397 		clocks = <&xxti>, <&cmu_top CLK_ACLK_HEVC_400>;
408 		clocks = <&xxti>,
422 		clocks = <&xxti>,
440 		clocks = <&xxti>,
456 		clocks = <&cmu_peric CLK_PCLK_UART0>,