Lines Matching refs:of

4 TI C6X SoCs contain a region of miscellaneous registers which provide various
30         SoCs which do support a given property, leaving the property out of the
35     offset of the devstat register
38     offset, start bit, and bitsize of silicon revision field
41     offset and bitmask of RMII reset field. May have multiple tuples if more
46     a lock register. Each tuple consists of the register offset, lock register
50     offset and key values of two "kick" registers used to write protect other
56     MAC addresses are contained in two registers. Each element of a MAC address
59     most significant to least. The value of these four cells is the MAC byte
60     index (1-6) of the byte within the register. A value of 0 means the byte
64     This property describes the bitfields used to control the state of devices.
65     Each tuple describes a range of identical bitfields used to control one or
66     more devices (one bitfield per device). The layout of each tuple is:
72         num_ids is the number of device controls in the range
73         reg is the offset of the register holding the control bits
76         start_bit is the bit number of the first bit in the range
77         nbits is the number of bits per device control
81     for device states controlled by the DSCR. Each tuple describes a range of
83     bitfield per device). The layout of each tuple is:
89         num_ids is the number of devices covered by the range
90         reg is the offset of the register holding the status bits
93         start_bit is the bit number of the first bit in the range
94         nbits is the number of bits per device status