Lines Matching refs:cpu
16 The cpu nodes (bindings defined in [1]) represent the devices that
22 For instance in a system where CPUs support SMT, "cpu" nodes represent all
24 In systems where SMT is not supported "cpu" nodes represent all cores present
27 ARM topology bindings allow one to associate cpu nodes with hierarchical groups
36 If not stated otherwise, whenever a reference to a cpu node phandle is made its
37 value must point to a cpu node compliant with the cpu node bindings as
39 A topology description containing phandles to cpu nodes that are not compliant
43 2 - cpu-map node
46 The ARM CPU topology is defined within the cpu-map node, which is a direct
50 - cpu-map node
55 cpu-map node.
57 Description: The cpu-map node is just a container node where its
60 Node name must be "cpu-map".
62 The cpu-map node's parent node must be the cpus node.
64 The cpu-map node's child nodes can be:
70 The cpu-map node can only contain three types of child nodes:
79 be defined within the cpu-map node and every core/thread in the system
84 2.1 - cpu-map child nodes naming convention
87 cpu-map child nodes must follow a naming convention where the node name
92 cpu-map child nodes which do not share a common parent node can have the same
93 name (ie same number N as other cpu-map child nodes at different device tree
100 Bindings for cluster/cpu/thread nodes are defined as follows:
104 Description: must be declared within a cpu-map node, one node
132 - cpu
135 Definition: a phandle to the cpu node that corresponds to the
157 - cpu
160 Definition: a phandle to the cpu node that corresponds to
167 Example 1 (ARM 64-bit, 16-cpu system, two clusters of clusters):
173 cpu-map {
178 cpu = <&CPU0>;
181 cpu = <&CPU1>;
187 cpu = <&CPU2>;
190 cpu = <&CPU3>;
198 cpu = <&CPU4>;
201 cpu = <&CPU5>;
207 cpu = <&CPU6>;
210 cpu = <&CPU7>;
220 cpu = <&CPU8>;
223 cpu = <&CPU9>;
228 cpu = <&CPU10>;
231 cpu = <&CPU11>;
239 cpu = <&CPU12>;
242 cpu = <&CPU13>;
247 cpu = <&CPU14>;
250 cpu = <&CPU15>;
257 CPU0: cpu@0 {
258 device_type = "cpu";
262 cpu-release-addr = <0 0x20000000>;
265 CPU1: cpu@1 {
266 device_type = "cpu";
270 cpu-release-addr = <0 0x20000000>;
273 CPU2: cpu@100 {
274 device_type = "cpu";
278 cpu-release-addr = <0 0x20000000>;
281 CPU3: cpu@101 {
282 device_type = "cpu";
286 cpu-release-addr = <0 0x20000000>;
289 CPU4: cpu@10000 {
290 device_type = "cpu";
294 cpu-release-addr = <0 0x20000000>;
297 CPU5: cpu@10001 {
298 device_type = "cpu";
302 cpu-release-addr = <0 0x20000000>;
305 CPU6: cpu@10100 {
306 device_type = "cpu";
310 cpu-release-addr = <0 0x20000000>;
313 CPU7: cpu@10101 {
314 device_type = "cpu";
318 cpu-release-addr = <0 0x20000000>;
321 CPU8: cpu@100000000 {
322 device_type = "cpu";
326 cpu-release-addr = <0 0x20000000>;
329 CPU9: cpu@100000001 {
330 device_type = "cpu";
334 cpu-release-addr = <0 0x20000000>;
337 CPU10: cpu@100000100 {
338 device_type = "cpu";
342 cpu-release-addr = <0 0x20000000>;
345 CPU11: cpu@100000101 {
346 device_type = "cpu";
350 cpu-release-addr = <0 0x20000000>;
353 CPU12: cpu@100010000 {
354 device_type = "cpu";
358 cpu-release-addr = <0 0x20000000>;
361 CPU13: cpu@100010001 {
362 device_type = "cpu";
366 cpu-release-addr = <0 0x20000000>;
369 CPU14: cpu@100010100 {
370 device_type = "cpu";
374 cpu-release-addr = <0 0x20000000>;
377 CPU15: cpu@100010101 {
378 device_type = "cpu";
382 cpu-release-addr = <0 0x20000000>;
386 Example 2 (ARM 32-bit, dual-cluster, 8-cpu system, no SMT):
392 cpu-map {
395 cpu = <&CPU0>;
398 cpu = <&CPU1>;
401 cpu = <&CPU2>;
404 cpu = <&CPU3>;
410 cpu = <&CPU4>;
413 cpu = <&CPU5>;
416 cpu = <&CPU6>;
419 cpu = <&CPU7>;
424 CPU0: cpu@0 {
425 device_type = "cpu";
430 CPU1: cpu@1 {
431 device_type = "cpu";
436 CPU2: cpu@2 {
437 device_type = "cpu";
442 CPU3: cpu@3 {
443 device_type = "cpu";
448 CPU4: cpu@100 {
449 device_type = "cpu";
454 CPU5: cpu@101 {
455 device_type = "cpu";
460 CPU6: cpu@102 {
461 device_type = "cpu";
466 CPU7: cpu@103 {
467 device_type = "cpu";