Lines Matching refs:X

14 to change your driver to use MSI or MSI-X and some basic diagnostics to
24 in PCI 3.0 to allow each interrupt to be masked individually.  The MSI-X
28 Devices may support both MSI and MSI-X, but only one can be enabled at
67 driver has to set up the device to use MSI or MSI-X.  Not all machines
73 To support MSI or MSI-X, the kernel must be built with the CONFIG_PCI_MSI
127 handle such devices for MSI-X - the same logic applies to MSI.
163 enable a particular number of MSI-X interrupts, pci_enable_msi_range()
227 4.3 Using MSI-X
229 The MSI-X capability is much more flexible than the MSI capability.
252 MSI-X interrupts within specified range from 'minvec' to 'maxvec'.
256 On success, the device is switched into MSI-X mode and the function
257 returns the number of MSI-X interrupts that have been successfully
262 interrupts assigned to the MSI-X vectors so it can free them again later.
263 Device driver can use the returned number of successfully allocated MSI-X
267 the driver should not attempt to allocate any more MSI-X interrupts for
272 number once MSI-X is enabled.
277 It is ideal if drivers can cope with a variable number of MSI-X interrupts;
281 There could be devices that can not operate with just any number of MSI-X
283 four vectors per each queue it provides.  Therefore, a number of MSI-X
285 pci_enable_msix_range() can not be used alone to request MSI-X interrupts
288 to request the required number of MSI-X interrupts.
290 4.3.1.1 Maximum possible number of MSI-X interrupts
292 The typical usage of MSI-X interrupts is to allocate as many vectors as
304 Some devices have a minimal limit on number of MSI-X interrupts.
313 4.3.1.2 Exact number of MSI-X interrupts
315 If a driver is unable or unwilling to deal with a variable number of MSI-X
327 enable a particular number of MSI-X interrupts, pci_enable_msix_range()
331 4.3.1.3 Specific requirements to the number of MSI-X interrupts
334 number of MSI-X interrupts within a range.  E.g., let's assume a device that
335 is only capable sending the number of MSI-X interrupts which is a power of
336 two.  A routine that enables MSI-X mode for such device might look like this:
386 the driver should not attempt to allocate any more MSI-X interrupts for
390 returns zero in case of success, which indicates MSI-X interrupts have been
393 Another version of a routine that enables MSI-X mode for a device with
439 It frees the previously allocated MSI-X interrupts. The interrupts may
446 MSI-X enabled and thus leaking its vector.
448 4.3.3 The MSI-X Table
450 The MSI-X capability specifies a BAR and offset within that BAR for the
451 MSI-X Table.  This address is mapped by the PCI subsystem, and should not
460 MSI-X table.
466 number of MSI-X interrupt vectors that could be allocated.
468 4.4 Handling devices implementing both MSI and MSI-X capabilities
470 If a device implements both MSI and MSI-X capabilities, it can
471 run in either MSI mode or MSI-X mode, but not both simultaneously.
473 PCI layer.  Calling pci_enable_msi_range() when MSI-X is already
476 and MSI-X at runtime, it must first quiesce the device, then switch
484 4.5.1 Choosing between MSI-X and MSI
486 If your device supports both MSI-X and MSI capabilities, you should use
487 the MSI-X facilities in preference to the MSI facilities.  As mentioned
488 above, MSI-X supports any number of interrupts between 1 and 2048.
492 as many vectors for MSI as it could for MSI-X.  On some platforms, MSI
493 interrupts must all be targeted at the same set of CPUs whereas MSI-X
508 4.6 How to tell whether MSI/MSI-X is enabled on a device
511 Signalled Interrupts" or "MSI-X" capabilities.  Each of these capabilities