53 			       struct kvm_exit_mmio *mmio, phys_addr_t offset)  in handle_mmio_rao_wi()  argument
57 	vgic_reg_access(mmio, &reg, offset,  in handle_mmio_rao_wi()
64 			     struct kvm_exit_mmio *mmio, phys_addr_t offset)  in handle_mmio_ctlr()  argument
76 	vgic_reg_access(mmio, &reg, offset,  in handle_mmio_ctlr()
96 			      struct kvm_exit_mmio *mmio, phys_addr_t offset)  in handle_mmio_typer()  argument
104 	vgic_reg_access(mmio, &reg, offset,  in handle_mmio_typer()
111 			     struct kvm_exit_mmio *mmio, phys_addr_t offset)  in handle_mmio_iidr()  argument
116 	vgic_reg_access(mmio, &reg, offset,  in handle_mmio_iidr()
124 					    phys_addr_t offset)  in handle_mmio_set_enable_reg_dist()  argument
126 	if (likely(offset >= VGIC_NR_PRIVATE_IRQS / 8))  in handle_mmio_set_enable_reg_dist()
127 		return vgic_handle_enable_reg(vcpu->kvm, mmio, offset,  in handle_mmio_set_enable_reg_dist()
131 	vgic_reg_access(mmio, NULL, offset,  in handle_mmio_set_enable_reg_dist()
138 					      phys_addr_t offset)  in handle_mmio_clear_enable_reg_dist()  argument
140 	if (likely(offset >= VGIC_NR_PRIVATE_IRQS / 8))  in handle_mmio_clear_enable_reg_dist()
141 		return vgic_handle_enable_reg(vcpu->kvm, mmio, offset,  in handle_mmio_clear_enable_reg_dist()
145 	vgic_reg_access(mmio, NULL, offset,  in handle_mmio_clear_enable_reg_dist()
152 					     phys_addr_t offset)  in handle_mmio_set_pending_reg_dist()  argument
154 	if (likely(offset >= VGIC_NR_PRIVATE_IRQS / 8))  in handle_mmio_set_pending_reg_dist()
155 		return vgic_handle_set_pending_reg(vcpu->kvm, mmio, offset,  in handle_mmio_set_pending_reg_dist()
158 	vgic_reg_access(mmio, NULL, offset,  in handle_mmio_set_pending_reg_dist()
165 					       phys_addr_t offset)  in handle_mmio_clear_pending_reg_dist()  argument
167 	if (likely(offset >= VGIC_NR_PRIVATE_IRQS / 8))  in handle_mmio_clear_pending_reg_dist()
168 		return vgic_handle_clear_pending_reg(vcpu->kvm, mmio, offset,  in handle_mmio_clear_pending_reg_dist()
171 	vgic_reg_access(mmio, NULL, offset,  in handle_mmio_clear_pending_reg_dist()
178 					  phys_addr_t offset)  in handle_mmio_priority_reg_dist()  argument
182 	if (unlikely(offset < VGIC_NR_PRIVATE_IRQS)) {  in handle_mmio_priority_reg_dist()
183 		vgic_reg_access(mmio, NULL, offset,  in handle_mmio_priority_reg_dist()
189 				   vcpu->vcpu_id, offset);  in handle_mmio_priority_reg_dist()
190 	vgic_reg_access(mmio, reg, offset,  in handle_mmio_priority_reg_dist()
197 				     phys_addr_t offset)  in handle_mmio_cfg_reg_dist()  argument
201 	if (unlikely(offset < VGIC_NR_PRIVATE_IRQS / 4)) {  in handle_mmio_cfg_reg_dist()
202 		vgic_reg_access(mmio, NULL, offset,  in handle_mmio_cfg_reg_dist()
208 				  vcpu->vcpu_id, offset >> 1);  in handle_mmio_cfg_reg_dist()
210 	return vgic_handle_cfg_reg(reg, mmio, offset);  in handle_mmio_cfg_reg_dist()
252 				  phys_addr_t offset)  in handle_mmio_route_reg()  argument
265 	if ((offset & 4)) {  in handle_mmio_route_reg()
266 		vgic_reg_access(mmio, NULL, offset,  in handle_mmio_route_reg()
272 	spi = offset / 8;  in handle_mmio_route_reg()
278 	vgic_reg_access(mmio, &reg, offset,  in handle_mmio_route_reg()
327 			       phys_addr_t offset)  in handle_mmio_idregs()  argument
331 	switch (offset + GICD_IDREGS) {  in handle_mmio_idregs()
337 	vgic_reg_access(mmio, &reg, offset,  in handle_mmio_idregs()
507 				    phys_addr_t offset)  in handle_mmio_ctlr_redist()  argument
510 	vgic_reg_access(mmio, NULL, offset,  in handle_mmio_ctlr_redist()
517 				     phys_addr_t offset)  in handle_mmio_typer_redist()  argument
525 	if ((offset & ~3) == 4) {  in handle_mmio_typer_redist()
529 		vgic_reg_access(mmio, &reg, offset,  in handle_mmio_typer_redist()
537 	vgic_reg_access(mmio, &reg, offset,  in handle_mmio_typer_redist()
544 					      phys_addr_t offset)  in handle_mmio_set_enable_reg_redist()  argument
548 	return vgic_handle_enable_reg(vcpu->kvm, mmio, offset,  in handle_mmio_set_enable_reg_redist()
555 						phys_addr_t offset)  in handle_mmio_clear_enable_reg_redist()  argument
559 	return vgic_handle_enable_reg(vcpu->kvm, mmio, offset,  in handle_mmio_clear_enable_reg_redist()
566 					       phys_addr_t offset)  in handle_mmio_set_pending_reg_redist()  argument
570 	return vgic_handle_set_pending_reg(vcpu->kvm, mmio, offset,  in handle_mmio_set_pending_reg_redist()
576 						 phys_addr_t offset)  in handle_mmio_clear_pending_reg_redist()  argument
580 	return vgic_handle_clear_pending_reg(vcpu->kvm, mmio, offset,  in handle_mmio_clear_pending_reg_redist()
586 					    phys_addr_t offset)  in handle_mmio_priority_reg_redist()  argument
592 				   redist_vcpu->vcpu_id, offset);  in handle_mmio_priority_reg_redist()
593 	vgic_reg_access(mmio, reg, offset,  in handle_mmio_priority_reg_redist()
600 				       phys_addr_t offset)  in handle_mmio_cfg_reg_redist()  argument
605 				       redist_vcpu->vcpu_id, offset >> 1);  in handle_mmio_cfg_reg_redist()
607 	return vgic_handle_cfg_reg(reg, mmio, offset);  in handle_mmio_cfg_reg_redist()