Lines Matching refs:that

10 thus be used to profile the code that runs on that CPU.
111 These are standardized types of events that work relatively uniformly
112 on all CPUs that implement Performance Counters support under Linux,
150 counters. A "counting" counter is one that is used for counting the
151 number of events that occur, and is characterised by having
160 * Bits that can be set in hw_event.read_format to request that
174 A "sampling" counter is one that is set up to generate an interrupt
180 * Bits that can be set in hw_event.record_type to request information
199 The 'inherit' bit, if set, specifies that this counter should count
205 The 'pinned' bit, if set, specifies that the counter should always be
213 The 'exclusive' bit, if set, specifies that when this counter's group
217 advanced features of the CPU's Performance Monitor Unit (PMU) that are
218 not otherwise accessible and that might disrupt other hardware
222 way to request that counting of events be restricted to times when the
251 A 'pid > 0' and 'cpu == -1' counter is a per task counter that counts
252 events of that task and 'follows' that task to whatever CPU the task
256 A 'pid == -1' and 'cpu == x' counter is a per CPU counter that counts
264 that creates it. The rest of the group members are created
269 A counter group is scheduled onto the CPU as a unit, that is, it will
271 put onto the CPU. This means that the values of the member counters
282 (struct perf_event_mmap_page) that contains various bits of information such
286 * Structure of the page that can be mapped via mmap
345 * The MMAP events record the PROT_EXEC mappings so that we can
422 whole group; that is, while the group leader is disabled, none of the
424 group other than the leader only affects that counter - disabling an
425 non-leader stops that counter from counting but doesn't affect any
434 A process can enable or disable all the counter groups that are
442 by this process or by another, and doesn't affect any counters that
461 Architectures that have d-cache aliassing issues, such as Sparc and ARM,