89 	dev_dbg(mcpdm->dev, "***********************\n");  in omap_mcpdm_reg_dump()
90 	dev_dbg(mcpdm->dev, "IRQSTATUS_RAW:  0x%04x\n",  in omap_mcpdm_reg_dump()
92 	dev_dbg(mcpdm->dev, "IRQSTATUS:  0x%04x\n",  in omap_mcpdm_reg_dump()
94 	dev_dbg(mcpdm->dev, "IRQENABLE_SET:  0x%04x\n",  in omap_mcpdm_reg_dump()
96 	dev_dbg(mcpdm->dev, "IRQENABLE_CLR:  0x%04x\n",  in omap_mcpdm_reg_dump()
98 	dev_dbg(mcpdm->dev, "IRQWAKE_EN: 0x%04x\n",  in omap_mcpdm_reg_dump()
100 	dev_dbg(mcpdm->dev, "DMAENABLE_SET: 0x%04x\n",  in omap_mcpdm_reg_dump()
102 	dev_dbg(mcpdm->dev, "DMAENABLE_CLR:  0x%04x\n",  in omap_mcpdm_reg_dump()
104 	dev_dbg(mcpdm->dev, "DMAWAKEEN:  0x%04x\n",  in omap_mcpdm_reg_dump()
106 	dev_dbg(mcpdm->dev, "CTRL:  0x%04x\n",  in omap_mcpdm_reg_dump()
108 	dev_dbg(mcpdm->dev, "DN_DATA:  0x%04x\n",  in omap_mcpdm_reg_dump()
110 	dev_dbg(mcpdm->dev, "UP_DATA: 0x%04x\n",  in omap_mcpdm_reg_dump()
112 	dev_dbg(mcpdm->dev, "FIFO_CTRL_DN: 0x%04x\n",  in omap_mcpdm_reg_dump()
114 	dev_dbg(mcpdm->dev, "FIFO_CTRL_UP:  0x%04x\n",  in omap_mcpdm_reg_dump()
116 	dev_dbg(mcpdm->dev, "***********************\n");  in omap_mcpdm_reg_dump()
234 		dev_dbg(mcpdm->dev, "DN (playback) FIFO Full\n");  in omap_mcpdm_irq_handler()
237 		dev_dbg(mcpdm->dev, "DN (playback) FIFO Empty\n");  in omap_mcpdm_irq_handler()
240 		dev_dbg(mcpdm->dev, "DN (playback) write request\n");  in omap_mcpdm_irq_handler()
243 		dev_dbg(mcpdm->dev, "UP (capture) FIFO Full\n");  in omap_mcpdm_irq_handler()
246 		dev_dbg(mcpdm->dev, "UP (capture) FIFO Empty\n");  in omap_mcpdm_irq_handler()
249 		dev_dbg(mcpdm->dev, "UP (capture) write request\n");  in omap_mcpdm_irq_handler()