112 static inline void mcasp_set_bits(struct davinci_mcasp *mcasp, u32 offset,  in mcasp_set_bits()  function
148 	mcasp_set_bits(mcasp, ctl_reg, val);  in mcasp_set_ctl_reg()
175 		mcasp_set_bits(mcasp, reg, FIFO_ENABLE);  in mcasp_start_rx()
201 	mcasp_set_bits(mcasp, DAVINCI_MCASP_EVTCTLR_REG,  in mcasp_start_rx()
213 		mcasp_set_bits(mcasp, reg, FIFO_ENABLE);  in mcasp_start_tx()
234 	mcasp_set_bits(mcasp, DAVINCI_MCASP_EVTCTLX_REG,  in mcasp_start_tx()
416 		mcasp_set_bits(mcasp, DAVINCI_MCASP_TXFMCTL_REG, FSXDUR);  in davinci_mcasp_set_dai_fmt()
417 		mcasp_set_bits(mcasp, DAVINCI_MCASP_RXFMCTL_REG, FSRDUR);  in davinci_mcasp_set_dai_fmt()
425 		mcasp_set_bits(mcasp, DAVINCI_MCASP_TXFMCTL_REG, FSXDUR);  in davinci_mcasp_set_dai_fmt()
426 		mcasp_set_bits(mcasp, DAVINCI_MCASP_RXFMCTL_REG, FSRDUR);  in davinci_mcasp_set_dai_fmt()
443 		mcasp_set_bits(mcasp, DAVINCI_MCASP_ACLKXCTL_REG, ACLKXE);  in davinci_mcasp_set_dai_fmt()
444 		mcasp_set_bits(mcasp, DAVINCI_MCASP_TXFMCTL_REG, AFSXE);  in davinci_mcasp_set_dai_fmt()
446 		mcasp_set_bits(mcasp, DAVINCI_MCASP_ACLKRCTL_REG, ACLKRE);  in davinci_mcasp_set_dai_fmt()
447 		mcasp_set_bits(mcasp, DAVINCI_MCASP_RXFMCTL_REG, AFSRE);  in davinci_mcasp_set_dai_fmt()
449 		mcasp_set_bits(mcasp, DAVINCI_MCASP_PDIR_REG, ACLKX | ACLKR);  in davinci_mcasp_set_dai_fmt()
450 		mcasp_set_bits(mcasp, DAVINCI_MCASP_PDIR_REG, AFSX | AFSR);  in davinci_mcasp_set_dai_fmt()
455 		mcasp_set_bits(mcasp, DAVINCI_MCASP_ACLKXCTL_REG, ACLKXE);  in davinci_mcasp_set_dai_fmt()
458 		mcasp_set_bits(mcasp, DAVINCI_MCASP_ACLKRCTL_REG, ACLKRE);  in davinci_mcasp_set_dai_fmt()
461 		mcasp_set_bits(mcasp, DAVINCI_MCASP_PDIR_REG, ACLKX | ACLKR);  in davinci_mcasp_set_dai_fmt()
468 		mcasp_set_bits(mcasp, DAVINCI_MCASP_TXFMCTL_REG, AFSXE);  in davinci_mcasp_set_dai_fmt()
471 		mcasp_set_bits(mcasp, DAVINCI_MCASP_RXFMCTL_REG, AFSRE);  in davinci_mcasp_set_dai_fmt()
474 		mcasp_set_bits(mcasp, DAVINCI_MCASP_PDIR_REG, AFSX | AFSR);  in davinci_mcasp_set_dai_fmt()
501 		mcasp_set_bits(mcasp, DAVINCI_MCASP_ACLKXCTL_REG, ACLKXPOL);  in davinci_mcasp_set_dai_fmt()
502 		mcasp_set_bits(mcasp, DAVINCI_MCASP_ACLKRCTL_REG, ACLKRPOL);  in davinci_mcasp_set_dai_fmt()
511 		mcasp_set_bits(mcasp, DAVINCI_MCASP_ACLKXCTL_REG, ACLKXPOL);  in davinci_mcasp_set_dai_fmt()
512 		mcasp_set_bits(mcasp, DAVINCI_MCASP_ACLKRCTL_REG, ACLKRPOL);  in davinci_mcasp_set_dai_fmt()
527 		mcasp_set_bits(mcasp, DAVINCI_MCASP_TXFMCTL_REG, FSXPOL);  in davinci_mcasp_set_dai_fmt()
528 		mcasp_set_bits(mcasp, DAVINCI_MCASP_RXFMCTL_REG, FSRPOL);  in davinci_mcasp_set_dai_fmt()
583 		mcasp_set_bits(mcasp, DAVINCI_MCASP_AHCLKXCTL_REG, AHCLKXE);  in davinci_mcasp_set_sysclk()
584 		mcasp_set_bits(mcasp, DAVINCI_MCASP_AHCLKRCTL_REG, AHCLKRE);  in davinci_mcasp_set_sysclk()
585 		mcasp_set_bits(mcasp, DAVINCI_MCASP_PDIR_REG, AHCLKX);  in davinci_mcasp_set_sysclk()
669 		mcasp_set_bits(mcasp, DAVINCI_MCASP_PWREMUMGT_REG, MCASP_SOFT);  in mcasp_common_hw_param()
683 		mcasp_set_bits(mcasp, DAVINCI_MCASP_XRSRCTL_REG(i),  in mcasp_common_hw_param()
687 			mcasp_set_bits(mcasp, DAVINCI_MCASP_PDIR_REG, AXR(i));  in mcasp_common_hw_param()
796 	mcasp_set_bits(mcasp, DAVINCI_MCASP_TXFMT_REG, busel | TXORD);  in mcasp_i2s_hw_param()
801 	mcasp_set_bits(mcasp, DAVINCI_MCASP_RXFMT_REG, busel | RXORD);  in mcasp_i2s_hw_param()
817 	mcasp_set_bits(mcasp, DAVINCI_MCASP_TXFMT_REG, TXROT(6) | TXSSZ(15));  in mcasp_dit_hw_param()
826 	mcasp_set_bits(mcasp, DAVINCI_MCASP_ACLKXCTL_REG, ACLKXE | TX_ASYNC);  in mcasp_dit_hw_param()
831 	mcasp_set_bits(mcasp, DAVINCI_MCASP_AHCLKXCTL_REG, AHCLKXDIV(3));  in mcasp_dit_hw_param()
834 	mcasp_set_bits(mcasp, DAVINCI_MCASP_TXDITCTL_REG, DITEN);  in mcasp_dit_hw_param()