694 		regmap_update_bits(rt5677->regmap, RT5677_PWR_DSP1, 0x2, 0x2);  in rt5677_set_dsp_mode()
697 		regmap_update_bits(rt5677->regmap, RT5677_PWR_DSP1, 0x2, 0x0);  in rt5677_set_dsp_mode()
714 		regcache_cache_only(rt5677->regmap, false);  in rt5677_set_dsp_vad()
715 		regcache_cache_bypass(rt5677->regmap, true);  in rt5677_set_dsp_vad()
717 		regmap_update_bits(rt5677->regmap, RT5677_DIG_MISC, 0x1, 0x1);  in rt5677_set_dsp_vad()
718 		regmap_update_bits(rt5677->regmap,  in rt5677_set_dsp_vad()
720 		regmap_update_bits(rt5677->regmap, RT5677_PWR_ANLG1,  in rt5677_set_dsp_vad()
722 		regmap_update_bits(rt5677->regmap, RT5677_PWR_ANLG2,  in rt5677_set_dsp_vad()
726 			regmap_update_bits(rt5677->regmap, RT5677_GLB_CLK1,  in rt5677_set_dsp_vad()
728 			regmap_update_bits(rt5677->regmap, RT5677_GLB_CLK2,  in rt5677_set_dsp_vad()
735 			regmap_update_bits(rt5677->regmap, RT5677_GLB_CLK2,  in rt5677_set_dsp_vad()
742 		regmap_write(rt5677->regmap, RT5677_PWR_DSP2, 0x07ff);  in rt5677_set_dsp_vad()
743 		regmap_write(rt5677->regmap, RT5677_PWR_DSP1, 0x07fd);  in rt5677_set_dsp_vad()
760 		regmap_update_bits(rt5677->regmap, RT5677_PWR_DSP1, 0x1, 0x0);  in rt5677_set_dsp_vad()
762 		regcache_cache_bypass(rt5677->regmap, false);  in rt5677_set_dsp_vad()
763 		regcache_cache_only(rt5677->regmap, true);  in rt5677_set_dsp_vad()
767 		regcache_cache_only(rt5677->regmap, false);  in rt5677_set_dsp_vad()
768 		regcache_cache_bypass(rt5677->regmap, true);  in rt5677_set_dsp_vad()
770 		regmap_update_bits(rt5677->regmap, RT5677_PWR_DSP1, 0x1, 0x1);  in rt5677_set_dsp_vad()
772 		regmap_write(rt5677->regmap, RT5677_PWR_DSP1, 0x0001);  in rt5677_set_dsp_vad()
774 		regmap_write(rt5677->regmap, RT5677_RESET, 0x10ec);  in rt5677_set_dsp_vad()
776 		regcache_cache_bypass(rt5677->regmap, false);  in rt5677_set_dsp_vad()
777 		regcache_mark_dirty(rt5677->regmap);  in rt5677_set_dsp_vad()
778 		regcache_sync(rt5677->regmap);  in rt5677_set_dsp_vad()
925 		regmap_update_bits(rt5677->regmap, RT5677_DMIC_CTRL1,  in set_dmic_clk()
937 	regmap_read(rt5677->regmap, RT5677_GLB_CLK1, &val);  in is_sys_clk_from_pll()
1016 	regmap_read(rt5677->regmap, reg, &val);  in is_using_asrc()
1104 		regmap_update_bits(rt5677->regmap, RT5677_ASRC_3, asrc3_mask,  in rt5677_sel_asrc_clk_src()
1133 		regmap_update_bits(rt5677->regmap, RT5677_ASRC_4, asrc4_mask,  in rt5677_sel_asrc_clk_src()
1162 		regmap_update_bits(rt5677->regmap, RT5677_ASRC_5, asrc5_mask,  in rt5677_sel_asrc_clk_src()
1179 		regmap_update_bits(rt5677->regmap, RT5677_ASRC_6, asrc6_mask,  in rt5677_sel_asrc_clk_src()
1196 		regmap_update_bits(rt5677->regmap, RT5677_ASRC_7, asrc7_mask,  in rt5677_sel_asrc_clk_src()
2317 		regmap_update_bits(rt5677->regmap, RT5677_PWR_ANLG2,  in rt5677_bst1_event()
2322 		regmap_update_bits(rt5677->regmap, RT5677_PWR_ANLG2,  in rt5677_bst1_event()
2341 		regmap_update_bits(rt5677->regmap, RT5677_PWR_ANLG2,  in rt5677_bst2_event()
2346 		regmap_update_bits(rt5677->regmap, RT5677_PWR_ANLG2,  in rt5677_bst2_event()
2365 		regmap_update_bits(rt5677->regmap, RT5677_PLL1_CTRL2, 0x2, 0x2);  in rt5677_set_pll1_event()
2369 		regmap_update_bits(rt5677->regmap, RT5677_PLL1_CTRL2, 0x2, 0x0);  in rt5677_set_pll1_event()
2387 		regmap_update_bits(rt5677->regmap, RT5677_PLL2_CTRL2, 0x2, 0x2);  in rt5677_set_pll2_event()
2391 		regmap_update_bits(rt5677->regmap, RT5677_PLL2_CTRL2, 0x2, 0x0);  in rt5677_set_pll2_event()
2409 		regmap_update_bits(rt5677->regmap, RT5677_PWR_ANLG2,  in rt5677_set_micbias1_event()
2416 		regmap_update_bits(rt5677->regmap, RT5677_PWR_ANLG2,  in rt5677_set_micbias1_event()
2437 		regmap_read(rt5677->regmap, RT5677_TDM1_CTRL2, &value);  in rt5677_if1_adc_tdm_event()
2439 			regmap_update_bits(rt5677->regmap, RT5677_TDM1_CTRL1,  in rt5677_if1_adc_tdm_event()
2460 		regmap_read(rt5677->regmap, RT5677_TDM2_CTRL2, &value);  in rt5677_if2_adc_tdm_event()
2462 			regmap_update_bits(rt5677->regmap, RT5677_TDM2_CTRL1,  in rt5677_if2_adc_tdm_event()
2485 			regmap_update_bits(rt5677->regmap, RT5677_PWR_ANLG1,  in rt5677_vref_event()
4040 		regmap_update_bits(rt5677->regmap, RT5677_I2S1_SDP,  in rt5677_hw_params()
4042 		regmap_update_bits(rt5677->regmap, RT5677_CLK_TREE_CTRL1,  in rt5677_hw_params()
4048 		regmap_update_bits(rt5677->regmap, RT5677_I2S2_SDP,  in rt5677_hw_params()
4050 		regmap_update_bits(rt5677->regmap, RT5677_CLK_TREE_CTRL1,  in rt5677_hw_params()
4057 		regmap_update_bits(rt5677->regmap, RT5677_I2S3_SDP,  in rt5677_hw_params()
4059 		regmap_update_bits(rt5677->regmap, RT5677_CLK_TREE_CTRL1,  in rt5677_hw_params()
4066 		regmap_update_bits(rt5677->regmap, RT5677_I2S4_SDP,  in rt5677_hw_params()
4068 		regmap_update_bits(rt5677->regmap, RT5677_CLK_TREE_CTRL1,  in rt5677_hw_params()
4124 		regmap_update_bits(rt5677->regmap, RT5677_I2S1_SDP,  in rt5677_set_dai_fmt()
4129 		regmap_update_bits(rt5677->regmap, RT5677_I2S2_SDP,  in rt5677_set_dai_fmt()
4134 		regmap_update_bits(rt5677->regmap, RT5677_I2S3_SDP,  in rt5677_set_dai_fmt()
4139 		regmap_update_bits(rt5677->regmap, RT5677_I2S4_SDP,  in rt5677_set_dai_fmt()
4175 	regmap_update_bits(rt5677->regmap, RT5677_GLB_CLK1,  in rt5677_set_dai_sysclk()
4221 		regmap_update_bits(rt5677->regmap, RT5677_GLB_CLK1,  in rt5677_set_dai_pll()
4228 		regmap_update_bits(rt5677->regmap, RT5677_GLB_CLK1,  in rt5677_set_dai_pll()
4237 			regmap_update_bits(rt5677->regmap, RT5677_GLB_CLK1,  in rt5677_set_dai_pll()
4241 			regmap_update_bits(rt5677->regmap, RT5677_GLB_CLK1,  in rt5677_set_dai_pll()
4245 			regmap_update_bits(rt5677->regmap, RT5677_GLB_CLK1,  in rt5677_set_dai_pll()
4249 			regmap_update_bits(rt5677->regmap, RT5677_GLB_CLK1,  in rt5677_set_dai_pll()
4271 	regmap_write(rt5677->regmap, RT5677_PLL1_CTRL1,  in rt5677_set_dai_pll()
4273 	regmap_write(rt5677->regmap, RT5677_PLL1_CTRL2,  in rt5677_set_dai_pll()
4328 		regmap_update_bits(rt5677->regmap, RT5677_TDM1_CTRL1, 0x1f00,  in rt5677_set_tdm_slot()
4330 		regmap_update_bits(rt5677->regmap, RT5677_DIG_MISC, 0x8000,  in rt5677_set_tdm_slot()
4334 		regmap_update_bits(rt5677->regmap, RT5677_TDM2_CTRL1, 0x1f00,  in rt5677_set_tdm_slot()
4336 		regmap_update_bits(rt5677->regmap, RT5677_DIG_MISC, 0x80,  in rt5677_set_tdm_slot()
4359 			regmap_update_bits(rt5677->regmap, RT5677_PWR_ANLG1,  in rt5677_set_bias_level()
4362 			regmap_update_bits(rt5677->regmap,  in rt5677_set_bias_level()
4365 			regmap_update_bits(rt5677->regmap, RT5677_PWR_ANLG1,  in rt5677_set_bias_level()
4372 			regmap_update_bits(rt5677->regmap, RT5677_PWR_ANLG2,  in rt5677_set_bias_level()
4374 			regmap_update_bits(rt5677->regmap, RT5677_DIG_MISC,  in rt5677_set_bias_level()
4383 		regmap_update_bits(rt5677->regmap, RT5677_DIG_MISC, 0x1, 0x0);  in rt5677_set_bias_level()
4384 		regmap_write(rt5677->regmap, RT5677_PWR_DIG1, 0x0000);  in rt5677_set_bias_level()
4385 		regmap_write(rt5677->regmap, RT5677_PWR_DIG2, 0x0000);  in rt5677_set_bias_level()
4386 		regmap_write(rt5677->regmap, RT5677_PWR_ANLG1, 0x0022);  in rt5677_set_bias_level()
4387 		regmap_write(rt5677->regmap, RT5677_PWR_ANLG2, 0x0000);  in rt5677_set_bias_level()
4388 		regmap_update_bits(rt5677->regmap,  in rt5677_set_bias_level()
4415 		regmap_update_bits(rt5677->regmap, RT5677_GPIO_CTRL2,  in rt5677_gpio_set()
4420 		regmap_update_bits(rt5677->regmap, RT5677_GPIO_CTRL3,  in rt5677_gpio_set()
4436 		regmap_update_bits(rt5677->regmap, RT5677_GPIO_CTRL2,  in rt5677_gpio_direction_out()
4442 		regmap_update_bits(rt5677->regmap, RT5677_GPIO_CTRL3,  in rt5677_gpio_direction_out()
4459 	ret = regmap_read(rt5677->regmap, RT5677_GPIO_ST, &value);  in rt5677_gpio_get()
4472 		regmap_update_bits(rt5677->regmap, RT5677_GPIO_CTRL2,  in rt5677_gpio_direction_in()
4477 		regmap_update_bits(rt5677->regmap, RT5677_GPIO_CTRL3,  in rt5677_gpio_direction_in()
4501 		regmap_update_bits(rt5677->regmap,  in rt5677_gpio_config()
4509 		regmap_update_bits(rt5677->regmap,  in rt5677_gpio_config()
4626 	regmap_write(rt5677->regmap, RT5677_DIG_MISC, 0x0020);  in rt5677_probe()
4627 	regmap_write(rt5677->regmap, RT5677_PWR_DSP2, 0x0c00);  in rt5677_probe()
4633 		regmap_update_bits(rt5677->regmap, RT5677_GPIO_CTRL1, 0x8000,  in rt5677_probe()
4635 		regmap_update_bits(rt5677->regmap, RT5677_DIG_MISC, 0x0018,  in rt5677_probe()
4639 			regmap_update_bits(rt5677->regmap, RT5677_JD_CTRL1,  in rt5677_probe()
4645 			regmap_update_bits(rt5677->regmap, RT5677_JD_CTRL1,  in rt5677_probe()
4651 			regmap_update_bits(rt5677->regmap, RT5677_JD_CTRL1,  in rt5677_probe()
4667 	regmap_write(rt5677->regmap, RT5677_RESET, 0x10ec);  in rt5677_remove()
4680 		regcache_cache_only(rt5677->regmap, true);  in rt5677_suspend()
4681 		regcache_mark_dirty(rt5677->regmap);  in rt5677_suspend()
4700 		regcache_cache_only(rt5677->regmap, false);  in rt5677_resume()
4701 		regcache_sync(rt5677->regmap);  in rt5677_resume()
4998 	ret = regmap_add_irq_chip(rt5677->regmap, i2c->irq,  in rt5677_init_irq()
5074 	rt5677->regmap = devm_regmap_init(&i2c->dev, NULL, i2c, &rt5677_regmap);  in rt5677_i2c_probe()
5075 	if (IS_ERR(rt5677->regmap)) {  in rt5677_i2c_probe()
5076 		ret = PTR_ERR(rt5677->regmap);  in rt5677_i2c_probe()
5082 	regmap_read(rt5677->regmap, RT5677_VENDOR_ID2, &val);  in rt5677_i2c_probe()
5089 	regmap_write(rt5677->regmap, RT5677_RESET, 0x10ec);  in rt5677_i2c_probe()
5091 	ret = regmap_register_patch(rt5677->regmap, init_list,  in rt5677_i2c_probe()
5097 		regmap_update_bits(rt5677->regmap, RT5677_IN1,  in rt5677_i2c_probe()
5101 		regmap_update_bits(rt5677->regmap, RT5677_IN1,  in rt5677_i2c_probe()
5105 		regmap_update_bits(rt5677->regmap, RT5677_LOUT1,  in rt5677_i2c_probe()
5109 		regmap_update_bits(rt5677->regmap, RT5677_LOUT1,  in rt5677_i2c_probe()
5113 		regmap_update_bits(rt5677->regmap, RT5677_LOUT1,  in rt5677_i2c_probe()
5117 		regmap_update_bits(rt5677->regmap, RT5677_GEN_CTRL2,  in rt5677_i2c_probe()
5120 		regmap_update_bits(rt5677->regmap, RT5677_GPIO_CTRL2,  in rt5677_i2c_probe()
5126 		regmap_update_bits(rt5677->regmap, RT5677_MICBIAS,  in rt5677_i2c_probe()