443 	unsigned int valFCR;		/* FIFO control */  member
677 		dma->valFCR |= BA0_FCR_FEN;  in snd_cs4281_trigger()
681 		dma->valFCR &= ~BA0_FCR_FEN;  in snd_cs4281_trigger()
688 		dma->valFCR |= BA0_FCR_FEN;  in snd_cs4281_trigger()
694 		dma->valFCR &= ~BA0_FCR_FEN;  in snd_cs4281_trigger()
697 			dma->valFCR &= ~BA0_FCR_FEN;  in snd_cs4281_trigger()
704 	snd_cs4281_pokeBA0(chip, dma->regFCR, dma->valFCR);  in snd_cs4281_trigger()
787 	dma->valFCR = BA0_FCR_LS(dma->left_slot) |  in snd_cs4281_mode()
791 	snd_cs4281_pokeBA0(chip, dma->regFCR, dma->valFCR | (capture ? BA0_FCR_PSH : 0));  in snd_cs4281_mode()
794 		snd_cs4281_pokeBA0(chip, dma->regFCR, dma->valFCR | BA0_FCR_FEN);  in snd_cs4281_mode()
1613 	chip->dma[0].valFCR = BA0_FCR_FEN | BA0_FCR_LS(0) |  in snd_cs4281_chip_init()
1617 	snd_cs4281_pokeBA0(chip, chip->dma[0].regFCR, chip->dma[0].valFCR);  in snd_cs4281_chip_init()