41 #define WRITEREG(value, addr) writel((value), chip->base_addr + (addr))  macro
55 	WRITEREG(0, IER);  in snd_aw2_saa7146_free()
58 	WRITEREG((MRST_N << 16), MC1);  in snd_aw2_saa7146_free()
97 	WRITEREG(0, IER);  in snd_aw2_saa7146_setup()
100 	WRITEREG((MRST_N << 16), MC1);  in snd_aw2_saa7146_setup()
122 	WRITEREG(acon1, ACON1);  in snd_aw2_saa7146_setup()
127 	WRITEREG(3 * (BurstA1_in) + 3 * (ThreshA1_in) +  in snd_aw2_saa7146_setup()
132 	WRITEREG((EAP << 16) | EAP, MC1);  in snd_aw2_saa7146_setup()
135 	WRITEREG((EI2C << 16) | EI2C, MC1);  in snd_aw2_saa7146_setup()
137 	WRITEREG(A1_out | A2_out | A1_in | IIC_S | IIC_E, IER);  in snd_aw2_saa7146_setup()
141 	WRITEREG(acon2, ACON2);  in snd_aw2_saa7146_setup()
148 		WRITEREG(tsl1[i], TSL1 + (i * 4));  in snd_aw2_saa7146_setup()
149 		WRITEREG(tsl2[i], TSL2 + (i * 4));  in snd_aw2_saa7146_setup()
186 		WRITEREG(dw_page, PageA2_out);  in snd_aw2_saa7146_pcm_init_playback()
191 		WRITEREG(dma_addr, BaseA2_out);  in snd_aw2_saa7146_pcm_init_playback()
194 		WRITEREG(dma_addr + buffer_size, ProtA2_out);  in snd_aw2_saa7146_pcm_init_playback()
197 		WRITEREG(dw_page, PageA1_out);  in snd_aw2_saa7146_pcm_init_playback()
202 		WRITEREG(dma_addr, BaseA1_out);  in snd_aw2_saa7146_pcm_init_playback()
205 		WRITEREG(dma_addr + buffer_size, ProtA1_out);  in snd_aw2_saa7146_pcm_init_playback()
243 		WRITEREG(dw_page, PageA1_in);  in snd_aw2_saa7146_pcm_init_capture()
248 		WRITEREG(dma_addr, BaseA1_in);  in snd_aw2_saa7146_pcm_init_capture()
251 		WRITEREG(dma_addr + buffer_size, ProtA1_in);  in snd_aw2_saa7146_pcm_init_capture()
292 		WRITEREG((TR_E_A2_OUT << 16) | TR_E_A2_OUT, MC1);  in snd_aw2_saa7146_pcm_trigger_start_playback()
296 		WRITEREG(acon1, ACON1);  in snd_aw2_saa7146_pcm_trigger_start_playback()
299 		WRITEREG((TR_E_A1_OUT << 16) | TR_E_A1_OUT, MC1);  in snd_aw2_saa7146_pcm_trigger_start_playback()
303 		WRITEREG(acon1, ACON1);  in snd_aw2_saa7146_pcm_trigger_start_playback()
315 		WRITEREG(acon1, ACON1);  in snd_aw2_saa7146_pcm_trigger_stop_playback()
317 		WRITEREG((TR_E_A2_OUT << 16), MC1);  in snd_aw2_saa7146_pcm_trigger_stop_playback()
321 		WRITEREG(acon1, ACON1);  in snd_aw2_saa7146_pcm_trigger_stop_playback()
323 		WRITEREG((TR_E_A1_OUT << 16), MC1);  in snd_aw2_saa7146_pcm_trigger_stop_playback()
333 		WRITEREG((TR_E_A1_IN << 16) | TR_E_A1_IN, MC1);  in snd_aw2_saa7146_pcm_trigger_start_capture()
340 		WRITEREG((TR_E_A1_IN << 16), MC1);  in snd_aw2_saa7146_pcm_trigger_stop_capture()
353 	WRITEREG(isr, ISR);  in snd_aw2_saa7146_interrupt()
357 		WRITEREG(0x100, IICSTA);  in snd_aw2_saa7146_interrupt()
437 		WRITEREG(0x40, GPIO_CTRL);  in snd_aw2_saa7146_use_digital_input()
439 		WRITEREG(0x50, GPIO_CTRL);  in snd_aw2_saa7146_use_digital_input()