258 struct pci_dev {  struct
259 	struct list_head bus_list;	/* node in per-bus list */
260 	struct pci_bus	*bus;		/* bus this device is on */
261 	struct pci_bus	*subordinate;	/* bus this device bridges to */
263 	void		*sysdata;	/* hook for sys-specific extension */
264 	struct proc_dir_entry *procent;	/* device entry in /proc/bus/pci */
265 	struct pci_slot	*slot;		/* Physical slot this device is in */
267 	unsigned int	devfn;		/* encoded device & function index */
268 	unsigned short	vendor;
269 	unsigned short	device;
270 	unsigned short	subsystem_vendor;
271 	unsigned short	subsystem_device;
272 	unsigned int	class;		/* 3 bytes: (base,sub,prog-if) */
273 	u8		revision;	/* PCI revision, low byte of class word */
274 	u8		hdr_type;	/* PCI header type (`multi' flag masked out) */
275 	u8		pcie_cap;	/* PCIe capability offset */
276 	u8		msi_cap;	/* MSI capability offset */
277 	u8		msix_cap;	/* MSI-X capability offset */
278 	u8		pcie_mpss:3;	/* PCIe Max Payload Size Supported */
279 	u8		rom_base_reg;	/* which config register controls the ROM */
280 	u8		pin;		/* which interrupt pin this device uses */
281 	u16		pcie_flags_reg;	/* cached PCIe Capabilities Register */
282 	u8		dma_alias_devfn;/* devfn of DMA alias, if any */
284 	struct pci_driver *driver;	/* which driver has allocated this device */
285 	u64		dma_mask;	/* Mask of the bits of bus address this
291 	struct device_dma_parameters dma_parms;
293 	pci_power_t     current_state;  /* Current operating state. In ACPI-speak,
296 	u8		pm_cap;		/* PM capability offset */
297 	unsigned int	pme_support:5;	/* Bitmask of states from which PME#
299 	unsigned int	pme_interrupt:1;
300 	unsigned int	pme_poll:1;	/* Poll device's PME status bit */
301 	unsigned int	d1_support:1;	/* Low power state D1 is supported */
302 	unsigned int	d2_support:1;	/* Low power state D2 is supported */
303 	unsigned int	no_d1d2:1;	/* D1 and D2 are forbidden */
304 	unsigned int	no_d3cold:1;	/* D3cold is forbidden */
305 	unsigned int	d3cold_allowed:1;	/* D3cold is allowed by user */
306 	unsigned int	mmio_always_on:1;	/* disallow turning off io/mem
308 	unsigned int	wakeup_prepared:1;
309 	unsigned int	runtime_d3cold:1;	/* whether go through runtime
313 	unsigned int	ignore_hotplug:1;	/* Ignore hotplug events */
314 	unsigned int	d3_delay;	/* D3->D0 transition time in ms */
315 	unsigned int	d3cold_delay;	/* D3cold->D0 transition time in ms */
318 	struct pcie_link_state	*link_state;	/* ASPM link state */
321 	pci_channel_state_t error_state;	/* current connectivity state */
322 	struct	device	dev;		/* Generic device interface */
324 	int		cfg_size;	/* Size of configuration space */
330 	unsigned int	irq;
331 	struct resource resource[DEVICE_COUNT_RESOURCE]; /* I/O and memory regions + expansion ROMs */
333 	bool match_driver;		/* Skip attaching driver */
335 	unsigned int	transparent:1;	/* Subtractive decode PCI bridge */
336 	unsigned int	multifunction:1;/* Part of multi-function device */
338 	unsigned int	is_added:1;
362 	pci_dev_flags_t dev_flags;  argument
379 		struct pci_dev *physfn;	/* the PF this VF is associated with */  argument
388 static inline struct pci_dev *pci_physfn(struct pci_dev *dev)  in pci_physfn()  argument
522 static inline bool pci_dev_msi_enabled(struct pci_dev *pci_dev)  in pci_dev_msi_enabled()
527 static inline bool pci_dev_msi_enabled(struct pci_dev *pci_dev) { return false; }  in pci_dev_msi_enabled()