Lines Matching refs:par
221 struct tmiofb_par *par = info->par; in tmiofb_irq() local
222 unsigned int bbisc = tmio_ioread16(par->lcr + LCR_BBISC); in tmiofb_irq()
225 tmio_iowrite16(bbisc, par->lcr + LCR_BBISC); in tmiofb_irq()
232 if (unlikely(par->use_polling && irq != -1)) { in tmiofb_irq()
234 par->use_polling = false; in tmiofb_irq()
238 wake_up(&par->wait_acc); in tmiofb_irq()
255 struct tmiofb_par *par = info->par; in tmiofb_hw_stop() local
257 tmio_iowrite16(0, par->ccr + CCR_UGCC); in tmiofb_hw_stop()
258 tmio_iowrite16(0, par->lcr + LCR_GM); in tmiofb_hw_stop()
260 tmio_iowrite16(0x0010, par->lcr + LCR_LCDCCRC); in tmiofb_hw_stop()
272 struct tmiofb_par *par = info->par; in tmiofb_hw_init() local
282 tmio_iowrite16(0x003a, par->ccr + CCR_UGCC); in tmiofb_hw_init()
283 tmio_iowrite16(0x003a, par->ccr + CCR_GCC); in tmiofb_hw_init()
284 tmio_iowrite16(0x3f00, par->ccr + CCR_USC); in tmiofb_hw_init()
288 tmio_iowrite16(0x0000, par->ccr + CCR_USC); in tmiofb_hw_init()
289 tmio_iowrite16(base >> 16, par->ccr + CCR_BASEH); in tmiofb_hw_init()
290 tmio_iowrite16(base, par->ccr + CCR_BASEL); in tmiofb_hw_init()
291 tmio_iowrite16(0x0002, par->ccr + CCR_CMD); /* base address enable */ in tmiofb_hw_init()
292 tmio_iowrite16(0x40a8, par->ccr + CCR_VRAMRTC); /* VRAMRC, VRAMTC */ in tmiofb_hw_init()
293 tmio_iowrite16(0x0018, par->ccr + CCR_VRAMSAC); /* VRAMSTS, VRAMAC */ in tmiofb_hw_init()
294 tmio_iowrite16(0x0002, par->ccr + CCR_VRAMBC); in tmiofb_hw_init()
296 tmio_iowrite16(0x000b, par->ccr + CCR_VRAMBC); in tmiofb_hw_init()
299 tmio_iowrite16(base >> 16, par->lcr + LCR_CFSAH); in tmiofb_hw_init()
300 tmio_iowrite16(base, par->lcr + LCR_CFSAL); in tmiofb_hw_init()
301 tmio_iowrite16(TMIOFB_FIFO_SIZE - 1, par->lcr + LCR_CFS); in tmiofb_hw_init()
302 tmio_iowrite16(1, par->lcr + LCR_CFC); in tmiofb_hw_init()
303 tmio_iowrite16(1, par->lcr + LCR_BBIE); in tmiofb_hw_init()
304 tmio_iowrite16(0, par->lcr + LCR_CFWS); in tmiofb_hw_init()
317 struct tmiofb_par *par = info->par; in tmiofb_hw_mode() local
320 tmio_iowrite16(0, par->lcr + LCR_GM); in tmiofb_hw_mode()
322 tmio_iowrite16(0x0010, par->lcr + LCR_LCDCCRC); in tmiofb_hw_mode()
326 tmio_iowrite16(info->fix.line_length, par->lcr + LCR_VHPN); in tmiofb_hw_mode()
327 tmio_iowrite16(0, par->lcr + LCR_GDSAH); in tmiofb_hw_mode()
328 tmio_iowrite16(0, par->lcr + LCR_GDSAL); in tmiofb_hw_mode()
329 tmio_iowrite16(info->fix.line_length >> 16, par->lcr + LCR_VHPCH); in tmiofb_hw_mode()
330 tmio_iowrite16(info->fix.line_length, par->lcr + LCR_VHPCL); in tmiofb_hw_mode()
331 tmio_iowrite16(i = 0, par->lcr + LCR_HSS); in tmiofb_hw_mode()
332 tmio_iowrite16(i += mode->hsync_len, par->lcr + LCR_HSE); in tmiofb_hw_mode()
333 tmio_iowrite16(i += mode->left_margin, par->lcr + LCR_HDS); in tmiofb_hw_mode()
334 tmio_iowrite16(i += mode->xres + mode->right_margin, par->lcr + LCR_HT); in tmiofb_hw_mode()
335 tmio_iowrite16(mode->xres, par->lcr + LCR_HNP); in tmiofb_hw_mode()
336 tmio_iowrite16(i = 0, par->lcr + LCR_VSS); in tmiofb_hw_mode()
337 tmio_iowrite16(i += mode->vsync_len, par->lcr + LCR_VSE); in tmiofb_hw_mode()
338 tmio_iowrite16(i += mode->upper_margin, par->lcr + LCR_VDS); in tmiofb_hw_mode()
339 tmio_iowrite16(i += mode->yres, par->lcr + LCR_ILN); in tmiofb_hw_mode()
340 tmio_iowrite16(i += mode->lower_margin, par->lcr + LCR_VT); in tmiofb_hw_mode()
341 tmio_iowrite16(3, par->lcr + LCR_MISC); /* RGB565 mode */ in tmiofb_hw_mode()
342 tmio_iowrite16(1, par->lcr + LCR_GM); /* VRAM enable */ in tmiofb_hw_mode()
343 tmio_iowrite16(0x4007, par->lcr + LCR_LCDCC); in tmiofb_hw_mode()
344 tmio_iowrite16(3, par->lcr + LCR_SP); /* sync polarity */ in tmiofb_hw_mode()
346 tmio_iowrite16(0x0010, par->lcr + LCR_LCDCCRC); in tmiofb_hw_mode()
348 tmio_iowrite16(0x0014, par->lcr + LCR_LCDCCRC); /* STOP_CKP */ in tmiofb_hw_mode()
350 tmio_iowrite16(0x0015, par->lcr + LCR_LCDCCRC); /* STOP_CKP|SOFT_RESET*/ in tmiofb_hw_mode()
351 tmio_iowrite16(0xfffa, par->lcr + LCR_VCS); in tmiofb_hw_mode()
360 struct tmiofb_par *par = info->par; in tmiofb_acc_wait() local
366 if (irqs_disabled() || par->use_polling) { in tmiofb_acc_wait()
368 while (tmio_ioread16(par->lcr + LCR_CCS) > ccs) { in tmiofb_acc_wait()
379 if (!wait_event_interruptible_timeout(par->wait_acc, in tmiofb_acc_wait()
380 tmio_ioread16(par->lcr + LCR_CCS) <= ccs, in tmiofb_acc_wait()
396 struct tmiofb_par *par = info->par; in tmiofb_acc_write() local
404 tmio_iowrite16(*cmd >> 16, par->lcr + LCR_CMDH); in tmiofb_acc_write()
405 tmio_iowrite16(*cmd, par->lcr + LCR_CMDL); in tmiofb_acc_write()
417 struct tmiofb_par *par = fbi->par; in tmiofb_sync() local
424 while (tmio_ioread16(par->lcr + LCR_BBES) & 2) { /* blit active */ in tmiofb_sync()
493 struct tmiofb_par *par = fbi->par; in tmiofb_vblank() local
495 unsigned int vcount = tmio_ioread16(par->lcr + LCR_CDLN); in tmiofb_vblank()
635 struct tmiofb_par *par = info->par; in tmiofb_setcolreg() local
637 if (regno < ARRAY_SIZE(par->pseudo_palette)) { in tmiofb_setcolreg()
638 par->pseudo_palette[regno] = in tmiofb_setcolreg()
687 struct tmiofb_par *par; in tmiofb_probe() local
707 par = info->par; in tmiofb_probe()
710 init_waitqueue_head(&par->wait_acc); in tmiofb_probe()
712 par->use_polling = true; in tmiofb_probe()
731 info->pseudo_palette = par->pseudo_palette; in tmiofb_probe()
733 par->ccr = ioremap(ccr->start, resource_size(ccr)); in tmiofb_probe()
734 if (!par->ccr) { in tmiofb_probe()
739 par->lcr = ioremap(info->fix.mmio_start, info->fix.mmio_len); in tmiofb_probe()
740 if (!par->lcr) { in tmiofb_probe()
800 iounmap(par->lcr); in tmiofb_probe()
802 iounmap(par->ccr); in tmiofb_probe()
813 struct tmiofb_par *par; in tmiofb_remove() local
816 par = info->par; in tmiofb_remove()
827 iounmap(par->lcr); in tmiofb_remove()
828 iounmap(par->ccr); in tmiofb_remove()
840 struct tmiofb_par *par = info->par; in tmiofb_dump_regs() local
844 tmio_ioread16(par->ccr + CCR_ ## n)); in tmiofb_dump_regs()
859 tmio_ioread16(par->lcr + LCR_ ## n)); in tmiofb_dump_regs()
936 struct tmiofb_par *par = info->par; in tmiofb_suspend() local
955 par->use_polling = true; in tmiofb_suspend()