242 	u32 dc_ctrl, dc_sts;  in ufx_blank()  local
248 	status = ufx_reg_read(dev, 0x2000, &dc_ctrl);  in ufx_blank()
252 	if ((dc_sts & 0x00000100) || (dc_ctrl & 0x00000100))  in ufx_blank()
256 	dc_ctrl |= 0x00000100;  in ufx_blank()
257 	status = ufx_reg_write(dev, 0x2000, dc_ctrl);  in ufx_blank()
279 	u32 dc_ctrl, dc_sts;  in ufx_unblank()  local
285 	status = ufx_reg_read(dev, 0x2000, &dc_ctrl);  in ufx_unblank()
289 	if (((dc_sts & 0x00000100) == 0) || ((dc_ctrl & 0x00000100) == 0))  in ufx_unblank()
293 	dc_ctrl &= ~0x00000100;  in ufx_unblank()
294 	status = ufx_reg_write(dev, 0x2000, dc_ctrl);  in ufx_unblank()
316 	u32 dc_ctrl, dc_sts;  in ufx_disable()  local
322 	status = ufx_reg_read(dev, 0x2000, &dc_ctrl);  in ufx_disable()
326 	if (((dc_sts & 0x00000001) == 0) || ((dc_ctrl & 0x00000001) == 0))  in ufx_disable()
330 	dc_ctrl &= ~(0x00000001);  in ufx_disable()
331 	status = ufx_reg_write(dev, 0x2000, dc_ctrl);  in ufx_disable()
353 	u32 dc_ctrl, dc_sts;  in ufx_enable()  local
359 	status = ufx_reg_read(dev, 0x2000, &dc_ctrl);  in ufx_enable()
363 	if ((dc_sts & 0x00000001) || (dc_ctrl & 0x00000001))  in ufx_enable()
367 	dc_ctrl |= 0x00000001;  in ufx_enable()
368 	status = ufx_reg_write(dev, 0x2000, dc_ctrl);  in ufx_enable()