Lines Matching refs:par
85 static void vgaHWSeqReset(struct savagefb_par *par, int start) in vgaHWSeqReset() argument
88 VGAwSEQ(0x00, 0x01, par); /* Synchronous Reset */ in vgaHWSeqReset()
90 VGAwSEQ(0x00, 0x03, par); /* End Reset */ in vgaHWSeqReset()
93 static void vgaHWProtect(struct savagefb_par *par, int on) in vgaHWProtect() argument
101 tmp = VGArSEQ(0x01, par); in vgaHWProtect()
103 vgaHWSeqReset(par, 1); /* start synchronous reset */ in vgaHWProtect()
104 VGAwSEQ(0x01, tmp | 0x20, par);/* disable the display */ in vgaHWProtect()
106 VGAenablePalette(par); in vgaHWProtect()
112 tmp = VGArSEQ(0x01, par); in vgaHWProtect()
114 VGAwSEQ(0x01, tmp & ~0x20, par);/* reenable display */ in vgaHWProtect()
115 vgaHWSeqReset(par, 0); /* clear synchronous reset */ in vgaHWProtect()
117 VGAdisablePalette(par); in vgaHWProtect()
121 static void vgaHWRestore(struct savagefb_par *par, struct savage_reg *reg) in vgaHWRestore() argument
125 VGAwMISC(reg->MiscOutReg, par); in vgaHWRestore()
128 VGAwSEQ(i, reg->Sequencer[i], par); in vgaHWRestore()
132 VGAwCR(17, reg->CRTC[17] & ~0x80, par); in vgaHWRestore()
135 VGAwCR(i, reg->CRTC[i], par); in vgaHWRestore()
138 VGAwGR(i, reg->Graphics[i], par); in vgaHWRestore()
140 VGAenablePalette(par); in vgaHWRestore()
143 VGAwATTR(i, reg->Attribute[i], par); in vgaHWRestore()
145 VGAdisablePalette(par); in vgaHWRestore()
149 struct savagefb_par *par, in vgaHWInit() argument
262 savage3D_waitfifo(struct savagefb_par *par, int space) in savage3D_waitfifo() argument
266 while ((savage_in32(0x48C00, par) & 0x0000ffff) > slots); in savage3D_waitfifo()
270 savage4_waitfifo(struct savagefb_par *par, int space) in savage4_waitfifo() argument
274 while ((savage_in32(0x48C60, par) & 0x001fffff) > slots); in savage4_waitfifo()
278 savage2000_waitfifo(struct savagefb_par *par, int space) in savage2000_waitfifo() argument
282 while ((savage_in32(0x48C60, par) & 0x0000ffff) > slots); in savage2000_waitfifo()
287 savage3D_waitidle(struct savagefb_par *par) in savage3D_waitidle() argument
289 while ((savage_in32(0x48C00, par) & 0x0008ffff) != 0x80000); in savage3D_waitidle()
293 savage4_waitidle(struct savagefb_par *par) in savage4_waitidle() argument
295 while ((savage_in32(0x48C60, par) & 0x00a00000) != 0x00a00000); in savage4_waitidle()
299 savage2000_waitidle(struct savagefb_par *par) in savage2000_waitidle() argument
301 while ((savage_in32(0x48C60, par) & 0x009fffff)); in savage2000_waitidle()
306 SavageSetup2DEngine(struct savagefb_par *par) in SavageSetup2DEngine() argument
311 BCI_BD_SET_BPP(GlobalBitmapDescriptor, par->depth); in SavageSetup2DEngine()
312 BCI_BD_SET_STRIDE(GlobalBitmapDescriptor, par->vwidth); in SavageSetup2DEngine()
314 switch(par->chip) { in SavageSetup2DEngine()
318 savage_out32(0x48C18, savage_in32(0x48C18, par) & 0x3FF0, par); in SavageSetup2DEngine()
321 (par->cob_offset >> 11) | (par->cob_index << 29), in SavageSetup2DEngine()
322 par); in SavageSetup2DEngine()
324 savage_out32(0x48C10, 0x78207220, par); in SavageSetup2DEngine()
325 savage_out32(0x48C0C, 0, par); in SavageSetup2DEngine()
327 savage_out32(0x48C18, savage_in32(0x48C18, par) | 0x0C, par); in SavageSetup2DEngine()
335 savage_out32(0x48C18, savage_in32(0x48C18, par) & 0x3FF0, par); in SavageSetup2DEngine()
337 savage_out32(0x48C10, 0x00700040, par); in SavageSetup2DEngine()
338 savage_out32(0x48C0C, 0, par); in SavageSetup2DEngine()
340 savage_out32(0x48C18, savage_in32(0x48C18, par) | 0x08, par); in SavageSetup2DEngine()
344 savage_out32(0x48C18, 0, par); in SavageSetup2DEngine()
347 (par->cob_offset >> 7) | (par->cob_index), in SavageSetup2DEngine()
348 par); in SavageSetup2DEngine()
350 savage_out32(0x48A30, 0, par); in SavageSetup2DEngine()
352 savage_out32(0x48C18, savage_in32(0x48C18, par) | 0x00280000, in SavageSetup2DEngine()
353 par); in SavageSetup2DEngine()
359 vga_out8(0x3d4, 0x31, par); in SavageSetup2DEngine()
360 vga_out8(0x3d5, 0x0c, par); in SavageSetup2DEngine()
363 vga_out8(0x3d4, 0x50, par); in SavageSetup2DEngine()
364 vga_out8(0x3d5, vga_in8(0x3d5, par) | 0xC1, par); in SavageSetup2DEngine()
367 vga_out8(0x3d4, 0x40, par); in SavageSetup2DEngine()
368 vga_out8(0x3d5, 0x01, par); in SavageSetup2DEngine()
370 savage_out32(MONO_PAT_0, ~0, par); in SavageSetup2DEngine()
371 savage_out32(MONO_PAT_1, ~0, par); in SavageSetup2DEngine()
374 savage_out32(0x8128, ~0, par); /* enable all write planes */ in SavageSetup2DEngine()
375 savage_out32(0x812C, ~0, par); /* enable all read planes */ in SavageSetup2DEngine()
376 savage_out16(0x8134, 0x27, par); in SavageSetup2DEngine()
377 savage_out16(0x8136, 0x07, par); in SavageSetup2DEngine()
380 par->bci_ptr = 0; in SavageSetup2DEngine()
381 par->SavageWaitFifo(par, 4); in SavageSetup2DEngine()
393 par->bci_ptr = 0; in SavageSetup2DEngine()
394 par->SavageWaitFifo(par, 4); in SavageSetup2DEngine()
404 struct savagefb_par *par = info->par; in savagefb_set_clip() local
408 par->bci_ptr = 0; in savagefb_set_clip()
409 par->SavageWaitFifo(par,3); in savagefb_set_clip()
415 static void SavageSetup2DEngine(struct savagefb_par *par) {} in SavageSetup2DEngine() argument
512 static void SavagePrintRegs(struct savagefb_par *par) in SavagePrintRegs() argument
524 vga_out8(0x3c4, i, par); in SavagePrintRegs()
525 printk(KERN_DEBUG " %02x", vga_in8(0x3c5, par)); in SavagePrintRegs()
534 vga_out8(vgaCRIndex, i, par); in SavagePrintRegs()
535 printk(KERN_DEBUG " %02x", vga_in8(vgaCRReg, par)); in SavagePrintRegs()
544 static void savage_get_default_par(struct savagefb_par *par, struct savage_reg *reg) in savage_get_default_par() argument
548 vga_out16(0x3d4, 0x4838, par); in savage_get_default_par()
549 vga_out16(0x3d4, 0xa039, par); in savage_get_default_par()
550 vga_out16(0x3c4, 0x0608, par); in savage_get_default_par()
552 vga_out8(0x3d4, 0x66, par); in savage_get_default_par()
553 cr66 = vga_in8(0x3d5, par); in savage_get_default_par()
554 vga_out8(0x3d5, cr66 | 0x80, par); in savage_get_default_par()
555 vga_out8(0x3d4, 0x3a, par); in savage_get_default_par()
556 cr3a = vga_in8(0x3d5, par); in savage_get_default_par()
557 vga_out8(0x3d5, cr3a | 0x80, par); in savage_get_default_par()
558 vga_out8(0x3d4, 0x53, par); in savage_get_default_par()
559 cr53 = vga_in8(0x3d5, par); in savage_get_default_par()
560 vga_out8(0x3d5, cr53 & 0x7f, par); in savage_get_default_par()
562 vga_out8(0x3d4, 0x66, par); in savage_get_default_par()
563 vga_out8(0x3d5, cr66, par); in savage_get_default_par()
564 vga_out8(0x3d4, 0x3a, par); in savage_get_default_par()
565 vga_out8(0x3d5, cr3a, par); in savage_get_default_par()
567 vga_out8(0x3d4, 0x66, par); in savage_get_default_par()
568 vga_out8(0x3d5, cr66, par); in savage_get_default_par()
569 vga_out8(0x3d4, 0x3a, par); in savage_get_default_par()
570 vga_out8(0x3d5, cr3a, par); in savage_get_default_par()
573 vga_out8(0x3c4, 0x08, par); in savage_get_default_par()
574 reg->SR08 = vga_in8(0x3c5, par); in savage_get_default_par()
575 vga_out8(0x3c5, 0x06, par); in savage_get_default_par()
578 vga_out8(0x3d4, 0x31, par); in savage_get_default_par()
579 reg->CR31 = vga_in8(0x3d5, par); in savage_get_default_par()
580 vga_out8(0x3d4, 0x32, par); in savage_get_default_par()
581 reg->CR32 = vga_in8(0x3d5, par); in savage_get_default_par()
582 vga_out8(0x3d4, 0x34, par); in savage_get_default_par()
583 reg->CR34 = vga_in8(0x3d5, par); in savage_get_default_par()
584 vga_out8(0x3d4, 0x36, par); in savage_get_default_par()
585 reg->CR36 = vga_in8(0x3d5, par); in savage_get_default_par()
586 vga_out8(0x3d4, 0x3a, par); in savage_get_default_par()
587 reg->CR3A = vga_in8(0x3d5, par); in savage_get_default_par()
588 vga_out8(0x3d4, 0x40, par); in savage_get_default_par()
589 reg->CR40 = vga_in8(0x3d5, par); in savage_get_default_par()
590 vga_out8(0x3d4, 0x42, par); in savage_get_default_par()
591 reg->CR42 = vga_in8(0x3d5, par); in savage_get_default_par()
592 vga_out8(0x3d4, 0x45, par); in savage_get_default_par()
593 reg->CR45 = vga_in8(0x3d5, par); in savage_get_default_par()
594 vga_out8(0x3d4, 0x50, par); in savage_get_default_par()
595 reg->CR50 = vga_in8(0x3d5, par); in savage_get_default_par()
596 vga_out8(0x3d4, 0x51, par); in savage_get_default_par()
597 reg->CR51 = vga_in8(0x3d5, par); in savage_get_default_par()
598 vga_out8(0x3d4, 0x53, par); in savage_get_default_par()
599 reg->CR53 = vga_in8(0x3d5, par); in savage_get_default_par()
600 vga_out8(0x3d4, 0x58, par); in savage_get_default_par()
601 reg->CR58 = vga_in8(0x3d5, par); in savage_get_default_par()
602 vga_out8(0x3d4, 0x60, par); in savage_get_default_par()
603 reg->CR60 = vga_in8(0x3d5, par); in savage_get_default_par()
604 vga_out8(0x3d4, 0x66, par); in savage_get_default_par()
605 reg->CR66 = vga_in8(0x3d5, par); in savage_get_default_par()
606 vga_out8(0x3d4, 0x67, par); in savage_get_default_par()
607 reg->CR67 = vga_in8(0x3d5, par); in savage_get_default_par()
608 vga_out8(0x3d4, 0x68, par); in savage_get_default_par()
609 reg->CR68 = vga_in8(0x3d5, par); in savage_get_default_par()
610 vga_out8(0x3d4, 0x69, par); in savage_get_default_par()
611 reg->CR69 = vga_in8(0x3d5, par); in savage_get_default_par()
612 vga_out8(0x3d4, 0x6f, par); in savage_get_default_par()
613 reg->CR6F = vga_in8(0x3d5, par); in savage_get_default_par()
615 vga_out8(0x3d4, 0x33, par); in savage_get_default_par()
616 reg->CR33 = vga_in8(0x3d5, par); in savage_get_default_par()
617 vga_out8(0x3d4, 0x86, par); in savage_get_default_par()
618 reg->CR86 = vga_in8(0x3d5, par); in savage_get_default_par()
619 vga_out8(0x3d4, 0x88, par); in savage_get_default_par()
620 reg->CR88 = vga_in8(0x3d5, par); in savage_get_default_par()
621 vga_out8(0x3d4, 0x90, par); in savage_get_default_par()
622 reg->CR90 = vga_in8(0x3d5, par); in savage_get_default_par()
623 vga_out8(0x3d4, 0x91, par); in savage_get_default_par()
624 reg->CR91 = vga_in8(0x3d5, par); in savage_get_default_par()
625 vga_out8(0x3d4, 0xb0, par); in savage_get_default_par()
626 reg->CRB0 = vga_in8(0x3d5, par) | 0x80; in savage_get_default_par()
629 vga_out8(0x3d4, 0x3b, par); in savage_get_default_par()
630 reg->CR3B = vga_in8(0x3d5, par); in savage_get_default_par()
631 vga_out8(0x3d4, 0x3c, par); in savage_get_default_par()
632 reg->CR3C = vga_in8(0x3d5, par); in savage_get_default_par()
633 vga_out8(0x3d4, 0x43, par); in savage_get_default_par()
634 reg->CR43 = vga_in8(0x3d5, par); in savage_get_default_par()
635 vga_out8(0x3d4, 0x5d, par); in savage_get_default_par()
636 reg->CR5D = vga_in8(0x3d5, par); in savage_get_default_par()
637 vga_out8(0x3d4, 0x5e, par); in savage_get_default_par()
638 reg->CR5E = vga_in8(0x3d5, par); in savage_get_default_par()
639 vga_out8(0x3d4, 0x65, par); in savage_get_default_par()
640 reg->CR65 = vga_in8(0x3d5, par); in savage_get_default_par()
643 vga_out8(0x3c4, 0x0e, par); in savage_get_default_par()
644 reg->SR0E = vga_in8(0x3c5, par); in savage_get_default_par()
645 vga_out8(0x3c4, 0x0f, par); in savage_get_default_par()
646 reg->SR0F = vga_in8(0x3c5, par); in savage_get_default_par()
647 vga_out8(0x3c4, 0x10, par); in savage_get_default_par()
648 reg->SR10 = vga_in8(0x3c5, par); in savage_get_default_par()
649 vga_out8(0x3c4, 0x11, par); in savage_get_default_par()
650 reg->SR11 = vga_in8(0x3c5, par); in savage_get_default_par()
651 vga_out8(0x3c4, 0x12, par); in savage_get_default_par()
652 reg->SR12 = vga_in8(0x3c5, par); in savage_get_default_par()
653 vga_out8(0x3c4, 0x13, par); in savage_get_default_par()
654 reg->SR13 = vga_in8(0x3c5, par); in savage_get_default_par()
655 vga_out8(0x3c4, 0x29, par); in savage_get_default_par()
656 reg->SR29 = vga_in8(0x3c5, par); in savage_get_default_par()
658 vga_out8(0x3c4, 0x15, par); in savage_get_default_par()
659 reg->SR15 = vga_in8(0x3c5, par); in savage_get_default_par()
660 vga_out8(0x3c4, 0x30, par); in savage_get_default_par()
661 reg->SR30 = vga_in8(0x3c5, par); in savage_get_default_par()
662 vga_out8(0x3c4, 0x18, par); in savage_get_default_par()
663 reg->SR18 = vga_in8(0x3c5, par); in savage_get_default_par()
666 if (par->chip == S3_SAVAGE_MX) { in savage_get_default_par()
670 vga_out8(0x3c4, 0x54+i, par); in savage_get_default_par()
671 reg->SR54[i] = vga_in8(0x3c5, par); in savage_get_default_par()
675 vga_out8(0x3d4, 0x66, par); in savage_get_default_par()
676 cr66 = vga_in8(0x3d5, par); in savage_get_default_par()
677 vga_out8(0x3d5, cr66 | 0x80, par); in savage_get_default_par()
678 vga_out8(0x3d4, 0x3a, par); in savage_get_default_par()
679 cr3a = vga_in8(0x3d5, par); in savage_get_default_par()
680 vga_out8(0x3d5, cr3a | 0x80, par); in savage_get_default_par()
683 if (par->chip != S3_SAVAGE_MX) { in savage_get_default_par()
684 reg->MMPR0 = savage_in32(FIFO_CONTROL_REG, par); in savage_get_default_par()
685 reg->MMPR1 = savage_in32(MIU_CONTROL_REG, par); in savage_get_default_par()
686 reg->MMPR2 = savage_in32(STREAMS_TIMEOUT_REG, par); in savage_get_default_par()
687 reg->MMPR3 = savage_in32(MISC_TIMEOUT_REG, par); in savage_get_default_par()
690 vga_out8(0x3d4, 0x3a, par); in savage_get_default_par()
691 vga_out8(0x3d5, cr3a, par); in savage_get_default_par()
692 vga_out8(0x3d4, 0x66, par); in savage_get_default_par()
693 vga_out8(0x3d5, cr66, par); in savage_get_default_par()
696 static void savage_set_default_par(struct savagefb_par *par, in savage_set_default_par() argument
701 vga_out16(0x3d4, 0x4838, par); in savage_set_default_par()
702 vga_out16(0x3d4, 0xa039, par); in savage_set_default_par()
703 vga_out16(0x3c4, 0x0608, par); in savage_set_default_par()
705 vga_out8(0x3d4, 0x66, par); in savage_set_default_par()
706 cr66 = vga_in8(0x3d5, par); in savage_set_default_par()
707 vga_out8(0x3d5, cr66 | 0x80, par); in savage_set_default_par()
708 vga_out8(0x3d4, 0x3a, par); in savage_set_default_par()
709 cr3a = vga_in8(0x3d5, par); in savage_set_default_par()
710 vga_out8(0x3d5, cr3a | 0x80, par); in savage_set_default_par()
711 vga_out8(0x3d4, 0x53, par); in savage_set_default_par()
712 cr53 = vga_in8(0x3d5, par); in savage_set_default_par()
713 vga_out8(0x3d5, cr53 & 0x7f, par); in savage_set_default_par()
715 vga_out8(0x3d4, 0x66, par); in savage_set_default_par()
716 vga_out8(0x3d5, cr66, par); in savage_set_default_par()
717 vga_out8(0x3d4, 0x3a, par); in savage_set_default_par()
718 vga_out8(0x3d5, cr3a, par); in savage_set_default_par()
720 vga_out8(0x3d4, 0x66, par); in savage_set_default_par()
721 vga_out8(0x3d5, cr66, par); in savage_set_default_par()
722 vga_out8(0x3d4, 0x3a, par); in savage_set_default_par()
723 vga_out8(0x3d5, cr3a, par); in savage_set_default_par()
726 vga_out8(0x3c4, 0x08, par); in savage_set_default_par()
727 vga_out8(0x3c5, reg->SR08, par); in savage_set_default_par()
728 vga_out8(0x3c5, 0x06, par); in savage_set_default_par()
731 vga_out8(0x3d4, 0x31, par); in savage_set_default_par()
732 vga_out8(0x3d5, reg->CR31, par); in savage_set_default_par()
733 vga_out8(0x3d4, 0x32, par); in savage_set_default_par()
734 vga_out8(0x3d5, reg->CR32, par); in savage_set_default_par()
735 vga_out8(0x3d4, 0x34, par); in savage_set_default_par()
736 vga_out8(0x3d5, reg->CR34, par); in savage_set_default_par()
737 vga_out8(0x3d4, 0x36, par); in savage_set_default_par()
738 vga_out8(0x3d5,reg->CR36, par); in savage_set_default_par()
739 vga_out8(0x3d4, 0x3a, par); in savage_set_default_par()
740 vga_out8(0x3d5, reg->CR3A, par); in savage_set_default_par()
741 vga_out8(0x3d4, 0x40, par); in savage_set_default_par()
742 vga_out8(0x3d5, reg->CR40, par); in savage_set_default_par()
743 vga_out8(0x3d4, 0x42, par); in savage_set_default_par()
744 vga_out8(0x3d5, reg->CR42, par); in savage_set_default_par()
745 vga_out8(0x3d4, 0x45, par); in savage_set_default_par()
746 vga_out8(0x3d5, reg->CR45, par); in savage_set_default_par()
747 vga_out8(0x3d4, 0x50, par); in savage_set_default_par()
748 vga_out8(0x3d5, reg->CR50, par); in savage_set_default_par()
749 vga_out8(0x3d4, 0x51, par); in savage_set_default_par()
750 vga_out8(0x3d5, reg->CR51, par); in savage_set_default_par()
751 vga_out8(0x3d4, 0x53, par); in savage_set_default_par()
752 vga_out8(0x3d5, reg->CR53, par); in savage_set_default_par()
753 vga_out8(0x3d4, 0x58, par); in savage_set_default_par()
754 vga_out8(0x3d5, reg->CR58, par); in savage_set_default_par()
755 vga_out8(0x3d4, 0x60, par); in savage_set_default_par()
756 vga_out8(0x3d5, reg->CR60, par); in savage_set_default_par()
757 vga_out8(0x3d4, 0x66, par); in savage_set_default_par()
758 vga_out8(0x3d5, reg->CR66, par); in savage_set_default_par()
759 vga_out8(0x3d4, 0x67, par); in savage_set_default_par()
760 vga_out8(0x3d5, reg->CR67, par); in savage_set_default_par()
761 vga_out8(0x3d4, 0x68, par); in savage_set_default_par()
762 vga_out8(0x3d5, reg->CR68, par); in savage_set_default_par()
763 vga_out8(0x3d4, 0x69, par); in savage_set_default_par()
764 vga_out8(0x3d5, reg->CR69, par); in savage_set_default_par()
765 vga_out8(0x3d4, 0x6f, par); in savage_set_default_par()
766 vga_out8(0x3d5, reg->CR6F, par); in savage_set_default_par()
768 vga_out8(0x3d4, 0x33, par); in savage_set_default_par()
769 vga_out8(0x3d5, reg->CR33, par); in savage_set_default_par()
770 vga_out8(0x3d4, 0x86, par); in savage_set_default_par()
771 vga_out8(0x3d5, reg->CR86, par); in savage_set_default_par()
772 vga_out8(0x3d4, 0x88, par); in savage_set_default_par()
773 vga_out8(0x3d5, reg->CR88, par); in savage_set_default_par()
774 vga_out8(0x3d4, 0x90, par); in savage_set_default_par()
775 vga_out8(0x3d5, reg->CR90, par); in savage_set_default_par()
776 vga_out8(0x3d4, 0x91, par); in savage_set_default_par()
777 vga_out8(0x3d5, reg->CR91, par); in savage_set_default_par()
778 vga_out8(0x3d4, 0xb0, par); in savage_set_default_par()
779 vga_out8(0x3d5, reg->CRB0, par); in savage_set_default_par()
782 vga_out8(0x3d4, 0x3b, par); in savage_set_default_par()
783 vga_out8(0x3d5, reg->CR3B, par); in savage_set_default_par()
784 vga_out8(0x3d4, 0x3c, par); in savage_set_default_par()
785 vga_out8(0x3d5, reg->CR3C, par); in savage_set_default_par()
786 vga_out8(0x3d4, 0x43, par); in savage_set_default_par()
787 vga_out8(0x3d5, reg->CR43, par); in savage_set_default_par()
788 vga_out8(0x3d4, 0x5d, par); in savage_set_default_par()
789 vga_out8(0x3d5, reg->CR5D, par); in savage_set_default_par()
790 vga_out8(0x3d4, 0x5e, par); in savage_set_default_par()
791 vga_out8(0x3d5, reg->CR5E, par); in savage_set_default_par()
792 vga_out8(0x3d4, 0x65, par); in savage_set_default_par()
793 vga_out8(0x3d5, reg->CR65, par); in savage_set_default_par()
796 vga_out8(0x3c4, 0x0e, par); in savage_set_default_par()
797 vga_out8(0x3c5, reg->SR0E, par); in savage_set_default_par()
798 vga_out8(0x3c4, 0x0f, par); in savage_set_default_par()
799 vga_out8(0x3c5, reg->SR0F, par); in savage_set_default_par()
800 vga_out8(0x3c4, 0x10, par); in savage_set_default_par()
801 vga_out8(0x3c5, reg->SR10, par); in savage_set_default_par()
802 vga_out8(0x3c4, 0x11, par); in savage_set_default_par()
803 vga_out8(0x3c5, reg->SR11, par); in savage_set_default_par()
804 vga_out8(0x3c4, 0x12, par); in savage_set_default_par()
805 vga_out8(0x3c5, reg->SR12, par); in savage_set_default_par()
806 vga_out8(0x3c4, 0x13, par); in savage_set_default_par()
807 vga_out8(0x3c5, reg->SR13, par); in savage_set_default_par()
808 vga_out8(0x3c4, 0x29, par); in savage_set_default_par()
809 vga_out8(0x3c5, reg->SR29, par); in savage_set_default_par()
811 vga_out8(0x3c4, 0x15, par); in savage_set_default_par()
812 vga_out8(0x3c5, reg->SR15, par); in savage_set_default_par()
813 vga_out8(0x3c4, 0x30, par); in savage_set_default_par()
814 vga_out8(0x3c5, reg->SR30, par); in savage_set_default_par()
815 vga_out8(0x3c4, 0x18, par); in savage_set_default_par()
816 vga_out8(0x3c5, reg->SR18, par); in savage_set_default_par()
819 if (par->chip == S3_SAVAGE_MX) { in savage_set_default_par()
823 vga_out8(0x3c4, 0x54+i, par); in savage_set_default_par()
824 vga_out8(0x3c5, reg->SR54[i], par); in savage_set_default_par()
828 vga_out8(0x3d4, 0x66, par); in savage_set_default_par()
829 cr66 = vga_in8(0x3d5, par); in savage_set_default_par()
830 vga_out8(0x3d5, cr66 | 0x80, par); in savage_set_default_par()
831 vga_out8(0x3d4, 0x3a, par); in savage_set_default_par()
832 cr3a = vga_in8(0x3d5, par); in savage_set_default_par()
833 vga_out8(0x3d5, cr3a | 0x80, par); in savage_set_default_par()
836 if (par->chip != S3_SAVAGE_MX) { in savage_set_default_par()
837 savage_out32(FIFO_CONTROL_REG, reg->MMPR0, par); in savage_set_default_par()
838 savage_out32(MIU_CONTROL_REG, reg->MMPR1, par); in savage_set_default_par()
839 savage_out32(STREAMS_TIMEOUT_REG, reg->MMPR2, par); in savage_set_default_par()
840 savage_out32(MISC_TIMEOUT_REG, reg->MMPR3, par); in savage_set_default_par()
843 vga_out8(0x3d4, 0x3a, par); in savage_set_default_par()
844 vga_out8(0x3d5, cr3a, par); in savage_set_default_par()
845 vga_out8(0x3d4, 0x66, par); in savage_set_default_par()
846 vga_out8(0x3d5, cr66, par); in savage_set_default_par()
871 struct savagefb_par *par = info->par; in savagefb_check_var() local
932 if (par->SavagePanelWidth && in savagefb_check_var()
933 (var->xres > par->SavagePanelWidth || in savagefb_check_var()
934 var->yres > par->SavagePanelHeight)) { in savagefb_check_var()
937 par->SavagePanelWidth, in savagefb_check_var()
938 par->SavagePanelHeight); in savagefb_check_var()
974 struct savagefb_par *par, in savagefb_decode_var() argument
1003 par->depth = var->bits_per_pixel; in savagefb_decode_var()
1004 par->vwidth = var->xres_virtual; in savagefb_decode_var()
1006 if (var->bits_per_pixel == 16 && par->chip == S3_SAVAGE3D) { in savagefb_decode_var()
1017 vgaHWInit(var, par, &timings, reg); in savagefb_decode_var()
1026 if ((par->chip == S3_SAVAGE2000) && (dclk >= 230000)) in savagefb_decode_var()
1032 if (S3_SAVAGE_MOBILE_SERIES(par->chip) || in savagefb_decode_var()
1033 ((par->chip == S3_SAVAGE2000) && (dclk >= 230000))) in savagefb_decode_var()
1039 if (S3_SAVAGE_MOBILE_SERIES(par->chip) || in savagefb_decode_var()
1040 ((par->chip == S3_SAVAGE2000) && (dclk >= 230000))) in savagefb_decode_var()
1058 vga_out8(0x3d4, 0x3a, par); in savagefb_decode_var()
1059 tmp = vga_in8(0x3d5, par); in savagefb_decode_var()
1069 vga_out8(0x3d4, 0x58, par); in savagefb_decode_var()
1070 reg->CR58 = vga_in8(0x3d5, par) & 0x80; in savagefb_decode_var()
1077 vga_out8(0x3d4, 0x40, par); in savagefb_decode_var()
1078 reg->CR40 = vga_in8(0x3d5, par) & ~0x01; in savagefb_decode_var()
1088 if (par->MCLK <= 0) { in savagefb_decode_var()
1092 common_calc_clock(par->MCLK, 1, 1, 31, 0, 3, 135000, 270000, in savagefb_decode_var()
1173 if (par->chip == S3_SAVAGE2000) in savagefb_decode_var()
1182 vga_out8(0x3d4, 0x36, par); in savagefb_decode_var()
1183 reg->CR36 = vga_in8(0x3d5, par); in savagefb_decode_var()
1184 vga_out8(0x3d4, 0x68, par); in savagefb_decode_var()
1185 reg->CR68 = vga_in8(0x3d5, par); in savagefb_decode_var()
1187 vga_out8(0x3d4, 0x6f, par); in savagefb_decode_var()
1188 reg->CR6F = vga_in8(0x3d5, par); in savagefb_decode_var()
1189 vga_out8(0x3d4, 0x86, par); in savagefb_decode_var()
1190 reg->CR86 = vga_in8(0x3d5, par); in savagefb_decode_var()
1191 vga_out8(0x3d4, 0x88, par); in savagefb_decode_var()
1192 reg->CR88 = vga_in8(0x3d5, par) | 0x08; in savagefb_decode_var()
1193 vga_out8(0x3d4, 0xb0, par); in savagefb_decode_var()
1194 reg->CRB0 = vga_in8(0x3d5, par) | 0x80; in savagefb_decode_var()
1211 struct savagefb_par *par = info->par; in savagefb_setcolreg() local
1216 par->palette[regno].red = red; in savagefb_setcolreg()
1217 par->palette[regno].green = green; in savagefb_setcolreg()
1218 par->palette[regno].blue = blue; in savagefb_setcolreg()
1219 par->palette[regno].transp = transp; in savagefb_setcolreg()
1223 vga_out8(0x3c8, regno, par); in savagefb_setcolreg()
1225 vga_out8(0x3c9, red >> 10, par); in savagefb_setcolreg()
1226 vga_out8(0x3c9, green >> 10, par); in savagefb_setcolreg()
1227 vga_out8(0x3c9, blue >> 10, par); in savagefb_setcolreg()
1261 static void savagefb_set_par_int(struct savagefb_par *par, struct savage_reg *reg) in savagefb_set_par_int() argument
1267 par->SavageWaitIdle(par); in savagefb_set_par_int()
1269 vga_out8(0x3c2, 0x23, par); in savagefb_set_par_int()
1271 vga_out16(0x3d4, 0x4838, par); in savagefb_set_par_int()
1272 vga_out16(0x3d4, 0xa539, par); in savagefb_set_par_int()
1273 vga_out16(0x3c4, 0x0608, par); in savagefb_set_par_int()
1275 vgaHWProtect(par, 1); in savagefb_set_par_int()
1284 VerticalRetraceWait(par); in savagefb_set_par_int()
1285 vga_out8(0x3d4, 0x67, par); in savagefb_set_par_int()
1286 cr67 = vga_in8(0x3d5, par); in savagefb_set_par_int()
1287 vga_out8(0x3d5, cr67/*par->CR67*/ & ~0x0c, par); /* no STREAMS yet */ in savagefb_set_par_int()
1289 vga_out8(0x3d4, 0x23, par); in savagefb_set_par_int()
1290 vga_out8(0x3d5, 0x00, par); in savagefb_set_par_int()
1291 vga_out8(0x3d4, 0x26, par); in savagefb_set_par_int()
1292 vga_out8(0x3d5, 0x00, par); in savagefb_set_par_int()
1295 vga_out8(0x3d4, 0x66, par); in savagefb_set_par_int()
1296 vga_out8(0x3d5, reg->CR66, par); in savagefb_set_par_int()
1297 vga_out8(0x3d4, 0x3a, par); in savagefb_set_par_int()
1298 vga_out8(0x3d5, reg->CR3A, par); in savagefb_set_par_int()
1299 vga_out8(0x3d4, 0x31, par); in savagefb_set_par_int()
1300 vga_out8(0x3d5, reg->CR31, par); in savagefb_set_par_int()
1301 vga_out8(0x3d4, 0x32, par); in savagefb_set_par_int()
1302 vga_out8(0x3d5, reg->CR32, par); in savagefb_set_par_int()
1303 vga_out8(0x3d4, 0x58, par); in savagefb_set_par_int()
1304 vga_out8(0x3d5, reg->CR58, par); in savagefb_set_par_int()
1305 vga_out8(0x3d4, 0x53, par); in savagefb_set_par_int()
1306 vga_out8(0x3d5, reg->CR53 & 0x7f, par); in savagefb_set_par_int()
1308 vga_out16(0x3c4, 0x0608, par); in savagefb_set_par_int()
1312 vga_out8(0x3c4, 0x0e, par); in savagefb_set_par_int()
1313 vga_out8(0x3c5, reg->SR0E, par); in savagefb_set_par_int()
1314 vga_out8(0x3c4, 0x0f, par); in savagefb_set_par_int()
1315 vga_out8(0x3c5, reg->SR0F, par); in savagefb_set_par_int()
1316 vga_out8(0x3c4, 0x29, par); in savagefb_set_par_int()
1317 vga_out8(0x3c5, reg->SR29, par); in savagefb_set_par_int()
1318 vga_out8(0x3c4, 0x15, par); in savagefb_set_par_int()
1319 vga_out8(0x3c5, reg->SR15, par); in savagefb_set_par_int()
1322 if (par->chip == S3_SAVAGE_MX) { in savagefb_set_par_int()
1326 vga_out8(0x3c4, 0x54+i, par); in savagefb_set_par_int()
1327 vga_out8(0x3c5, reg->SR54[i], par); in savagefb_set_par_int()
1331 vgaHWRestore (par, reg); in savagefb_set_par_int()
1334 vga_out8(0x3d4, 0x53, par); in savagefb_set_par_int()
1335 vga_out8(0x3d5, reg->CR53, par); in savagefb_set_par_int()
1336 vga_out8(0x3d4, 0x5d, par); in savagefb_set_par_int()
1337 vga_out8(0x3d5, reg->CR5D, par); in savagefb_set_par_int()
1338 vga_out8(0x3d4, 0x5e, par); in savagefb_set_par_int()
1339 vga_out8(0x3d5, reg->CR5E, par); in savagefb_set_par_int()
1340 vga_out8(0x3d4, 0x3b, par); in savagefb_set_par_int()
1341 vga_out8(0x3d5, reg->CR3B, par); in savagefb_set_par_int()
1342 vga_out8(0x3d4, 0x3c, par); in savagefb_set_par_int()
1343 vga_out8(0x3d5, reg->CR3C, par); in savagefb_set_par_int()
1344 vga_out8(0x3d4, 0x43, par); in savagefb_set_par_int()
1345 vga_out8(0x3d5, reg->CR43, par); in savagefb_set_par_int()
1346 vga_out8(0x3d4, 0x65, par); in savagefb_set_par_int()
1347 vga_out8(0x3d5, reg->CR65, par); in savagefb_set_par_int()
1350 vga_out8(0x3d4, 0x67, par); in savagefb_set_par_int()
1352 cr67 = vga_in8(0x3d5, par) & 0xf; in savagefb_set_par_int()
1353 vga_out8(0x3d5, 0x50 | cr67, par); in savagefb_set_par_int()
1355 vga_out8(0x3d4, 0x67, par); in savagefb_set_par_int()
1357 vga_out8(0x3d5, reg->CR67 & ~0x0c, par); in savagefb_set_par_int()
1360 vga_out8(0x3d4, 0x34, par); in savagefb_set_par_int()
1361 vga_out8(0x3d5, reg->CR34, par); in savagefb_set_par_int()
1362 vga_out8(0x3d4, 0x40, par); in savagefb_set_par_int()
1363 vga_out8(0x3d5, reg->CR40, par); in savagefb_set_par_int()
1364 vga_out8(0x3d4, 0x42, par); in savagefb_set_par_int()
1365 vga_out8(0x3d5, reg->CR42, par); in savagefb_set_par_int()
1366 vga_out8(0x3d4, 0x45, par); in savagefb_set_par_int()
1367 vga_out8(0x3d5, reg->CR45, par); in savagefb_set_par_int()
1368 vga_out8(0x3d4, 0x50, par); in savagefb_set_par_int()
1369 vga_out8(0x3d5, reg->CR50, par); in savagefb_set_par_int()
1370 vga_out8(0x3d4, 0x51, par); in savagefb_set_par_int()
1371 vga_out8(0x3d5, reg->CR51, par); in savagefb_set_par_int()
1374 vga_out8(0x3d4, 0x36, par); in savagefb_set_par_int()
1375 vga_out8(0x3d5, reg->CR36, par); in savagefb_set_par_int()
1376 vga_out8(0x3d4, 0x60, par); in savagefb_set_par_int()
1377 vga_out8(0x3d5, reg->CR60, par); in savagefb_set_par_int()
1378 vga_out8(0x3d4, 0x68, par); in savagefb_set_par_int()
1379 vga_out8(0x3d5, reg->CR68, par); in savagefb_set_par_int()
1380 vga_out8(0x3d4, 0x69, par); in savagefb_set_par_int()
1381 vga_out8(0x3d5, reg->CR69, par); in savagefb_set_par_int()
1382 vga_out8(0x3d4, 0x6f, par); in savagefb_set_par_int()
1383 vga_out8(0x3d5, reg->CR6F, par); in savagefb_set_par_int()
1385 vga_out8(0x3d4, 0x33, par); in savagefb_set_par_int()
1386 vga_out8(0x3d5, reg->CR33, par); in savagefb_set_par_int()
1387 vga_out8(0x3d4, 0x86, par); in savagefb_set_par_int()
1388 vga_out8(0x3d5, reg->CR86, par); in savagefb_set_par_int()
1389 vga_out8(0x3d4, 0x88, par); in savagefb_set_par_int()
1390 vga_out8(0x3d5, reg->CR88, par); in savagefb_set_par_int()
1391 vga_out8(0x3d4, 0x90, par); in savagefb_set_par_int()
1392 vga_out8(0x3d5, reg->CR90, par); in savagefb_set_par_int()
1393 vga_out8(0x3d4, 0x91, par); in savagefb_set_par_int()
1394 vga_out8(0x3d5, reg->CR91, par); in savagefb_set_par_int()
1396 if (par->chip == S3_SAVAGE4) { in savagefb_set_par_int()
1397 vga_out8(0x3d4, 0xb0, par); in savagefb_set_par_int()
1398 vga_out8(0x3d5, reg->CRB0, par); in savagefb_set_par_int()
1401 vga_out8(0x3d4, 0x32, par); in savagefb_set_par_int()
1402 vga_out8(0x3d5, reg->CR32, par); in savagefb_set_par_int()
1405 vga_out8(0x3c4, 0x08, par); in savagefb_set_par_int()
1406 vga_out8(0x3c5, 0x06, par); in savagefb_set_par_int()
1412 vga_out8(0x3c4, 0x10, par); in savagefb_set_par_int()
1413 vga_out8(0x3c5, reg->SR10, par); in savagefb_set_par_int()
1414 vga_out8(0x3c4, 0x11, par); in savagefb_set_par_int()
1415 vga_out8(0x3c5, reg->SR11, par); in savagefb_set_par_int()
1419 vga_out8(0x3c4, 0x0e, par); in savagefb_set_par_int()
1420 vga_out8(0x3c5, reg->SR0E, par); in savagefb_set_par_int()
1421 vga_out8(0x3c4, 0x0f, par); in savagefb_set_par_int()
1422 vga_out8(0x3c5, reg->SR0F, par); in savagefb_set_par_int()
1423 vga_out8(0x3c4, 0x12, par); in savagefb_set_par_int()
1424 vga_out8(0x3c5, reg->SR12, par); in savagefb_set_par_int()
1425 vga_out8(0x3c4, 0x13, par); in savagefb_set_par_int()
1426 vga_out8(0x3c5, reg->SR13, par); in savagefb_set_par_int()
1427 vga_out8(0x3c4, 0x29, par); in savagefb_set_par_int()
1428 vga_out8(0x3c5, reg->SR29, par); in savagefb_set_par_int()
1429 vga_out8(0x3c4, 0x18, par); in savagefb_set_par_int()
1430 vga_out8(0x3c5, reg->SR18, par); in savagefb_set_par_int()
1433 vga_out8(0x3c4, 0x15, par); in savagefb_set_par_int()
1434 tmp = vga_in8(0x3c5, par) & ~0x21; in savagefb_set_par_int()
1436 vga_out8(0x3c5, tmp | 0x03, par); in savagefb_set_par_int()
1437 vga_out8(0x3c5, tmp | 0x23, par); in savagefb_set_par_int()
1438 vga_out8(0x3c5, tmp | 0x03, par); in savagefb_set_par_int()
1439 vga_out8(0x3c5, reg->SR15, par); in savagefb_set_par_int()
1442 vga_out8(0x3c4, 0x30, par); in savagefb_set_par_int()
1443 vga_out8(0x3c5, reg->SR30, par); in savagefb_set_par_int()
1444 vga_out8(0x3c4, 0x08, par); in savagefb_set_par_int()
1445 vga_out8(0x3c5, reg->SR08, par); in savagefb_set_par_int()
1448 VerticalRetraceWait(par); in savagefb_set_par_int()
1449 vga_out8(0x3d4, 0x67, par); in savagefb_set_par_int()
1450 vga_out8(0x3d5, reg->CR67, par); in savagefb_set_par_int()
1452 vga_out8(0x3d4, 0x66, par); in savagefb_set_par_int()
1453 cr66 = vga_in8(0x3d5, par); in savagefb_set_par_int()
1454 vga_out8(0x3d5, cr66 | 0x80, par); in savagefb_set_par_int()
1455 vga_out8(0x3d4, 0x3a, par); in savagefb_set_par_int()
1456 cr3a = vga_in8(0x3d5, par); in savagefb_set_par_int()
1457 vga_out8(0x3d5, cr3a | 0x80, par); in savagefb_set_par_int()
1459 if (par->chip != S3_SAVAGE_MX) { in savagefb_set_par_int()
1460 VerticalRetraceWait(par); in savagefb_set_par_int()
1461 savage_out32(FIFO_CONTROL_REG, reg->MMPR0, par); in savagefb_set_par_int()
1462 par->SavageWaitIdle(par); in savagefb_set_par_int()
1463 savage_out32(MIU_CONTROL_REG, reg->MMPR1, par); in savagefb_set_par_int()
1464 par->SavageWaitIdle(par); in savagefb_set_par_int()
1465 savage_out32(STREAMS_TIMEOUT_REG, reg->MMPR2, par); in savagefb_set_par_int()
1466 par->SavageWaitIdle(par); in savagefb_set_par_int()
1467 savage_out32(MISC_TIMEOUT_REG, reg->MMPR3, par); in savagefb_set_par_int()
1470 vga_out8(0x3d4, 0x66, par); in savagefb_set_par_int()
1471 vga_out8(0x3d5, cr66, par); in savagefb_set_par_int()
1472 vga_out8(0x3d4, 0x3a, par); in savagefb_set_par_int()
1473 vga_out8(0x3d5, cr3a, par); in savagefb_set_par_int()
1475 SavageSetup2DEngine(par); in savagefb_set_par_int()
1476 vgaHWProtect(par, 0); in savagefb_set_par_int()
1479 static void savagefb_update_start(struct savagefb_par *par, int base) in savagefb_update_start() argument
1482 vga_out16(0x3d4, (base & 0x00ff00) | 0x0c, par); in savagefb_update_start()
1483 vga_out16(0x3d4, ((base & 0x00ff) << 8) | 0x0d, par); in savagefb_update_start()
1484 vga_out8(0x3d4, 0x69, par); in savagefb_update_start()
1485 vga_out8(0x3d5, (base & 0x7f0000) >> 16, par); in savagefb_update_start()
1506 struct savagefb_par *par = info->par; in savagefb_set_par() local
1511 err = savagefb_decode_var(var, par, &par->state); in savagefb_set_par()
1515 if (par->dacSpeedBpp <= 0) { in savagefb_set_par()
1517 par->dacSpeedBpp = par->clock[3]; in savagefb_set_par()
1519 par->dacSpeedBpp = par->clock[2]; in savagefb_set_par()
1521 par->dacSpeedBpp = par->clock[1]; in savagefb_set_par()
1523 par->dacSpeedBpp = par->clock[0]; in savagefb_set_par()
1527 par->maxClock = par->dacSpeedBpp; in savagefb_set_par()
1528 par->minClock = 10000; in savagefb_set_par()
1530 savagefb_set_par_int(par, &par->state); in savagefb_set_par()
1535 SavagePrintRegs(par); in savagefb_set_par()
1545 struct savagefb_par *par = info->par; in savagefb_pan_display() local
1551 savagefb_update_start(par, base); in savagefb_pan_display()
1557 struct savagefb_par *par = info->par; in savagefb_blank() local
1560 if (par->display_type == DISP_CRT) { in savagefb_blank()
1561 vga_out8(0x3c4, 0x08, par); in savagefb_blank()
1562 sr8 = vga_in8(0x3c5, par); in savagefb_blank()
1564 vga_out8(0x3c5, sr8, par); in savagefb_blank()
1565 vga_out8(0x3c4, 0x0d, par); in savagefb_blank()
1566 srd = vga_in8(0x3c5, par); in savagefb_blank()
1584 vga_out8(0x3c4, 0x0d, par); in savagefb_blank()
1585 vga_out8(0x3c5, srd, par); in savagefb_blank()
1588 if (par->display_type == DISP_LCD || in savagefb_blank()
1589 par->display_type == DISP_DFP) { in savagefb_blank()
1593 vga_out8(0x3c4, 0x31, par); /* SR31 bit 4 - FP enable */ in savagefb_blank()
1594 vga_out8(0x3c5, vga_in8(0x3c5, par) | 0x10, par); in savagefb_blank()
1599 vga_out8(0x3c4, 0x31, par); /* SR31 bit 4 - FP enable */ in savagefb_blank()
1600 vga_out8(0x3c5, vga_in8(0x3c5, par) & ~0x10, par); in savagefb_blank()
1610 struct savagefb_par *par = info->par; in savagefb_open() local
1612 mutex_lock(&par->open_lock); in savagefb_open()
1614 if (!par->open_count) { in savagefb_open()
1615 memset(&par->vgastate, 0, sizeof(par->vgastate)); in savagefb_open()
1616 par->vgastate.flags = VGA_SAVE_CMAP | VGA_SAVE_FONTS | in savagefb_open()
1618 par->vgastate.vgabase = par->mmio.vbase + 0x8000; in savagefb_open()
1619 save_vga(&par->vgastate); in savagefb_open()
1620 savage_get_default_par(par, &par->initial); in savagefb_open()
1623 par->open_count++; in savagefb_open()
1624 mutex_unlock(&par->open_lock); in savagefb_open()
1630 struct savagefb_par *par = info->par; in savagefb_release() local
1632 mutex_lock(&par->open_lock); in savagefb_release()
1634 if (par->open_count == 1) { in savagefb_release()
1635 savage_set_default_par(par, &par->initial); in savagefb_release()
1636 restore_vga(&par->vgastate); in savagefb_release()
1639 par->open_count--; in savagefb_release()
1640 mutex_unlock(&par->open_lock); in savagefb_release()
1685 static void savage_enable_mmio(struct savagefb_par *par) in savage_enable_mmio() argument
1691 val = vga_in8(0x3c3, par); in savage_enable_mmio()
1692 vga_out8(0x3c3, val | 0x01, par); in savage_enable_mmio()
1693 val = vga_in8(0x3cc, par); in savage_enable_mmio()
1694 vga_out8(0x3c2, val | 0x01, par); in savage_enable_mmio()
1696 if (par->chip >= S3_SAVAGE4) { in savage_enable_mmio()
1697 vga_out8(0x3d4, 0x40, par); in savage_enable_mmio()
1698 val = vga_in8(0x3d5, par); in savage_enable_mmio()
1699 vga_out8(0x3d5, val | 1, par); in savage_enable_mmio()
1704 static void savage_disable_mmio(struct savagefb_par *par) in savage_disable_mmio() argument
1710 if (par->chip >= S3_SAVAGE4) { in savage_disable_mmio()
1711 vga_out8(0x3d4, 0x40, par); in savage_disable_mmio()
1712 val = vga_in8(0x3d5, par); in savage_disable_mmio()
1713 vga_out8(0x3d5, val | 1, par); in savage_disable_mmio()
1720 struct savagefb_par *par = info->par; in savage_map_mmio() local
1723 if (S3_SAVAGE3D_SERIES(par->chip)) in savage_map_mmio()
1724 par->mmio.pbase = pci_resource_start(par->pcidev, 0) + in savage_map_mmio()
1727 par->mmio.pbase = pci_resource_start(par->pcidev, 0) + in savage_map_mmio()
1730 par->mmio.len = SAVAGE_NEWMMIO_REGSIZE; in savage_map_mmio()
1732 par->mmio.vbase = ioremap(par->mmio.pbase, par->mmio.len); in savage_map_mmio()
1733 if (!par->mmio.vbase) { in savage_map_mmio()
1738 par->mmio.vbase); in savage_map_mmio()
1740 info->fix.mmio_start = par->mmio.pbase; in savage_map_mmio()
1741 info->fix.mmio_len = par->mmio.len; in savage_map_mmio()
1743 par->bci_base = (u32 __iomem *)(par->mmio.vbase + BCI_BUFFER_OFFSET); in savage_map_mmio()
1744 par->bci_ptr = 0; in savage_map_mmio()
1746 savage_enable_mmio(par); in savage_map_mmio()
1753 struct savagefb_par *par = info->par; in savage_unmap_mmio() local
1756 savage_disable_mmio(par); in savage_unmap_mmio()
1758 if (par->mmio.vbase) { in savage_unmap_mmio()
1759 iounmap(par->mmio.vbase); in savage_unmap_mmio()
1760 par->mmio.vbase = NULL; in savage_unmap_mmio()
1766 struct savagefb_par *par = info->par; in savage_map_video() local
1771 if (S3_SAVAGE3D_SERIES(par->chip)) in savage_map_video()
1776 par->video.pbase = pci_resource_start(par->pcidev, resource); in savage_map_video()
1777 par->video.len = video_len; in savage_map_video()
1778 par->video.vbase = ioremap(par->video.pbase, par->video.len); in savage_map_video()
1780 if (!par->video.vbase) { in savage_map_video()
1785 "pbase == %x\n", par->video.vbase, par->video.pbase); in savage_map_video()
1787 info->fix.smem_start = par->video.pbase; in savage_map_video()
1788 info->fix.smem_len = par->video.len - par->cob_size; in savage_map_video()
1789 info->screen_base = par->video.vbase; in savage_map_video()
1792 par->video.mtrr = mtrr_add(par->video.pbase, video_len, in savage_map_video()
1797 memset_io(par->video.vbase, 0, par->video.len); in savage_map_video()
1804 struct savagefb_par *par = info->par; in savage_unmap_video() local
1808 if (par->video.vbase) { in savage_unmap_video()
1810 mtrr_del(par->video.mtrr, par->video.pbase, par->video.len); in savage_unmap_video()
1813 iounmap(par->video.vbase); in savage_unmap_video()
1814 par->video.vbase = NULL; in savage_unmap_video()
1819 static int savage_init_hw(struct savagefb_par *par) in savage_init_hw() argument
1832 vga_out8(0x3d4, 0x11, par); in savage_init_hw()
1833 tmp = vga_in8(0x3d5, par); in savage_init_hw()
1834 vga_out8(0x3d5, tmp & 0x7f, par); in savage_init_hw()
1837 vga_out16(0x3d4, 0x4838, par); in savage_init_hw()
1838 vga_out16(0x3d4, 0xa039, par); in savage_init_hw()
1839 vga_out16(0x3c4, 0x0608, par); in savage_init_hw()
1841 vga_out8(0x3d4, 0x40, par); in savage_init_hw()
1842 tmp = vga_in8(0x3d5, par); in savage_init_hw()
1843 vga_out8(0x3d5, tmp & ~0x01, par); in savage_init_hw()
1846 vga_out8(0x3d4, 0x38, par); in savage_init_hw()
1847 vga_out8(0x3d5, 0x48, par); in savage_init_hw()
1850 vga_out16(0x3d4, 0x4838, par); in savage_init_hw()
1854 vga_out8(0x3d4, 0x36, par); /* for register CR36 (CONFG_REG1), */ in savage_init_hw()
1855 config1 = vga_in8(0x3d5, par); /* get amount of vram installed */ in savage_init_hw()
1859 switch (par->chip) { in savage_init_hw()
1871 vga_out8(0x3d4, 0x68, par); /* memory control 1 */ in savage_init_hw()
1872 if ((vga_in8(0x3d5, par) & 0xC0) == (0x01 << 6)) in savage_init_hw()
1903 vga_out8(0x3d4, 0x66, par); in savage_init_hw()
1904 cr66 = vga_in8(0x3d5, par); in savage_init_hw()
1905 vga_out8(0x3d5, cr66 | 0x02, par); in savage_init_hw()
1908 vga_out8(0x3d4, 0x66, par); in savage_init_hw()
1909 vga_out8(0x3d5, cr66 & ~0x02, par); /* clear reset flag */ in savage_init_hw()
1917 vga_out8(0x3d4, 0x3f, par); in savage_init_hw()
1918 cr3f = vga_in8(0x3d5, par); in savage_init_hw()
1919 vga_out8(0x3d5, cr3f | 0x08, par); in savage_init_hw()
1922 vga_out8(0x3d4, 0x3f, par); in savage_init_hw()
1923 vga_out8(0x3d5, cr3f & ~0x08, par); /* clear reset flags */ in savage_init_hw()
1927 par->numClocks = 4; in savage_init_hw()
1928 par->clock[0] = 250000; in savage_init_hw()
1929 par->clock[1] = 250000; in savage_init_hw()
1930 par->clock[2] = 220000; in savage_init_hw()
1931 par->clock[3] = 220000; in savage_init_hw()
1934 vga_out8(0x3c4, 0x08, par); in savage_init_hw()
1935 sr8 = vga_in8(0x3c5, par); in savage_init_hw()
1936 vga_out8(0x3c5, 0x06, par); in savage_init_hw()
1937 vga_out8(0x3c4, 0x10, par); in savage_init_hw()
1938 n = vga_in8(0x3c5, par); in savage_init_hw()
1939 vga_out8(0x3c4, 0x11, par); in savage_init_hw()
1940 m = vga_in8(0x3c5, par); in savage_init_hw()
1941 vga_out8(0x3c4, 0x08, par); in savage_init_hw()
1942 vga_out8(0x3c5, sr8, par); in savage_init_hw()
1946 par->MCLK = ((1431818 * (m+2)) / (n1+2) / (1 << n2) + 50) / 100; in savage_init_hw()
1948 par->MCLK); in savage_init_hw()
1953 if (par->chip == S3_SAVAGE4) { in savage_init_hw()
1956 vga_out8(0x3c4, 0x30, par); in savage_init_hw()
1958 vga_out8(0x3c5, vga_in8(0x3c5, par) & ~0x02, par); in savage_init_hw()
1959 sr30 = vga_in8(0x3c5, par); in savage_init_hw()
1966 if ((S3_SAVAGE_MOBILE_SERIES(par->chip) || in savage_init_hw()
1967 S3_MOBILE_TWISTER_SERIES(par->chip)) && !par->crtonly) in savage_init_hw()
1968 par->display_type = DISP_LCD; in savage_init_hw()
1969 else if (dvi || (par->chip == S3_SAVAGE4 && par->dvi)) in savage_init_hw()
1970 par->display_type = DISP_DFP; in savage_init_hw()
1972 par->display_type = DISP_CRT; in savage_init_hw()
1976 if (par->display_type == DISP_LCD) { in savage_init_hw()
1977 unsigned char cr6b = VGArCR(0x6b, par); in savage_init_hw()
1979 int panelX = (VGArSEQ(0x61, par) + in savage_init_hw()
1980 ((VGArSEQ(0x66, par) & 0x02) << 7) + 1) * 8; in savage_init_hw()
1981 int panelY = (VGArSEQ(0x69, par) + in savage_init_hw()
1982 ((VGArSEQ(0x6e, par) & 0x70) << 4) + 1); in savage_init_hw()
2004 if ((VGArSEQ(0x39, par) & 0x03) == 0) { in savage_init_hw()
2006 } else if ((VGArSEQ(0x30, par) & 0x01) == 0) { in savage_init_hw()
2025 par->SavagePanelWidth = panelX; in savage_init_hw()
2026 par->SavagePanelHeight = panelY; in savage_init_hw()
2029 par->display_type = DISP_CRT; in savage_init_hw()
2032 savage_get_default_par(par, &par->state); in savage_init_hw()
2033 par->save = par->state; in savage_init_hw()
2035 if (S3_SAVAGE4_SERIES(par->chip)) { in savage_init_hw()
2040 par->cob_index = 2; in savage_init_hw()
2041 par->cob_size = 0x8000 << par->cob_index; in savage_init_hw()
2042 par->cob_offset = videoRambytes; in savage_init_hw()
2046 par->cob_index = 7; in savage_init_hw()
2047 par->cob_size = 0x400 << par->cob_index; in savage_init_hw()
2048 par->cob_offset = videoRambytes - par->cob_size; in savage_init_hw()
2057 struct savagefb_par *par = info->par; in savage_init_fb_info() local
2060 par->pcidev = dev; in savage_init_fb_info()
2070 par->chip = S3_SUPERSAVAGE; in savage_init_fb_info()
2074 par->chip = S3_SAVAGE4; in savage_init_fb_info()
2078 par->chip = S3_SAVAGE3D; in savage_init_fb_info()
2082 par->chip = S3_SAVAGE3D; in savage_init_fb_info()
2086 par->chip = S3_SAVAGE2000; in savage_init_fb_info()
2090 par->chip = S3_SAVAGE_MX; in savage_init_fb_info()
2094 par->chip = S3_SAVAGE_MX; in savage_init_fb_info()
2098 par->chip = S3_SAVAGE_MX; in savage_init_fb_info()
2102 par->chip = S3_SAVAGE_MX; in savage_init_fb_info()
2106 par->chip = S3_PROSAVAGE; in savage_init_fb_info()
2110 par->chip = S3_PROSAVAGE; in savage_init_fb_info()
2114 par->chip = S3_TWISTER; in savage_init_fb_info()
2118 par->chip = S3_TWISTER; in savage_init_fb_info()
2122 par->chip = S3_PROSAVAGEDDR; in savage_init_fb_info()
2126 par->chip = S3_PROSAVAGEDDR; in savage_init_fb_info()
2131 if (S3_SAVAGE3D_SERIES(par->chip)) { in savage_init_fb_info()
2132 par->SavageWaitIdle = savage3D_waitidle; in savage_init_fb_info()
2133 par->SavageWaitFifo = savage3D_waitfifo; in savage_init_fb_info()
2134 } else if (S3_SAVAGE4_SERIES(par->chip) || in savage_init_fb_info()
2135 S3_SUPERSAVAGE == par->chip) { in savage_init_fb_info()
2136 par->SavageWaitIdle = savage4_waitidle; in savage_init_fb_info()
2137 par->SavageWaitFifo = savage4_waitfifo; in savage_init_fb_info()
2139 par->SavageWaitIdle = savage2000_waitidle; in savage_init_fb_info()
2140 par->SavageWaitFifo = savage2000_waitfifo; in savage_init_fb_info()
2154 info->pseudo_palette = par->pseudo_palette; in savage_init_fb_info()
2182 struct savagefb_par *par; in savagefb_probe() local
2192 par = info->par; in savagefb_probe()
2193 mutex_init(&par->open_lock); in savagefb_probe()
2212 video_len = savage_init_hw(par); in savagefb_probe()
2226 savagefb_probe_i2c_connector(info, &par->edid); in savagefb_probe()
2227 fb_edid_to_monspecs(par->edid, &info->monspecs); in savagefb_probe()
2228 kfree(par->edid); in savagefb_probe()
2235 if (par->SavagePanelWidth) { in savagefb_probe()
2239 cvt_mode.xres = par->SavagePanelWidth; in savagefb_probe()
2240 cvt_mode.yres = par->SavagePanelHeight; in savagefb_probe()
2371 struct savagefb_par *par = info->par; in savagefb_suspend() local
2377 par->pm_state = mesg.event; in savagefb_suspend()
2394 savage_set_default_par(par, &par->save); in savagefb_suspend()
2395 savage_disable_mmio(par); in savagefb_suspend()
2407 struct savagefb_par *par = info->par; in savagefb_resume() local
2408 int cur_state = par->pm_state; in savagefb_resume()
2412 par->pm_state = PM_EVENT_ON; in savagefb_resume()
2432 savage_enable_mmio(par); in savagefb_resume()
2433 savage_init_hw(par); in savagefb_resume()