Lines Matching refs:nvclks
660 int nvclks, mclks, pclks, vpagemiss, crtpagemiss, vbs; in nv4CalcArbitration() local
683 nvclks = 2; in nv4CalcArbitration()
684 nvclks += 2; in nv4CalcArbitration()
685 nvclks += 1; in nv4CalcArbitration()
695 nvclks += 2; in nv4CalcArbitration()
696 nvclks += 1; in nv4CalcArbitration()
697 nvclks += 1; in nv4CalcArbitration()
698 nvclks += 1; in nv4CalcArbitration()
701 nvclks += 0; in nv4CalcArbitration()
711 us_n = nvclks*1000*1000 / nvclk_freq; in nv4CalcArbitration()
712 us_p = nvclks*1000*1000 / pclk_freq; in nv4CalcArbitration()
846 int nvclks, mclks, pclks, vpagemiss, crtpagemiss, vbs; in nv10CalcArbitration() local
878 nvclks = 3; /* lwm -> sync. */ in nv10CalcArbitration()
879 nvclks += 2; /* fbi bus cycles (1 req + 1 busy) */ in nv10CalcArbitration()
914 nvclks += 1; /* 2 edge sync. may be very close to edge so just put one. */ in nv10CalcArbitration()
915 nvclks += 1; /* fbi_d_rdv_n */ in nv10CalcArbitration()
916 nvclks += 1; /* Fbi_d_rdata */ in nv10CalcArbitration()
917 nvclks += 1; /* crtfifo load */ in nv10CalcArbitration()
923 nvclks += 0; in nv10CalcArbitration()
933 us_n = nvclks*1000*1000 / nvclk_freq;/* nvclk latency in us */ in nv10CalcArbitration()