104 } dss;  variable
116 	__raw_writel(val, dss.base + idx.idx);  in dss_write_reg()
121 	return __raw_readl(dss.base + idx.idx);  in dss_read_reg()
125 	dss.ctx[(DSS_##reg).idx / sizeof(u32)] = dss_read_reg(DSS_##reg)
127 	dss_write_reg(DSS_##reg, dss.ctx[(DSS_##reg).idx / sizeof(u32)])
141 	dss.ctx_valid = true;  in dss_save_context()
150 	if (!dss.ctx_valid)  in dss_restore_context()
172 	if (!dss.syscon_pll_ctrl)  in dss_ctrl_pll_enable()
192 	regmap_update_bits(dss.syscon_pll_ctrl, dss.syscon_pll_ctrl_offset,  in dss_ctrl_pll_enable()
201 	if (!dss.syscon_pll_ctrl)  in dss_ctrl_pll_set_control_mux()
256 	regmap_update_bits(dss.syscon_pll_ctrl, dss.syscon_pll_ctrl_offset,  in dss_ctrl_pll_set_control_mux()
364 	fclk_rate = clk_get_rate(dss.dss_clk);  in dss_dump_clocks()
420 	dss.dispc_clk_source = clk_src;  in dss_select_dispc_clk_source()
448 	dss.dsi_clk_source[dsi_module] = clk_src;  in dss_select_dsi_clk_source()
485 	dss.lcd_clk_source[ix] = clk_src;  in dss_select_lcd_clk_source()
490 	return dss.dispc_clk_source;  in dss_get_dispc_clk_source()
495 	return dss.dsi_clk_source[dsi_module];  in dss_get_dsi_clk_source()
503 		return dss.lcd_clk_source[ix];  in dss_get_lcd_clk_source()
507 		return dss.dispc_clk_source;  in dss_get_lcd_clk_source()
523 	if (dss.parent_clk == NULL) {  in dss_div_calc()
530 		fck = clk_round_rate(dss.dss_clk, fck);  in dss_div_calc()
535 	fckd_hw_max = dss.feat->fck_div_max;  in dss_div_calc()
537 	m = dss.feat->dss_fck_multiplier;  in dss_div_calc()
538 	prate = clk_get_rate(dss.parent_clk);  in dss_div_calc()
561 	r = clk_set_rate(dss.dss_clk, rate);  in dss_set_fck_rate()
565 	dss.dss_clk_rate = clk_get_rate(dss.dss_clk);  in dss_set_fck_rate()
567 	WARN_ONCE(dss.dss_clk_rate != rate,  in dss_set_fck_rate()
568 			"clk rate mismatch: %lu != %lu", dss.dss_clk_rate,  in dss_set_fck_rate()
576 	return dss.dss_clk_rate;  in dss_get_dispc_clk_rate()
588 	if (dss.parent_clk == NULL) {  in dss_setup_default_clock()
589 		fck = clk_round_rate(dss.dss_clk, max_dss_fck);  in dss_setup_default_clock()
591 		prate = clk_get_rate(dss.parent_clk);  in dss_setup_default_clock()
593 		fck_div = DIV_ROUND_UP(prate * dss.feat->dss_fck_multiplier,  in dss_setup_default_clock()
595 		fck = DIV_ROUND_UP(prate, fck_div) * dss.feat->dss_fck_multiplier;  in dss_setup_default_clock()
729 	return dss.feat->dpi_select_source(port, channel);  in dss_dpi_select_source()
736 	clk = devm_clk_get(&dss.pdev->dev, "fck");  in dss_get_clocks()
742 	dss.dss_clk = clk;  in dss_get_clocks()
744 	if (dss.feat->parent_clk_name) {  in dss_get_clocks()
745 		clk = clk_get(NULL, dss.feat->parent_clk_name);  in dss_get_clocks()
747 			DSSERR("Failed to get %s\n", dss.feat->parent_clk_name);  in dss_get_clocks()
754 	dss.parent_clk = clk;  in dss_get_clocks()
761 	if (dss.parent_clk)  in dss_put_clocks()
762 		clk_put(dss.parent_clk);  in dss_put_clocks()
771 	r = pm_runtime_get_sync(&dss.pdev->dev);  in dss_runtime_get()
782 	r = pm_runtime_put_sync(&dss.pdev->dev);  in dss_runtime_put()
930 	dss.feat = dst;  in dss_init_features()
948 	if (dss.feat->num_ports == 0)  in dss_init_ports()
959 		if (reg >= dss.feat->num_ports)  in dss_init_ports()
962 		port_type = dss.feat->ports[reg];  in dss_init_ports()
991 	if (dss.feat->num_ports == 0)  in dss_uninit_ports()
1003 		if (reg >= dss.feat->num_ports)  in dss_uninit_ports()
1006 		port_type = dss.feat->ports[reg];  in dss_uninit_ports()
1030 	dss.pdev = pdev;  in omap_dsshw_probe()
1032 	r = dss_init_features(dss.pdev);  in omap_dsshw_probe()
1036 	dss_mem = platform_get_resource(dss.pdev, IORESOURCE_MEM, 0);  in omap_dsshw_probe()
1042 	dss.base = devm_ioremap(&pdev->dev, dss_mem->start,  in omap_dsshw_probe()
1044 	if (!dss.base) {  in omap_dsshw_probe()
1063 	dss.dss_clk_rate = clk_get_rate(dss.dss_clk);  in omap_dsshw_probe()
1075 	dss.dsi_clk_source[0] = OMAP_DSS_CLK_SRC_FCK;  in omap_dsshw_probe()
1076 	dss.dsi_clk_source[1] = OMAP_DSS_CLK_SRC_FCK;  in omap_dsshw_probe()
1077 	dss.dispc_clk_source = OMAP_DSS_CLK_SRC_FCK;  in omap_dsshw_probe()
1078 	dss.lcd_clk_source[0] = OMAP_DSS_CLK_SRC_FCK;  in omap_dsshw_probe()
1079 	dss.lcd_clk_source[1] = OMAP_DSS_CLK_SRC_FCK;  in omap_dsshw_probe()
1084 		dss.syscon_pll_ctrl = syscon_regmap_lookup_by_phandle(np,  in omap_dsshw_probe()
1086 		if (IS_ERR(dss.syscon_pll_ctrl)) {  in omap_dsshw_probe()
1089 			return PTR_ERR(dss.syscon_pll_ctrl);  in omap_dsshw_probe()
1093 				&dss.syscon_pll_ctrl_offset)) {  in omap_dsshw_probe()
1119 		dss.video1_pll = dss_video_pll_init(pdev, 0, pll_regulator);  in omap_dsshw_probe()
1120 		if (IS_ERR(dss.video1_pll)) {  in omap_dsshw_probe()
1121 			r = PTR_ERR(dss.video1_pll);  in omap_dsshw_probe()
1127 		dss.video2_pll = dss_video_pll_init(pdev, 1, pll_regulator);  in omap_dsshw_probe()
1128 		if (IS_ERR(dss.video2_pll)) {  in omap_dsshw_probe()
1129 			r = PTR_ERR(dss.video2_pll);  in omap_dsshw_probe()
1147 	if (dss.video1_pll)  in omap_dsshw_probe()
1148 		dss_video_pll_uninit(dss.video1_pll);  in omap_dsshw_probe()
1150 	if (dss.video2_pll)  in omap_dsshw_probe()
1151 		dss_video_pll_uninit(dss.video2_pll);  in omap_dsshw_probe()
1161 	if (dss.video1_pll)  in omap_dsshw_remove()
1162 		dss_video_pll_uninit(dss.video1_pll);  in omap_dsshw_remove()
1164 	if (dss.video2_pll)  in omap_dsshw_remove()
1165 		dss_video_pll_uninit(dss.video2_pll);  in omap_dsshw_remove()