130 		BUG();  in DISPC_DEFAULT_COLOR()
147 		BUG();  in DISPC_TRANS_COLOR()
158 		BUG();  in DISPC_TIMING_H()
165 		BUG();  in DISPC_TIMING_H()
176 		BUG();  in DISPC_TIMING_V()
183 		BUG();  in DISPC_TIMING_V()
194 		BUG();  in DISPC_POL_FREQ()
201 		BUG();  in DISPC_POL_FREQ()
212 		BUG();  in DISPC_DIVISORo()
219 		BUG();  in DISPC_DIVISORo()
237 		BUG();  in DISPC_SIZE_MGR()
248 		BUG();  in DISPC_DATA_CYCLE1()
255 		BUG();  in DISPC_DATA_CYCLE1()
266 		BUG();  in DISPC_DATA_CYCLE2()
273 		BUG();  in DISPC_DATA_CYCLE2()
284 		BUG();  in DISPC_DATA_CYCLE3()
291 		BUG();  in DISPC_DATA_CYCLE3()
302 		BUG();  in DISPC_CPR_COEF_R()
309 		BUG();  in DISPC_CPR_COEF_R()
320 		BUG();  in DISPC_CPR_COEF_G()
327 		BUG();  in DISPC_CPR_COEF_G()
338 		BUG();  in DISPC_CPR_COEF_B()
345 		BUG();  in DISPC_CPR_COEF_B()
365 		BUG();  in DISPC_OVL_BASE()
382 		BUG();  in DISPC_BA0_OFFSET()
398 		BUG();  in DISPC_BA1_OFFSET()
407 		BUG();  in DISPC_BA0_UV_OFFSET()
418 		BUG();  in DISPC_BA0_UV_OFFSET()
427 		BUG();  in DISPC_BA1_UV_OFFSET()
438 		BUG();  in DISPC_BA1_UV_OFFSET()
453 		BUG();  in DISPC_POS_OFFSET()
469 		BUG();  in DISPC_SIZE_OFFSET()
486 		BUG();  in DISPC_ATTR_OFFSET()
495 		BUG();  in DISPC_ATTR2_OFFSET()
506 		BUG();  in DISPC_ATTR2_OFFSET()
523 		BUG();  in DISPC_FIFO_THRESH_OFFSET()
540 		BUG();  in DISPC_FIFO_SIZE_STATUS_OFFSET()
557 		BUG();  in DISPC_ROW_INC_OFFSET()
574 		BUG();  in DISPC_PIX_INC_OFFSET()
587 		BUG();  in DISPC_WINDOW_SKIP_OFFSET()
590 		BUG();  in DISPC_WINDOW_SKIP_OFFSET()
603 		BUG();  in DISPC_TABLE_BA_OFFSET()
606 		BUG();  in DISPC_TABLE_BA_OFFSET()
615 		BUG();  in DISPC_FIR_OFFSET()
624 		BUG();  in DISPC_FIR_OFFSET()
633 		BUG();  in DISPC_FIR2_OFFSET()
644 		BUG();  in DISPC_FIR2_OFFSET()
653 		BUG();  in DISPC_PIC_SIZE_OFFSET()
662 		BUG();  in DISPC_PIC_SIZE_OFFSET()
672 		BUG();  in DISPC_ACCU0_OFFSET()
681 		BUG();  in DISPC_ACCU0_OFFSET()
690 		BUG();  in DISPC_ACCU2_0_OFFSET()
701 		BUG();  in DISPC_ACCU2_0_OFFSET()
710 		BUG();  in DISPC_ACCU1_OFFSET()
719 		BUG();  in DISPC_ACCU1_OFFSET()
728 		BUG();  in DISPC_ACCU2_1_OFFSET()
739 		BUG();  in DISPC_ACCU2_1_OFFSET()
749 		BUG();  in DISPC_FIR_COEF_H_OFFSET()
758 		BUG();  in DISPC_FIR_COEF_H_OFFSET()
768 		BUG();  in DISPC_FIR_COEF_H2_OFFSET()
779 		BUG();  in DISPC_FIR_COEF_H2_OFFSET()
789 		BUG();  in DISPC_FIR_COEF_HV_OFFSET()
798 		BUG();  in DISPC_FIR_COEF_HV_OFFSET()
808 		BUG();  in DISPC_FIR_COEF_HV2_OFFSET()
819 		BUG();  in DISPC_FIR_COEF_HV2_OFFSET()
829 		BUG();  in DISPC_CONV_COEF_OFFSET()
837 		BUG();  in DISPC_CONV_COEF_OFFSET()
847 		BUG();  in DISPC_FIR_COEF_V_OFFSET()
857 		BUG();  in DISPC_FIR_COEF_V_OFFSET()
867 		BUG();  in DISPC_FIR_COEF_V2_OFFSET()
878 		BUG();  in DISPC_FIR_COEF_V2_OFFSET()
895 		BUG();  in DISPC_PRELOAD_OFFSET()
912 		BUG();  in DISPC_MFLAG_THRESHOLD_OFFSET()