Lines Matching refs:paddr
505 wr_reg_wa(&hw->desc[0], ad->paddr); in fsl_diu_enable_panel()
509 if (hw->desc[1] != ad->paddr) { /* AOI0 closed */ in fsl_diu_enable_panel()
512 cpu_to_le32(cmfbi->ad->paddr); in fsl_diu_enable_panel()
515 wr_reg_wa(&hw->desc[1], ad->paddr); in fsl_diu_enable_panel()
520 if (hw->desc[2] != ad->paddr) { /* AOI0 closed */ in fsl_diu_enable_panel()
523 cpu_to_le32(cmfbi->ad->paddr); in fsl_diu_enable_panel()
526 wr_reg_wa(&hw->desc[2], ad->paddr); in fsl_diu_enable_panel()
532 if (hw->desc[1] == data->dummy_ad.paddr) in fsl_diu_enable_panel()
533 wr_reg_wa(&hw->desc[1], ad->paddr); in fsl_diu_enable_panel()
535 pmfbi->ad->next_ad = cpu_to_le32(ad->paddr); in fsl_diu_enable_panel()
540 if (hw->desc[2] == data->dummy_ad.paddr) in fsl_diu_enable_panel()
541 wr_reg_wa(&hw->desc[2], ad->paddr); in fsl_diu_enable_panel()
543 pmfbi->ad->next_ad = cpu_to_le32(ad->paddr); in fsl_diu_enable_panel()
562 wr_reg_wa(&hw->desc[1], cmfbi->ad->paddr); in fsl_diu_disable_panel()
565 wr_reg_wa(&hw->desc[1], data->dummy_ad.paddr); in fsl_diu_disable_panel()
571 wr_reg_wa(&hw->desc[2], cmfbi->ad->paddr); in fsl_diu_disable_panel()
574 wr_reg_wa(&hw->desc[2], data->dummy_ad.paddr); in fsl_diu_disable_panel()
579 if (hw->desc[1] != ad->paddr) { in fsl_diu_disable_panel()
585 wr_reg_wa(&hw->desc[1], data->dummy_ad.paddr); in fsl_diu_disable_panel()
590 if (hw->desc[2] != ad->paddr) { in fsl_diu_disable_panel()
596 wr_reg_wa(&hw->desc[2], data->dummy_ad.paddr); in fsl_diu_disable_panel()
1724 data->ad[i].paddr = DMA_ADDR(data, ad[i]); in fsl_diu_probe()
1767 data->dummy_ad.paddr = DMA_ADDR(data, dummy_ad); in fsl_diu_probe()
1776 out_be32(&data->diu_reg->desc[1], data->dummy_ad.paddr); in fsl_diu_probe()
1777 out_be32(&data->diu_reg->desc[2], data->dummy_ad.paddr); in fsl_diu_probe()