148 static void lcdc_write(unsigned int val, unsigned int addr)  in lcdc_write()  function
274 		lcdc_write(LCD_CLK_MAIN_RESET, LCD_CLK_RESET_REG);  in lcd_enable_raster()
279 		lcdc_write(0, LCD_CLK_RESET_REG);  in lcd_enable_raster()
285 		lcdc_write(reg | LCD_RASTER_ENABLE, LCD_RASTER_CTRL_REG);  in lcd_enable_raster()
296 		lcdc_write(reg & ~LCD_RASTER_ENABLE, LCD_RASTER_CTRL_REG);  in lcd_disable_raster()
338 			lcdc_write(reg_int, LCD_INT_ENABLE_SET_REG);  in lcd_blit()
342 		lcdc_write(start, LCD_DMA_FRM_BUF_BASE_ADDR_0_REG);  in lcd_blit()
343 		lcdc_write(end, LCD_DMA_FRM_BUF_CEILING_ADDR_0_REG);  in lcd_blit()
344 		lcdc_write(start, LCD_DMA_FRM_BUF_BASE_ADDR_1_REG);  in lcd_blit()
345 		lcdc_write(end, LCD_DMA_FRM_BUF_CEILING_ADDR_1_REG);  in lcd_blit()
357 			lcdc_write(reg_int, LCD_INT_ENABLE_SET_REG);  in lcd_blit()
360 		lcdc_write(start, LCD_DMA_FRM_BUF_BASE_ADDR_0_REG);  in lcd_blit()
361 		lcdc_write(end, LCD_DMA_FRM_BUF_CEILING_ADDR_0_REG);  in lcd_blit()
364 	lcdc_write(reg_dma, LCD_DMA_CTRL_REG);  in lcd_blit()
365 	lcdc_write(reg_ras, LCD_RASTER_CTRL_REG);  in lcd_blit()
401 	lcdc_write(reg, LCD_DMA_CTRL_REG);  in lcd_cfg_dma()
414 	lcdc_write(reg, LCD_RASTER_TIMING_2_REG);  in lcd_cfg_ac_bias()
426 	lcdc_write(reg, LCD_RASTER_TIMING_0_REG);  in lcd_cfg_horizontal_sync()
440 		lcdc_write(reg, LCD_RASTER_TIMING_2_REG);  in lcd_cfg_horizontal_sync()
453 	lcdc_write(reg, LCD_RASTER_TIMING_1_REG);  in lcd_cfg_vertical_sync()
495 		lcdc_write(reg_int, LCD_INT_ENABLE_SET_REG);  in lcd_cfg_display()
498 	lcdc_write(reg, LCD_RASTER_CTRL_REG);  in lcd_cfg_display()
519 	lcdc_write(reg, LCD_RASTER_TIMING_2_REG);  in lcd_cfg_display()
556 	lcdc_write(reg, LCD_RASTER_TIMING_0_REG);  in lcd_cfg_frame_buffer()
562 	lcdc_write(reg, LCD_RASTER_TIMING_1_REG);  in lcd_cfg_frame_buffer()
568 		lcdc_write(reg, LCD_RASTER_TIMING_2_REG);  in lcd_cfg_frame_buffer()
599 	lcdc_write(reg, LCD_RASTER_CTRL_REG);  in lcd_cfg_frame_buffer()
698 	lcdc_write(0, LCD_DMA_CTRL_REG);  in da8xx_fb_lcd_reset()
699 	lcdc_write(0, LCD_RASTER_CTRL_REG);  in da8xx_fb_lcd_reset()
702 		lcdc_write(0, LCD_INT_ENABLE_SET_REG);  in da8xx_fb_lcd_reset()
704 		lcdc_write(LCD_CLK_MAIN_RESET, LCD_CLK_RESET_REG);  in da8xx_fb_lcd_reset()
705 		lcdc_write(0, LCD_CLK_RESET_REG);  in da8xx_fb_lcd_reset()
727 	lcdc_write(LCD_CLK_DIVISOR(lcdc_clk_div) |  in da8xx_fb_config_clk_divider()
731 		lcdc_write(LCD_V2_DMA_CLK_EN | LCD_V2_LIDD_CLK_EN |  in da8xx_fb_config_clk_divider()
794 		lcdc_write((lcdc_read(LCD_RASTER_TIMING_2_REG) |  in lcd_init()
797 		lcdc_write((lcdc_read(LCD_RASTER_TIMING_2_REG) &  in lcd_init()
827 	lcdc_write((lcdc_read(LCD_RASTER_CTRL_REG) & 0xfff00fff) |  in lcd_init()
841 		lcdc_write(stat, LCD_MASKED_STAT_REG);  in lcdc_irq_handler_rev02()
852 		lcdc_write(stat, LCD_MASKED_STAT_REG);  in lcdc_irq_handler_rev02()
855 		lcdc_write(LCD_V2_PL_INT_ENA, LCD_INT_ENABLE_CLR_REG);  in lcdc_irq_handler_rev02()
860 		lcdc_write(stat, LCD_MASKED_STAT_REG);  in lcdc_irq_handler_rev02()
864 			lcdc_write(par->dma_start,  in lcdc_irq_handler_rev02()
866 			lcdc_write(par->dma_end,  in lcdc_irq_handler_rev02()
874 			lcdc_write(par->dma_start,  in lcdc_irq_handler_rev02()
876 			lcdc_write(par->dma_end,  in lcdc_irq_handler_rev02()
891 	lcdc_write(0, LCD_END_OF_INT_IND_REG);  in lcdc_irq_handler_rev02()
904 		lcdc_write(stat, LCD_STAT_REG);  in lcdc_irq_handler_rev01()
915 		lcdc_write(stat, LCD_STAT_REG);  in lcdc_irq_handler_rev01()
920 		lcdc_write(reg_ras, LCD_RASTER_CTRL_REG);  in lcdc_irq_handler_rev01()
925 		lcdc_write(stat, LCD_STAT_REG);  in lcdc_irq_handler_rev01()
929 			lcdc_write(par->dma_start,  in lcdc_irq_handler_rev01()
931 			lcdc_write(par->dma_end,  in lcdc_irq_handler_rev01()
939 			lcdc_write(par->dma_start,  in lcdc_irq_handler_rev01()
941 			lcdc_write(par->dma_end,  in lcdc_irq_handler_rev01()
1094 		lcdc_write(0, LCD_RASTER_CTRL_REG);  in fb_remove()
1097 		lcdc_write(0, LCD_DMA_CTRL_REG);  in fb_remove()
1249 				lcdc_write(par->dma_start,  in da8xx_pan_display()
1251 				lcdc_write(par->dma_end,  in da8xx_pan_display()
1254 				lcdc_write(par->dma_start,  in da8xx_pan_display()
1256 				lcdc_write(par->dma_end,  in da8xx_pan_display()
1296 	lcdc_write(par->dma_start, LCD_DMA_FRM_BUF_BASE_ADDR_0_REG);  in da8xxfb_set_par()
1297 	lcdc_write(par->dma_end, LCD_DMA_FRM_BUF_CEILING_ADDR_0_REG);  in da8xxfb_set_par()
1298 	lcdc_write(par->dma_start, LCD_DMA_FRM_BUF_BASE_ADDR_1_REG);  in da8xxfb_set_par()
1299 	lcdc_write(par->dma_end, LCD_DMA_FRM_BUF_CEILING_ADDR_1_REG);  in da8xxfb_set_par()
1595 		lcdc_write(reg_context.clk_enable, LCD_CLK_ENABLE_REG);  in lcd_context_restore()
1596 		lcdc_write(reg_context.int_enable_set, LCD_INT_ENABLE_SET_REG);  in lcd_context_restore()
1599 	lcdc_write(reg_context.ctrl, LCD_CTRL_REG);  in lcd_context_restore()
1600 	lcdc_write(reg_context.dma_ctrl, LCD_DMA_CTRL_REG);  in lcd_context_restore()
1601 	lcdc_write(reg_context.raster_timing_0, LCD_RASTER_TIMING_0_REG);  in lcd_context_restore()
1602 	lcdc_write(reg_context.raster_timing_1, LCD_RASTER_TIMING_1_REG);  in lcd_context_restore()
1603 	lcdc_write(reg_context.raster_timing_2, LCD_RASTER_TIMING_2_REG);  in lcd_context_restore()
1604 	lcdc_write(reg_context.dma_frm_buf_base_addr_0,  in lcd_context_restore()
1606 	lcdc_write(reg_context.dma_frm_buf_ceiling_addr_0,  in lcd_context_restore()
1608 	lcdc_write(reg_context.dma_frm_buf_base_addr_1,  in lcd_context_restore()
1610 	lcdc_write(reg_context.dma_frm_buf_ceiling_addr_1,  in lcd_context_restore()
1612 	lcdc_write(reg_context.raster_ctrl, LCD_RASTER_CTRL_REG);  in lcd_context_restore()