216 static int bfin_lq035q1_calc_timing(struct bfin_lq035q1fb_info *fbi)  in bfin_lq035q1_calc_timing()  argument
226 	switch (fbi->disp_info->ppi_mode) {  in bfin_lq035q1_calc_timing()
228 		fbi->lcd_bpp = 16;  in bfin_lq035q1_calc_timing()
233 		fbi->lcd_bpp = 16;  in bfin_lq035q1_calc_timing()
238 		fbi->lcd_bpp = 24;  in bfin_lq035q1_calc_timing()
250 	fbi->h_actpix = (LCD_X_RES * clocks_per_pix);	/* active horizontal pixel */  in bfin_lq035q1_calc_timing()
251 	fbi->h_period = (336 * clocks_per_pix);		/* HS period */  in bfin_lq035q1_calc_timing()
252 	fbi->h_pulse = (2 * clocks_per_pix);				/* HS pulse width */  in bfin_lq035q1_calc_timing()
253 	fbi->h_start = (7 * clocks_per_pix + cpld_pipeline_delay_cor);	/* first valid pixel */  in bfin_lq035q1_calc_timing()
255 	fbi->v_lines = (LCD_Y_RES + U_LINE);		/* total vertical lines */  in bfin_lq035q1_calc_timing()
256 	fbi->v_pulse = (2 * clocks_per_pix);		/* VS pulse width (1-5 H_PERIODs) */  in bfin_lq035q1_calc_timing()
257 	fbi->v_period =	(fbi->h_period * fbi->v_lines);	/* VS period */  in bfin_lq035q1_calc_timing()
262 static void bfin_lq035q1_config_ppi(struct bfin_lq035q1fb_info *fbi)  in bfin_lq035q1_config_ppi()  argument
266 	if (fbi->disp_info->ppi_mode == USE_RGB565_16_BIT_PPI)  in bfin_lq035q1_config_ppi()
271 	bfin_write_PPI_DELAY(fbi->h_start);  in bfin_lq035q1_config_ppi()
272 	bfin_write_PPI_COUNT(fbi->h_actpix - 1);  in bfin_lq035q1_config_ppi()
273 	bfin_write_PPI_FRAME(fbi->v_lines);  in bfin_lq035q1_config_ppi()
307 static void bfin_lq035q1_init_timers(struct bfin_lq035q1fb_info *fbi)  in bfin_lq035q1_init_timers()  argument
312 	set_gptimer_period(TIMER_HSYNC_id, fbi->h_period);  in bfin_lq035q1_init_timers()
313 	set_gptimer_pwidth(TIMER_HSYNC_id, fbi->h_pulse);  in bfin_lq035q1_init_timers()
318 	set_gptimer_period(TIMER_VSYNC_id, fbi->v_period);  in bfin_lq035q1_init_timers()
319 	set_gptimer_pwidth(TIMER_VSYNC_id, fbi->v_pulse);  in bfin_lq035q1_init_timers()
326 static void bfin_lq035q1_config_dma(struct bfin_lq035q1fb_info *fbi)  in bfin_lq035q1_config_dma()  argument
335 	set_dma_x_count(CH_PPI, (LCD_X_RES * fbi->lcd_bpp) / DMA_BUS_SIZE);  in bfin_lq035q1_config_dma()
337 	set_dma_y_count(CH_PPI, fbi->v_lines);  in bfin_lq035q1_config_dma()
340 	set_dma_start_addr(CH_PPI, (unsigned long)fbi->fb_buffer);  in bfin_lq035q1_config_dma()
397 	struct bfin_lq035q1fb_info *fbi = info->par;  in bfin_lq035q1_fb_open()  local
399 	spin_lock(&fbi->lock);  in bfin_lq035q1_fb_open()
400 	fbi->lq035_open_cnt++;  in bfin_lq035q1_fb_open()
402 	if (fbi->lq035_open_cnt <= 1) {  in bfin_lq035q1_fb_open()
407 		bfin_lq035q1_config_dma(fbi);  in bfin_lq035q1_fb_open()
408 		bfin_lq035q1_config_ppi(fbi);  in bfin_lq035q1_fb_open()
409 		bfin_lq035q1_init_timers(fbi);  in bfin_lq035q1_fb_open()
415 		lq035q1_backlight(fbi, 1);  in bfin_lq035q1_fb_open()
418 	spin_unlock(&fbi->lock);  in bfin_lq035q1_fb_open()
425 	struct bfin_lq035q1fb_info *fbi = info->par;  in bfin_lq035q1_fb_release()  local
427 	spin_lock(&fbi->lock);  in bfin_lq035q1_fb_release()
429 	fbi->lq035_open_cnt--;  in bfin_lq035q1_fb_release()
431 	if (fbi->lq035_open_cnt <= 0) {  in bfin_lq035q1_fb_release()
432 		lq035q1_backlight(fbi, 0);  in bfin_lq035q1_fb_release()
439 	spin_unlock(&fbi->lock);  in bfin_lq035q1_fb_release()
447 	struct bfin_lq035q1fb_info *fbi = info->par;  in bfin_lq035q1_fb_check_var()  local
449 	if (var->bits_per_pixel == fbi->lcd_bpp) {  in bfin_lq035q1_fb_check_var()