1533 	struct radeon_regs *newmode;  in radeonfb_set_par()  local
1547 	newmode = kmalloc(sizeof(struct radeon_regs), GFP_KERNEL);  in radeonfb_set_par()
1548 	if (!newmode)  in radeonfb_set_par()
1590 			newmode->ppll_div_3 = rinfo->panel_info.fbk_divider |  in radeonfb_set_par()
1592 			newmode->ppll_ref_div = rinfo->panel_info.ref_divider;  in radeonfb_set_par()
1630 	newmode->crtc_gen_cntl = CRTC_EXT_DISP_EN | CRTC_EN |  in radeonfb_set_par()
1634 	newmode->crtc_more_cntl = rinfo->init_state.crtc_more_cntl;  in radeonfb_set_par()
1635 	newmode->crtc_more_cntl &= 0xfffffff0;  in radeonfb_set_par()
1638 		newmode->crtc_ext_cntl = VGA_ATI_LINEAR | XCRT_CNT_EN;  in radeonfb_set_par()
1640 			newmode->crtc_ext_cntl |= CRTC_CRT_ON;  in radeonfb_set_par()
1642 		newmode->crtc_gen_cntl &= ~(CRTC_DBL_SCAN_EN |  in radeonfb_set_par()
1645 		newmode->crtc_ext_cntl = VGA_ATI_LINEAR | XCRT_CNT_EN |  in radeonfb_set_par()
1649 	newmode->dac_cntl = /* INREG(DAC_CNTL) | */ DAC_MASK_ALL | DAC_VGA_ADR_EN |  in radeonfb_set_par()
1652 	newmode->crtc_h_total_disp = ((((hTotal / 8) - 1) & 0x3ff) |  in radeonfb_set_par()
1655 	newmode->crtc_h_sync_strt_wid = ((hsync_start & 0x1fff) |  in radeonfb_set_par()
1658 	newmode->crtc_v_total_disp = ((vTotal - 1) & 0xffff) |  in radeonfb_set_par()
1661 	newmode->crtc_v_sync_strt_wid = (((vSyncStart - 1) & 0xfff) |  in radeonfb_set_par()
1670 		newmode->crtc_pitch = (rinfo->pitch << 3) / ((mode->bits_per_pixel + 1) / 8);  in radeonfb_set_par()
1672 		newmode->crtc_pitch = (mode->xres_virtual >> 3);  in radeonfb_set_par()
1674 	newmode->crtc_pitch |= (newmode->crtc_pitch << 16);  in radeonfb_set_par()
1681 	newmode->surface_cntl = 0;  in radeonfb_set_par()
1691 			newmode->surface_cntl |= NONSURF_AP0_SWP_16BPP;  in radeonfb_set_par()
1692 			newmode->surface_cntl |= NONSURF_AP1_SWP_16BPP;  in radeonfb_set_par()
1696 			newmode->surface_cntl |= NONSURF_AP0_SWP_32BPP;  in radeonfb_set_par()
1697 			newmode->surface_cntl |= NONSURF_AP1_SWP_32BPP;  in radeonfb_set_par()
1704 		newmode->surf_lower_bound[i] = 0;  in radeonfb_set_par()
1705 		newmode->surf_upper_bound[i] = 0x1f;  in radeonfb_set_par()
1706 		newmode->surf_info[i] = 0;  in radeonfb_set_par()
1710 		newmode->crtc_h_total_disp, newmode->crtc_h_sync_strt_wid);  in radeonfb_set_par()
1712 		newmode->crtc_v_total_disp, newmode->crtc_v_sync_strt_wid);  in radeonfb_set_par()
1721 	newmode->clk_cntl_index = 0x300;  in radeonfb_set_par()
1725 		radeon_calc_pll_regs(rinfo, newmode, freq);  in radeonfb_set_par()
1727 	newmode->vclk_ecp_cntl = rinfo->init_state.vclk_ecp_cntl;  in radeonfb_set_par()
1737 		newmode->fp_horz_stretch = (((rinfo->panel_info.xres / 8) - 1)  in radeonfb_set_par()
1739 		newmode->fp_vert_stretch = ((rinfo->panel_info.yres - 1)  in radeonfb_set_par()
1745 			newmode->fp_horz_stretch = (((((unsigned long)hRatio) & HORZ_STRETCH_RATIO_MASK)) |  in radeonfb_set_par()
1746 						   (newmode->fp_horz_stretch &  in radeonfb_set_par()
1749 			newmode->fp_horz_stretch |= (HORZ_STRETCH_BLEND |  in radeonfb_set_par()
1753 		newmode->fp_horz_stretch &= ~HORZ_AUTO_RATIO;  in radeonfb_set_par()
1758 			newmode->fp_vert_stretch = (((((unsigned long)vRatio) & VERT_STRETCH_RATIO_MASK)) |  in radeonfb_set_par()
1759 						   (newmode->fp_vert_stretch &  in radeonfb_set_par()
1761 			newmode->fp_vert_stretch |= (VERT_STRETCH_BLEND |  in radeonfb_set_par()
1765 		newmode->fp_vert_stretch &= ~VERT_AUTO_RATIO_EN;  in radeonfb_set_par()
1767 		newmode->fp_gen_cntl = (rinfo->init_state.fp_gen_cntl & (u32)  in radeonfb_set_par()
1777 		newmode->fp_gen_cntl |= (FP_CRTC_DONT_SHADOW_VPAR |  in radeonfb_set_par()
1783 			newmode->fp_gen_cntl &= ~R200_FP_SOURCE_SEL_MASK;  in radeonfb_set_par()
1785 				newmode->fp_gen_cntl |= R200_FP_SOURCE_SEL_RMX;  in radeonfb_set_par()
1787 				newmode->fp_gen_cntl |= R200_FP_SOURCE_SEL_CRTC1;  in radeonfb_set_par()
1789 			newmode->fp_gen_cntl |= FP_SEL_CRTC1;  in radeonfb_set_par()
1791 		newmode->lvds_gen_cntl = rinfo->init_state.lvds_gen_cntl;  in radeonfb_set_par()
1792 		newmode->lvds_pll_cntl = rinfo->init_state.lvds_pll_cntl;  in radeonfb_set_par()
1793 		newmode->tmds_crc = rinfo->init_state.tmds_crc;  in radeonfb_set_par()
1794 		newmode->tmds_transmitter_cntl = rinfo->init_state.tmds_transmitter_cntl;  in radeonfb_set_par()
1797 			newmode->lvds_gen_cntl |= (LVDS_ON | LVDS_BLON);  in radeonfb_set_par()
1798 			newmode->fp_gen_cntl &= ~(FP_FPON | FP_TMDS_EN);  in radeonfb_set_par()
1801 			newmode->fp_gen_cntl |= (FP_FPON | FP_TMDS_EN);  in radeonfb_set_par()
1802 			newmode->tmds_transmitter_cntl &= ~(TMDS_PLLRST);  in radeonfb_set_par()
1806 				newmode->tmds_transmitter_cntl &= ~TMDS_PLL_EN;  in radeonfb_set_par()
1808 				newmode->tmds_transmitter_cntl |= TMDS_PLL_EN;  in radeonfb_set_par()
1809 			newmode->crtc_ext_cntl &= ~CRTC_CRT_ON;  in radeonfb_set_par()
1812 		newmode->fp_crtc_h_total_disp = (((rinfo->panel_info.hblank / 8) & 0x3ff) |  in radeonfb_set_par()
1814 		newmode->fp_crtc_v_total_disp = (rinfo->panel_info.vblank & 0xffff) |  in radeonfb_set_par()
1816 		newmode->fp_h_sync_strt_wid = ((rinfo->panel_info.hOver_plus & 0x1fff) |  in radeonfb_set_par()
1818 		newmode->fp_v_sync_strt_wid = ((rinfo->panel_info.vOver_plus & 0xfff) |  in radeonfb_set_par()
1824 		memcpy(&rinfo->state, newmode, sizeof(*newmode));  in radeonfb_set_par()
1825 		radeon_write_mode (rinfo, newmode, 0);  in radeonfb_set_par()
1845 	kfree(newmode);  in radeonfb_set_par()