Lines Matching refs:vgabase
164 svga_tilecursor(par->state.vgabase, info, cursor); in arkfb_tilecursor()
480 regval = vga_rseq(par->state.vgabase, 0x1C); in ark_dac_read_regs()
483 vga_wseq(par->state.vgabase, 0x1C, regval | (code[0] & 4 ? 0x80 : 0)); in ark_dac_read_regs()
484 code[1] = vga_r(par->state.vgabase, dac_regs[code[0] & 3]); in ark_dac_read_regs()
489 vga_wseq(par->state.vgabase, 0x1C, regval); in ark_dac_read_regs()
499 regval = vga_rseq(par->state.vgabase, 0x1C); in ark_dac_write_regs()
502 vga_wseq(par->state.vgabase, 0x1C, regval | (code[0] & 4 ? 0x80 : 0)); in ark_dac_write_regs()
503 vga_w(par->state.vgabase, dac_regs[code[0] & 3], code[1]); in ark_dac_write_regs()
508 vga_wseq(par->state.vgabase, 0x1C, regval); in ark_dac_write_regs()
524 regval = vga_r(par->state.vgabase, VGA_MIS_R); in ark_set_pixclock()
525 vga_w(par->state.vgabase, VGA_MIS_W, regval | VGA_MIS_ENB_PLL_LOAD); in ark_set_pixclock()
537 void __iomem *vgabase = par->state.vgabase; in arkfb_open() local
540 par->state.vgabase = vgabase; in arkfb_open()
667 svga_wcrt_mask(par->state.vgabase, 0x11, 0x00, 0x80); in arkfb_set_par()
670 svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20); in arkfb_set_par()
671 svga_wcrt_mask(par->state.vgabase, 0x17, 0x00, 0x80); in arkfb_set_par()
674 svga_set_default_gfx_regs(par->state.vgabase); in arkfb_set_par()
675 svga_set_default_atc_regs(par->state.vgabase); in arkfb_set_par()
676 svga_set_default_seq_regs(par->state.vgabase); in arkfb_set_par()
677 svga_set_default_crt_regs(par->state.vgabase); in arkfb_set_par()
678 svga_wcrt_multi(par->state.vgabase, ark_line_compare_regs, 0xFFFFFFFF); in arkfb_set_par()
679 svga_wcrt_multi(par->state.vgabase, ark_start_address_regs, 0); in arkfb_set_par()
682 …svga_wseq_mask(par->state.vgabase, 0x10, 0x1F, 0x1F); /* enable linear framebuffer and full memory… in arkfb_set_par()
683 svga_wseq_mask(par->state.vgabase, 0x12, 0x03, 0x03); /* 4 MB linear framebuffer size */ in arkfb_set_par()
685 vga_wseq(par->state.vgabase, 0x13, info->fix.smem_start >> 16); in arkfb_set_par()
686 vga_wseq(par->state.vgabase, 0x14, info->fix.smem_start >> 24); in arkfb_set_par()
687 vga_wseq(par->state.vgabase, 0x15, 0); in arkfb_set_par()
688 vga_wseq(par->state.vgabase, 0x16, 0); in arkfb_set_par()
693 vga_wseq(par->state.vgabase, 0x18, regval); in arkfb_set_par()
697 svga_wcrt_multi(par->state.vgabase, ark_offset_regs, offset_value); in arkfb_set_par()
700 svga_wcrt_mask(par->state.vgabase, 0x40, 0x08, 0x08); in arkfb_set_par()
703 svga_wcrt_mask(par->state.vgabase, 0x09, 0x80, 0x80); in arkfb_set_par()
705 svga_wcrt_mask(par->state.vgabase, 0x09, 0x00, 0x80); in arkfb_set_par()
708 svga_wcrt_mask(par->state.vgabase, 0x44, 0x04, 0x04); in arkfb_set_par()
710 svga_wcrt_mask(par->state.vgabase, 0x44, 0x00, 0x04); in arkfb_set_par()
720 svga_set_textmode_vga_regs(par->state.vgabase); in arkfb_set_par()
722 vga_wseq(par->state.vgabase, 0x11, 0x10); /* basic VGA mode */ in arkfb_set_par()
723 svga_wcrt_mask(par->state.vgabase, 0x46, 0x00, 0x04); /* 8bit pixel path */ in arkfb_set_par()
729 vga_wgfx(par->state.vgabase, VGA_GFX_MODE, 0x40); in arkfb_set_par()
731 vga_wseq(par->state.vgabase, 0x11, 0x10); /* basic VGA mode */ in arkfb_set_par()
732 svga_wcrt_mask(par->state.vgabase, 0x46, 0x00, 0x04); /* 8bit pixel path */ in arkfb_set_par()
738 vga_wseq(par->state.vgabase, 0x11, 0x10); /* basic VGA mode */ in arkfb_set_par()
739 svga_wcrt_mask(par->state.vgabase, 0x46, 0x00, 0x04); /* 8bit pixel path */ in arkfb_set_par()
745 vga_wseq(par->state.vgabase, 0x11, 0x16); /* 8bpp accel mode */ in arkfb_set_par()
749 svga_wcrt_mask(par->state.vgabase, 0x46, 0x00, 0x04); /* 8bit pixel path */ in arkfb_set_par()
753 svga_wcrt_mask(par->state.vgabase, 0x46, 0x04, 0x04); /* 16bit pixel path */ in arkfb_set_par()
761 vga_wseq(par->state.vgabase, 0x11, 0x1A); /* 16bpp accel mode */ in arkfb_set_par()
762 svga_wcrt_mask(par->state.vgabase, 0x46, 0x04, 0x04); /* 16bit pixel path */ in arkfb_set_par()
768 vga_wseq(par->state.vgabase, 0x11, 0x1A); /* 16bpp accel mode */ in arkfb_set_par()
769 svga_wcrt_mask(par->state.vgabase, 0x46, 0x04, 0x04); /* 16bit pixel path */ in arkfb_set_par()
775 vga_wseq(par->state.vgabase, 0x11, 0x16); /* 8bpp accel mode ??? */ in arkfb_set_par()
776 svga_wcrt_mask(par->state.vgabase, 0x46, 0x04, 0x04); /* 16bit pixel path */ in arkfb_set_par()
784 vga_wseq(par->state.vgabase, 0x11, 0x1E); /* 32bpp accel mode */ in arkfb_set_par()
785 svga_wcrt_mask(par->state.vgabase, 0x46, 0x04, 0x04); /* 16bit pixel path */ in arkfb_set_par()
795 svga_set_timings(par->state.vgabase, &ark_timing_regs, &(info->var), hmul, hdiv, in arkfb_set_par()
803 vga_wcrt(par->state.vgabase, 0x42, (value + 1) / 2); in arkfb_set_par()
807 svga_wcrt_mask(par->state.vgabase, 0x17, 0x80, 0x80); in arkfb_set_par()
808 svga_wseq_mask(par->state.vgabase, 0x01, 0x00, 0x20); in arkfb_set_par()
883 svga_wseq_mask(par->state.vgabase, 0x01, 0x00, 0x20); in arkfb_blank()
884 svga_wcrt_mask(par->state.vgabase, 0x17, 0x80, 0x80); in arkfb_blank()
888 svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20); in arkfb_blank()
889 svga_wcrt_mask(par->state.vgabase, 0x17, 0x80, 0x80); in arkfb_blank()
895 svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20); in arkfb_blank()
896 svga_wcrt_mask(par->state.vgabase, 0x17, 0x00, 0x80); in arkfb_blank()
922 svga_wcrt_multi(par->state.vgabase, ark_start_address_regs, offset); in arkfb_pan_display()
1019 par->state.vgabase = (void __iomem *) (unsigned long) vga_res.start; in ark_pci_probe()
1022 regval = vga_rseq(par->state.vgabase, 0x10); in ark_pci_probe()