117 	int	(*readfn)(struct vfio_pci_device *vdev, int pos, int count,
119 	int	(*writefn)(struct vfio_pci_device *vdev, int pos, int count,
180 static int vfio_default_config_read(struct vfio_pci_device *vdev, int pos,  in vfio_default_config_read()  argument
186 	memcpy(val, vdev->vconfig + pos, count);  in vfio_default_config_read()
196 		ret = vfio_user_config_read(pdev, pos, &phys_val, count);  in vfio_default_config_read()
206 static int vfio_default_config_write(struct vfio_pci_device *vdev, int pos,  in vfio_default_config_write()  argument
223 		memcpy(&virt_val, vdev->vconfig + pos, count);  in vfio_default_config_write()
228 		memcpy(vdev->vconfig + pos, &virt_val, count);  in vfio_default_config_write()
237 		ret = vfio_user_config_read(pdev, pos, &phys_val, count);  in vfio_default_config_write()
244 		ret = vfio_user_config_write(pdev, pos, phys_val, count);  in vfio_default_config_write()
253 static int vfio_direct_config_read(struct vfio_pci_device *vdev, int pos,  in vfio_direct_config_read()  argument
259 	ret = vfio_user_config_read(vdev->pdev, pos, val, count);  in vfio_direct_config_read()
263 	if (pos >= PCI_CFG_SPACE_SIZE) { /* Extended cap header mangling */  in vfio_direct_config_read()
265 			memcpy(val, vdev->vconfig + pos, count);  in vfio_direct_config_read()
266 	} else if (pos >= PCI_STD_HEADER_SIZEOF) { /* Std cap mangling */  in vfio_direct_config_read()
268 			memcpy(val, vdev->vconfig + pos,  in vfio_direct_config_read()
271 			memcpy(val, vdev->vconfig + pos, 1);  in vfio_direct_config_read()
278 static int vfio_raw_config_write(struct vfio_pci_device *vdev, int pos,  in vfio_raw_config_write()  argument
284 	ret = vfio_user_config_write(vdev->pdev, pos, val, count);  in vfio_raw_config_write()
291 static int vfio_raw_config_read(struct vfio_pci_device *vdev, int pos,  in vfio_raw_config_read()  argument
297 	ret = vfio_user_config_read(vdev->pdev, pos, val, count);  in vfio_raw_config_read()
471 static int vfio_basic_config_read(struct vfio_pci_device *vdev, int pos,  in vfio_basic_config_read()  argument
478 	count = vfio_default_config_read(vdev, pos, count, perm, offset, val);  in vfio_basic_config_read()
492 static int vfio_basic_config_write(struct vfio_pci_device *vdev, int pos,  in vfio_basic_config_write()  argument
534 	count = vfio_default_config_write(vdev, pos, count, perm, offset, val);  in vfio_basic_config_write()
619 static int vfio_pm_config_write(struct vfio_pci_device *vdev, int pos,  in vfio_pm_config_write()  argument
623 	count = vfio_default_config_write(vdev, pos, count, perm, offset, val);  in vfio_pm_config_write()
827 static int vfio_find_cap_start(struct vfio_pci_device *vdev, int pos)  in vfio_find_cap_start()  argument
830 	int base = (pos >= PCI_CFG_SPACE_SIZE) ? PCI_CFG_SPACE_SIZE :  in vfio_find_cap_start()
832 	cap = vdev->pci_config_map[pos];  in vfio_find_cap_start()
838 	while (pos - 1 >= base && vdev->pci_config_map[pos - 1] == cap)  in vfio_find_cap_start()
839 		pos--;  in vfio_find_cap_start()
841 	return pos;  in vfio_find_cap_start()
844 static int vfio_msi_config_read(struct vfio_pci_device *vdev, int pos,  in vfio_msi_config_read()  argument
853 		start = vfio_find_cap_start(vdev, pos);  in vfio_msi_config_read()
861 	return vfio_default_config_read(vdev, pos, count, perm, offset, val);  in vfio_msi_config_read()
864 static int vfio_msi_config_write(struct vfio_pci_device *vdev, int pos,  in vfio_msi_config_write()  argument
868 	count = vfio_default_config_write(vdev, pos, count, perm, offset, val);  in vfio_msi_config_write()
878 		start = vfio_find_cap_start(vdev, pos);  in vfio_msi_config_write()
944 static int vfio_msi_cap_len(struct vfio_pci_device *vdev, u8 pos)  in vfio_msi_cap_len()  argument
950 	ret = pci_read_config_word(pdev, pos + PCI_MSI_FLAGS, &flags);  in vfio_msi_cap_len()
975 static int vfio_vc_cap_len(struct vfio_pci_device *vdev, u16 pos)  in vfio_vc_cap_len()  argument
982 	ret = pci_read_config_dword(pdev, pos + PCI_VC_PORT_CAP1, &tmp);  in vfio_vc_cap_len()
987 	ret = pci_read_config_dword(pdev, pos + PCI_VC_PORT_CAP2, &tmp);  in vfio_vc_cap_len()
1016 static int vfio_cap_len(struct vfio_pci_device *vdev, u8 cap, u8 pos)  in vfio_cap_len()  argument
1026 		return vfio_msi_cap_len(vdev, pos);  in vfio_cap_len()
1028 		ret = pci_read_config_word(pdev, pos + PCI_X_CMD, &word);  in vfio_cap_len()
1041 		ret = pci_read_config_byte(pdev, pos + PCI_CAP_FLAGS, &byte);  in vfio_cap_len()
1057 		ret = pci_read_config_byte(pdev, pos + 3, &byte);  in vfio_cap_len()
1064 		ret = pci_read_config_byte(pdev, pos + PCI_SATA_REGS, &byte);  in vfio_cap_len()
1075 			dev_name(&pdev->dev), __func__, cap, pos);  in vfio_cap_len()
1207 	u8 pos, *prev, cap;  in vfio_cap_init()  local
1218 	ret = pci_read_config_byte(pdev, PCI_CAPABILITY_LIST, &pos);  in vfio_cap_init()
1227 	while (pos && loops--) {  in vfio_cap_init()
1231 		ret = pci_read_config_byte(pdev, pos, &cap);  in vfio_cap_init()
1236 					   pos + PCI_CAP_LIST_NEXT, &next);  in vfio_cap_init()
1243 				len = vfio_cap_len(vdev, cap, pos);  in vfio_cap_init()
1253 			pos = next;  in vfio_cap_init()
1259 			if (likely(map[pos + i] == PCI_CAP_ID_INVALID))  in vfio_cap_init()
1264 				pos + i, map[pos + i], cap);  in vfio_cap_init()
1267 		memset(map + pos, cap, len);  in vfio_cap_init()
1268 		ret = vfio_fill_vconfig_bytes(vdev, pos, len);  in vfio_cap_init()
1272 		prev = &vdev->vconfig[pos + PCI_CAP_LIST_NEXT];  in vfio_cap_init()
1273 		pos = next;  in vfio_cap_init()
1488 					   loff_t pos)  in vfio_pci_cap_remaining_dword()  argument
1490 	u8 cap = vdev->pci_config_map[pos];  in vfio_pci_cap_remaining_dword()
1493 	for (i = 1; (pos + i) % 4 && vdev->pci_config_map[pos + i] == cap; i++)  in vfio_pci_cap_remaining_dword()
1584 	loff_t pos = *ppos;  in vfio_pci_config_rw()  local
1586 	pos &= VFIO_PCI_OFFSET_MASK;  in vfio_pci_config_rw()
1589 		ret = vfio_config_do_rw(vdev, buf, count, &pos, iswrite);  in vfio_pci_config_rw()
1596 		pos += ret;  in vfio_pci_config_rw()