Lines Matching refs:perm

118 			  struct perm_bits *perm, int offset, __le32 *val);
120 struct perm_bits *perm, int offset, __le32 val);
181 int count, struct perm_bits *perm, in vfio_default_config_read() argument
188 memcpy(&virt, perm->virt + offset, count); in vfio_default_config_read()
207 int count, struct perm_bits *perm, in vfio_default_config_write() argument
212 memcpy(&write, perm->write + offset, count); in vfio_default_config_write()
217 memcpy(&virt, perm->virt + offset, count); in vfio_default_config_write()
254 int count, struct perm_bits *perm, in vfio_direct_config_read() argument
279 int count, struct perm_bits *perm, in vfio_raw_config_write() argument
292 int count, struct perm_bits *perm, in vfio_raw_config_read() argument
322 static void free_perm_bits(struct perm_bits *perm) in free_perm_bits() argument
324 kfree(perm->virt); in free_perm_bits()
325 kfree(perm->write); in free_perm_bits()
326 perm->virt = NULL; in free_perm_bits()
327 perm->write = NULL; in free_perm_bits()
330 static int alloc_perm_bits(struct perm_bits *perm, int size) in alloc_perm_bits() argument
346 perm->virt = kzalloc(size, GFP_KERNEL); in alloc_perm_bits()
347 perm->write = kzalloc(size, GFP_KERNEL); in alloc_perm_bits()
348 if (!perm->virt || !perm->write) { in alloc_perm_bits()
349 free_perm_bits(perm); in alloc_perm_bits()
353 perm->readfn = vfio_default_config_read; in alloc_perm_bits()
354 perm->writefn = vfio_default_config_write; in alloc_perm_bits()
472 int count, struct perm_bits *perm, in vfio_basic_config_read() argument
478 count = vfio_default_config_read(vdev, pos, count, perm, offset, val); in vfio_basic_config_read()
493 int count, struct perm_bits *perm, in vfio_basic_config_write() argument
534 count = vfio_default_config_write(vdev, pos, count, perm, offset, val); in vfio_basic_config_write()
572 static int __init init_pci_cap_basic_perm(struct perm_bits *perm) in init_pci_cap_basic_perm() argument
574 if (alloc_perm_bits(perm, PCI_STD_HEADER_SIZEOF)) in init_pci_cap_basic_perm()
577 perm->readfn = vfio_basic_config_read; in init_pci_cap_basic_perm()
578 perm->writefn = vfio_basic_config_write; in init_pci_cap_basic_perm()
581 p_setw(perm, PCI_VENDOR_ID, (u16)ALL_VIRT, NO_WRITE); in init_pci_cap_basic_perm()
582 p_setw(perm, PCI_DEVICE_ID, (u16)ALL_VIRT, NO_WRITE); in init_pci_cap_basic_perm()
588 p_setw(perm, PCI_COMMAND, PCI_COMMAND_INTX_DISABLE, (u16)ALL_WRITE); in init_pci_cap_basic_perm()
591 p_setw(perm, PCI_STATUS, PCI_STATUS_CAP_LIST, NO_WRITE); in init_pci_cap_basic_perm()
594 p_setb(perm, PCI_CACHE_LINE_SIZE, NO_VIRT, (u8)ALL_WRITE); in init_pci_cap_basic_perm()
595 p_setb(perm, PCI_LATENCY_TIMER, NO_VIRT, (u8)ALL_WRITE); in init_pci_cap_basic_perm()
596 p_setb(perm, PCI_BIST, NO_VIRT, (u8)ALL_WRITE); in init_pci_cap_basic_perm()
599 p_setd(perm, PCI_BASE_ADDRESS_0, ALL_VIRT, ALL_WRITE); in init_pci_cap_basic_perm()
600 p_setd(perm, PCI_BASE_ADDRESS_1, ALL_VIRT, ALL_WRITE); in init_pci_cap_basic_perm()
601 p_setd(perm, PCI_BASE_ADDRESS_2, ALL_VIRT, ALL_WRITE); in init_pci_cap_basic_perm()
602 p_setd(perm, PCI_BASE_ADDRESS_3, ALL_VIRT, ALL_WRITE); in init_pci_cap_basic_perm()
603 p_setd(perm, PCI_BASE_ADDRESS_4, ALL_VIRT, ALL_WRITE); in init_pci_cap_basic_perm()
604 p_setd(perm, PCI_BASE_ADDRESS_5, ALL_VIRT, ALL_WRITE); in init_pci_cap_basic_perm()
605 p_setd(perm, PCI_ROM_ADDRESS, ALL_VIRT, ALL_WRITE); in init_pci_cap_basic_perm()
608 p_setb(perm, PCI_CAPABILITY_LIST, (u8)ALL_VIRT, NO_WRITE); in init_pci_cap_basic_perm()
611 p_setb(perm, PCI_INTERRUPT_LINE, (u8)ALL_VIRT, (u8)ALL_WRITE); in init_pci_cap_basic_perm()
614 p_setb(perm, PCI_INTERRUPT_PIN, (u8)ALL_VIRT, (u8)NO_WRITE); in init_pci_cap_basic_perm()
620 int count, struct perm_bits *perm, in vfio_pm_config_write() argument
623 count = vfio_default_config_write(vdev, pos, count, perm, offset, val); in vfio_pm_config_write()
652 static int __init init_pci_cap_pm_perm(struct perm_bits *perm) in init_pci_cap_pm_perm() argument
654 if (alloc_perm_bits(perm, pci_cap_length[PCI_CAP_ID_PM])) in init_pci_cap_pm_perm()
657 perm->writefn = vfio_pm_config_write; in init_pci_cap_pm_perm()
663 p_setb(perm, PCI_CAP_LIST_NEXT, (u8)ALL_VIRT, NO_WRITE); in init_pci_cap_pm_perm()
670 p_setd(perm, PCI_PM_CTRL, NO_VIRT, ~PCI_PM_CTRL_STATE_MASK); in init_pci_cap_pm_perm()
675 static int __init init_pci_cap_pcix_perm(struct perm_bits *perm) in init_pci_cap_pcix_perm() argument
678 if (alloc_perm_bits(perm, PCI_CAP_PCIX_SIZEOF_V2)) in init_pci_cap_pcix_perm()
681 p_setb(perm, PCI_CAP_LIST_NEXT, (u8)ALL_VIRT, NO_WRITE); in init_pci_cap_pcix_perm()
683 p_setw(perm, PCI_X_CMD, NO_VIRT, (u16)ALL_WRITE); in init_pci_cap_pcix_perm()
684 p_setd(perm, PCI_X_ECC_CSR, NO_VIRT, ALL_WRITE); in init_pci_cap_pcix_perm()
689 static int __init init_pci_cap_exp_perm(struct perm_bits *perm) in init_pci_cap_exp_perm() argument
692 if (alloc_perm_bits(perm, PCI_CAP_EXP_ENDPOINT_SIZEOF_V2)) in init_pci_cap_exp_perm()
695 p_setb(perm, PCI_CAP_LIST_NEXT, (u8)ALL_VIRT, NO_WRITE); in init_pci_cap_exp_perm()
702 p_setw(perm, PCI_EXP_DEVCTL, NO_VIRT, ~PCI_EXP_DEVCTL_PHANTOM); in init_pci_cap_exp_perm()
703 p_setw(perm, PCI_EXP_DEVCTL2, NO_VIRT, ~PCI_EXP_DEVCTL2_ARI); in init_pci_cap_exp_perm()
708 static int __init init_pci_cap_af_perm(struct perm_bits *perm) in init_pci_cap_af_perm() argument
710 if (alloc_perm_bits(perm, pci_cap_length[PCI_CAP_ID_AF])) in init_pci_cap_af_perm()
713 p_setb(perm, PCI_CAP_LIST_NEXT, (u8)ALL_VIRT, NO_WRITE); in init_pci_cap_af_perm()
714 p_setb(perm, PCI_AF_CTRL, NO_VIRT, PCI_AF_CTRL_FLR); in init_pci_cap_af_perm()
719 static int __init init_pci_ext_cap_err_perm(struct perm_bits *perm) in init_pci_ext_cap_err_perm() argument
723 if (alloc_perm_bits(perm, pci_ext_cap_length[PCI_EXT_CAP_ID_ERR])) in init_pci_ext_cap_err_perm()
731 p_setd(perm, 0, ALL_VIRT, NO_WRITE); in init_pci_ext_cap_err_perm()
751 p_setd(perm, PCI_ERR_UNCOR_STATUS, NO_VIRT, mask); in init_pci_ext_cap_err_perm()
752 p_setd(perm, PCI_ERR_UNCOR_MASK, NO_VIRT, mask); in init_pci_ext_cap_err_perm()
753 p_setd(perm, PCI_ERR_UNCOR_SEVER, NO_VIRT, mask); in init_pci_ext_cap_err_perm()
763 p_setd(perm, PCI_ERR_COR_STATUS, NO_VIRT, mask); in init_pci_ext_cap_err_perm()
764 p_setd(perm, PCI_ERR_COR_MASK, NO_VIRT, mask); in init_pci_ext_cap_err_perm()
768 p_setd(perm, PCI_ERR_CAP, NO_VIRT, mask); in init_pci_ext_cap_err_perm()
773 static int __init init_pci_ext_cap_pwr_perm(struct perm_bits *perm) in init_pci_ext_cap_pwr_perm() argument
775 if (alloc_perm_bits(perm, pci_ext_cap_length[PCI_EXT_CAP_ID_PWR])) in init_pci_ext_cap_pwr_perm()
778 p_setd(perm, 0, ALL_VIRT, NO_WRITE); in init_pci_ext_cap_pwr_perm()
781 p_setb(perm, PCI_PWR_DATA, NO_VIRT, (u8)ALL_WRITE); in init_pci_ext_cap_pwr_perm()
845 int count, struct perm_bits *perm, in vfio_msi_config_read() argument
861 return vfio_default_config_read(vdev, pos, count, perm, offset, val); in vfio_msi_config_read()
865 int count, struct perm_bits *perm, in vfio_msi_config_write() argument
868 count = vfio_default_config_write(vdev, pos, count, perm, offset, val); in vfio_msi_config_write()
910 static int init_pci_cap_msi_perm(struct perm_bits *perm, int len, u16 flags) in init_pci_cap_msi_perm() argument
912 if (alloc_perm_bits(perm, len)) in init_pci_cap_msi_perm()
915 perm->readfn = vfio_msi_config_read; in init_pci_cap_msi_perm()
916 perm->writefn = vfio_msi_config_write; in init_pci_cap_msi_perm()
918 p_setb(perm, PCI_CAP_LIST_NEXT, (u8)ALL_VIRT, NO_WRITE); in init_pci_cap_msi_perm()
924 p_setb(perm, PCI_MSI_FLAGS, (u8)ALL_VIRT, (u8)ALL_WRITE); in init_pci_cap_msi_perm()
925 p_setd(perm, PCI_MSI_ADDRESS_LO, ALL_VIRT, ALL_WRITE); in init_pci_cap_msi_perm()
927 p_setd(perm, PCI_MSI_ADDRESS_HI, ALL_VIRT, ALL_WRITE); in init_pci_cap_msi_perm()
928 p_setw(perm, PCI_MSI_DATA_64, (u16)ALL_VIRT, (u16)ALL_WRITE); in init_pci_cap_msi_perm()
930 p_setd(perm, PCI_MSI_MASK_64, NO_VIRT, ALL_WRITE); in init_pci_cap_msi_perm()
931 p_setd(perm, PCI_MSI_PENDING_64, NO_VIRT, ALL_WRITE); in init_pci_cap_msi_perm()
934 p_setw(perm, PCI_MSI_DATA_32, (u16)ALL_VIRT, (u16)ALL_WRITE); in init_pci_cap_msi_perm()
936 p_setd(perm, PCI_MSI_MASK_32, NO_VIRT, ALL_WRITE); in init_pci_cap_msi_perm()
937 p_setd(perm, PCI_MSI_PENDING_32, NO_VIRT, ALL_WRITE); in init_pci_cap_msi_perm()
1503 struct perm_bits *perm; in vfio_config_do_rw() local
1530 perm = &unassigned_perms; in vfio_config_do_rw()
1536 perm = &ecap_perms[cap_id]; in vfio_config_do_rw()
1541 perm = &cap_perms[cap_id]; in vfio_config_do_rw()
1544 perm = vdev->msi_perm; in vfio_config_do_rw()
1557 if (!perm->writefn) in vfio_config_do_rw()
1563 ret = perm->writefn(vdev, *ppos, count, perm, offset, val); in vfio_config_do_rw()
1565 if (perm->readfn) { in vfio_config_do_rw()
1566 ret = perm->readfn(vdev, *ppos, count, in vfio_config_do_rw()
1567 perm, offset, &val); in vfio_config_do_rw()