Lines Matching refs:hw_ep
217 struct musb_hw_ep *hw_ep = qh->hw_ep; in musb_start_urb() local
220 int epnum = hw_ep->epnum; in musb_start_urb()
259 musb_ep_set_qh(hw_ep, is_in, qh); in musb_start_urb()
293 hw_ep->tx_channel ? "dma" : "pio"); in musb_start_urb()
295 if (!hw_ep->tx_channel) in musb_start_urb()
296 musb_h_tx_start(hw_ep); in musb_start_urb()
298 musb_h_tx_dma_start(hw_ep); in musb_start_urb()
326 void __iomem *epio = qh->hw_ep->regs; in musb_save_toggle()
350 struct musb_hw_ep *hw_ep, int is_in) in musb_advance_schedule() argument
352 struct musb_qh *qh = musb_ep_get_qh(hw_ep, is_in); in musb_advance_schedule()
353 struct musb_hw_ep *ep = qh->hw_ep; in musb_advance_schedule()
429 hw_ep->epnum, is_in ? 'R' : 'T', next_urb(qh)); in musb_advance_schedule()
434 static u16 musb_h_flush_rxfifo(struct musb_hw_ep *hw_ep, u16 csr) in musb_h_flush_rxfifo() argument
446 musb_writew(hw_ep->regs, MUSB_RXCSR, csr); in musb_h_flush_rxfifo()
447 musb_writew(hw_ep->regs, MUSB_RXCSR, csr); in musb_h_flush_rxfifo()
450 return musb_readw(hw_ep->regs, MUSB_RXCSR); in musb_h_flush_rxfifo()
465 struct musb_hw_ep *hw_ep = musb->endpoints + epnum; in musb_host_packet_rx() local
466 void __iomem *epio = hw_ep->regs; in musb_host_packet_rx()
467 struct musb_qh *qh = hw_ep->in_qh; in musb_host_packet_rx()
532 musb_read_fifo(hw_ep, length, buf); in musb_host_packet_rx()
537 musb_h_flush_rxfifo(hw_ep, csr); in musb_host_packet_rx()
621 struct musb_hw_ep *hw_ep, struct musb_qh *qh, in musb_tx_dma_program() argument
624 struct dma_channel *channel = hw_ep->tx_channel; in musb_tx_dma_program()
625 void __iomem *epio = hw_ep->regs; in musb_tx_dma_program()
649 can_bulk_split(hw_ep->musb, qh->type))) in musb_tx_dma_program()
682 hw_ep->tx_channel = NULL; in musb_tx_dma_program()
704 struct musb_hw_ep *hw_ep = musb->endpoints + epnum; in musb_ep_program() local
705 void __iomem *epio = hw_ep->regs; in musb_ep_program()
706 struct musb_qh *qh = musb_ep_get_qh(hw_ep, !is_out); in musb_ep_program()
726 hw_ep->tx_channel = NULL; in musb_ep_program()
732 dma_channel = is_out ? hw_ep->tx_channel : hw_ep->rx_channel; in musb_ep_program()
735 dma_controller, hw_ep, is_out); in musb_ep_program()
737 hw_ep->tx_channel = dma_channel; in musb_ep_program()
739 hw_ep->rx_channel = dma_channel; in musb_ep_program()
766 if (!hw_ep->tx_double_buffered) in musb_ep_program()
767 musb_h_tx_flush_fifo(hw_ep); in musb_ep_program()
784 if (!hw_ep->tx_double_buffered) { in musb_ep_program()
799 musb_h_ep0_flush_fifo(hw_ep); in musb_ep_program()
816 hw_ep->max_packet_sz_tx); in musb_ep_program()
818 qh->hb_mult = hw_ep->max_packet_sz_tx in musb_ep_program()
836 load_count = min((u32) hw_ep->max_packet_sz_tx, in musb_ep_program()
842 hw_ep, qh, urb, offset, len)) in musb_ep_program()
863 musb_write_fifo(hw_ep, load_count, buf); in musb_ep_program()
867 musb_write_fifo(hw_ep, load_count, buf); in musb_ep_program()
877 if (hw_ep->rx_reinit) { in musb_ep_program()
878 musb_rx_reinit(musb, qh, hw_ep); in musb_ep_program()
890 csr = musb_readw(hw_ep->regs, MUSB_RXCSR); in musb_ep_program()
896 hw_ep->epnum, csr); in musb_ep_program()
910 musb_writew(hw_ep->regs, MUSB_RXCSR, csr); in musb_ep_program()
911 csr = musb_readw(hw_ep->regs, MUSB_RXCSR); in musb_ep_program()
924 hw_ep->rx_channel = dma_channel = NULL; in musb_ep_program()
931 musb_writew(hw_ep->regs, MUSB_RXCSR, csr); in musb_ep_program()
932 csr = musb_readw(hw_ep->regs, MUSB_RXCSR); in musb_ep_program()
1013 struct musb_hw_ep *hw_ep = musb->control_ep; in musb_h_ep0_continue() local
1014 struct musb_qh *qh = hw_ep->in_qh; in musb_h_ep0_continue()
1025 musb_read_fifo(hw_ep, fifo_count, fifo_dest); in musb_h_ep0_continue()
1064 musb_write_fifo(hw_ep, fifo_count, fifo_dest); in musb_h_ep0_continue()
1090 struct musb_hw_ep *hw_ep = musb->control_ep; in musb_h_ep0_irq() local
1091 void __iomem *epio = hw_ep->regs; in musb_h_ep0_irq()
1092 struct musb_qh *qh = hw_ep->in_qh; in musb_h_ep0_irq()
1152 musb_h_ep0_flush_fifo(hw_ep); in musb_h_ep0_irq()
1166 musb_h_ep0_flush_fifo(hw_ep); in musb_h_ep0_irq()
1202 musb_advance_schedule(musb, urb, hw_ep, 1); in musb_h_ep0_irq()
1232 struct musb_hw_ep *hw_ep = musb->endpoints + epnum; in musb_host_tx() local
1233 void __iomem *epio = hw_ep->regs; in musb_host_tx()
1234 struct musb_qh *qh = hw_ep->out_qh; in musb_host_tx()
1251 dma = is_dma_capable() ? hw_ep->tx_channel : NULL; in musb_host_tx()
1274 musb_bulk_nak_timeout(musb, hw_ep, 0); in musb_host_tx()
1304 musb_h_tx_flush_fifo(hw_ep); in musb_host_tx()
1439 musb_advance_schedule(musb, urb, hw_ep, USB_DIR_OUT); in musb_host_tx()
1442 if (musb_tx_dma_program(musb->dma_controller, hw_ep, qh, urb, in musb_host_tx()
1445 musb_h_tx_dma_start(hw_ep); in musb_host_tx()
1482 musb_write_fifo(hw_ep, length, urb->transfer_buffer); in musb_host_tx()
1486 musb_write_fifo(hw_ep, length, urb->transfer_buffer + offset); in musb_host_tx()
1548 struct musb_hw_ep *hw_ep = musb->endpoints + epnum; in musb_host_rx() local
1549 void __iomem *epio = hw_ep->regs; in musb_host_rx()
1550 struct musb_qh *qh = hw_ep->in_qh; in musb_host_rx()
1564 dma = is_dma_capable() ? hw_ep->rx_channel : NULL; in musb_host_rx()
1578 musb_h_flush_rxfifo(hw_ep, MUSB_RXCSR_CLRDATATOG); in musb_host_rx()
1618 musb_bulk_nak_timeout(musb, hw_ep, 1); in musb_host_rx()
1646 musb_h_flush_rxfifo(hw_ep, MUSB_RXCSR_CLRDATATOG); in musb_host_rx()
1695 musb_writew(hw_ep->regs, MUSB_RXCSR, val); in musb_host_rx()
1728 musb_writew(hw_ep->regs, MUSB_RXCSR, val); in musb_host_rx()
1834 if (rx_count < hw_ep->max_packet_sz_rx) { in musb_host_rx()
1885 hw_ep->rx_channel = NULL; in musb_host_rx()
1947 musb_advance_schedule(musb, urb, hw_ep, USB_DIR_IN); in musb_host_rx()
1964 struct musb_hw_ep *hw_ep = NULL; in musb_schedule() local
1973 hw_ep = musb->control_ep; in musb_schedule()
1989 for (epnum = 1, hw_ep = musb->endpoints + 1; in musb_schedule()
1991 epnum++, hw_ep++) { in musb_schedule()
1994 if (musb_ep_get_qh(hw_ep, is_in) != NULL) in musb_schedule()
1997 if (hw_ep == musb->bulk_ep) in musb_schedule()
2001 diff = hw_ep->max_packet_sz_rx; in musb_schedule()
2003 diff = hw_ep->max_packet_sz_tx; in musb_schedule()
2020 hw_ep = musb->endpoints + epnum; in musb_schedule()
2022 txtype = (musb_readb(hw_ep->regs, MUSB_TXTYPE) in musb_schedule()
2034 hw_ep = musb->bulk_ep; in musb_schedule()
2057 hw_ep = musb->endpoints + best_end; in musb_schedule()
2065 qh->hw_ep = hw_ep; in musb_schedule()
2263 struct musb_hw_ep *ep = qh->hw_ep; in musb_cleanup_urb()
2355 || musb_ep_get_qh(qh->hw_ep, is_in) != qh) { in musb_urb_dequeue()
2397 if (musb_ep_get_qh(qh->hw_ep, is_in) == qh) { in musb_h_disable()
2413 musb_advance_schedule(musb, urb, qh->hw_ep, is_in); in musb_h_disable()