110 static void musb_h_tx_flush_fifo(struct musb_hw_ep *ep)  in musb_h_tx_flush_fifo()  argument
112 	struct musb	*musb = ep->musb;  in musb_h_tx_flush_fifo()
113 	void __iomem	*epio = ep->regs;  in musb_h_tx_flush_fifo()
128 				ep->epnum, csr))  in musb_h_tx_flush_fifo()
134 static void musb_h_ep0_flush_fifo(struct musb_hw_ep *ep)  in musb_h_ep0_flush_fifo()  argument
136 	void __iomem	*epio = ep->regs;  in musb_h_ep0_flush_fifo()
151 			ep->epnum, csr);  in musb_h_ep0_flush_fifo()
161 static inline void musb_h_tx_start(struct musb_hw_ep *ep)  in musb_h_tx_start()  argument
166 	if (ep->epnum) {  in musb_h_tx_start()
167 		txcsr = musb_readw(ep->regs, MUSB_TXCSR);  in musb_h_tx_start()
169 		musb_writew(ep->regs, MUSB_TXCSR, txcsr);  in musb_h_tx_start()
172 		musb_writew(ep->regs, MUSB_CSR0, txcsr);  in musb_h_tx_start()
177 static inline void musb_h_tx_dma_start(struct musb_hw_ep *ep)  in musb_h_tx_dma_start()  argument
182 	txcsr = musb_readw(ep->regs, MUSB_TXCSR);  in musb_h_tx_dma_start()
186 	musb_writew(ep->regs, MUSB_TXCSR, txcsr);  in musb_h_tx_dma_start()
189 static void musb_ep_set_qh(struct musb_hw_ep *ep, int is_in, struct musb_qh *qh)  in musb_ep_set_qh()  argument
191 	if (is_in != 0 || ep->is_shared_fifo)  in musb_ep_set_qh()
192 		ep->in_qh  = qh;  in musb_ep_set_qh()
193 	if (is_in == 0 || ep->is_shared_fifo)  in musb_ep_set_qh()
194 		ep->out_qh = qh;  in musb_ep_set_qh()
197 static struct musb_qh *musb_ep_get_qh(struct musb_hw_ep *ep, int is_in)  in musb_ep_get_qh()  argument
199 	return is_in ? ep->in_qh : ep->out_qh;  in musb_ep_get_qh()
353 	struct musb_hw_ep	*ep = qh->hw_ep;  in musb_advance_schedule()  local
383 			ep->rx_reinit = 1;  in musb_advance_schedule()
384 			if (ep->rx_channel) {  in musb_advance_schedule()
385 				dma->channel_release(ep->rx_channel);  in musb_advance_schedule()
386 				ep->rx_channel = NULL;  in musb_advance_schedule()
389 			ep->tx_reinit = 1;  in musb_advance_schedule()
390 			if (ep->tx_channel) {  in musb_advance_schedule()
391 				dma->channel_release(ep->tx_channel);  in musb_advance_schedule()
392 				ep->tx_channel = NULL;  in musb_advance_schedule()
397 		musb_ep_set_qh(ep, is_in, NULL);  in musb_advance_schedule()
558 musb_rx_reinit(struct musb *musb, struct musb_qh *qh, struct musb_hw_ep *ep)  in musb_rx_reinit()  argument
568 	if (ep->is_shared_fifo) {  in musb_rx_reinit()
569 		csr = musb_readw(ep->regs, MUSB_TXCSR);  in musb_rx_reinit()
571 			musb_h_tx_flush_fifo(ep);  in musb_rx_reinit()
572 			csr = musb_readw(ep->regs, MUSB_TXCSR);  in musb_rx_reinit()
573 			musb_writew(ep->regs, MUSB_TXCSR,  in musb_rx_reinit()
582 			musb_writew(ep->regs, MUSB_TXCSR, MUSB_TXCSR_DMAMODE);  in musb_rx_reinit()
583 		musb_writew(ep->regs, MUSB_TXCSR, 0);  in musb_rx_reinit()
587 		csr = musb_readw(ep->regs, MUSB_RXCSR);  in musb_rx_reinit()
589 			WARNING("rx%d, packet/%d ready?\n", ep->epnum,  in musb_rx_reinit()
590 				musb_readw(ep->regs, MUSB_RXCOUNT));  in musb_rx_reinit()
592 		musb_h_flush_rxfifo(ep, MUSB_RXCSR_CLRDATATOG);  in musb_rx_reinit()
597 		musb_write_rxfunaddr(ep->target_regs, qh->addr_reg);  in musb_rx_reinit()
598 		musb_write_rxhubaddr(ep->target_regs, qh->h_addr_reg);  in musb_rx_reinit()
599 		musb_write_rxhubport(ep->target_regs, qh->h_port_reg);  in musb_rx_reinit()
605 	musb_writeb(ep->regs, MUSB_RXTYPE, qh->type_reg);  in musb_rx_reinit()
606 	musb_writeb(ep->regs, MUSB_RXINTERVAL, qh->intv_reg);  in musb_rx_reinit()
612 		musb_writew(ep->regs, MUSB_RXMAXP, ep->max_packet_sz_rx);  in musb_rx_reinit()
614 		musb_writew(ep->regs, MUSB_RXMAXP,  in musb_rx_reinit()
617 	ep->rx_reinit = 0;  in musb_rx_reinit()
939 static void musb_bulk_nak_timeout(struct musb *musb, struct musb_hw_ep *ep,  in musb_bulk_nak_timeout()  argument
945 	void __iomem		*epio = ep->regs;  in musb_bulk_nak_timeout()
949 	musb_ep_select(mbase, ep->epnum);  in musb_bulk_nak_timeout()
951 		dma = is_dma_capable() ? ep->rx_channel : NULL;  in musb_bulk_nak_timeout()
961 		dma = is_dma_capable() ? ep->tx_channel : NULL;  in musb_bulk_nak_timeout()
989 			ep->rx_reinit = 1;  in musb_bulk_nak_timeout()
998 			ep->tx_reinit = 1;  in musb_bulk_nak_timeout()
2079 	struct usb_host_endpoint	*hep = urb->ep;  in musb_urb_enqueue()
2263 	struct musb_hw_ep	*ep = qh->hw_ep;  in musb_cleanup_urb()  local
2264 	struct musb		*musb = ep->musb;  in musb_cleanup_urb()
2265 	void __iomem		*epio = ep->regs;  in musb_cleanup_urb()
2266 	unsigned		hw_end = ep->epnum;  in musb_cleanup_urb()
2267 	void __iomem		*regs = ep->musb->mregs;  in musb_cleanup_urb()
2277 		dma = is_in ? ep->rx_channel : ep->tx_channel;  in musb_cleanup_urb()
2279 			status = ep->musb->dma_controller->channel_abort(dma);  in musb_cleanup_urb()
2282 				is_in ? 'R' : 'T', ep->epnum,  in musb_cleanup_urb()
2289 	if (ep->epnum && is_in) {  in musb_cleanup_urb()
2291 		csr = musb_h_flush_rxfifo(ep, 0);  in musb_cleanup_urb()
2297 	} else if (ep->epnum) {  in musb_cleanup_urb()
2298 		musb_h_tx_flush_fifo(ep);  in musb_cleanup_urb()
2312 		musb_h_ep0_flush_fifo(ep);  in musb_cleanup_urb()
2315 		musb_advance_schedule(ep->musb, urb, ep, is_in);  in musb_cleanup_urb()