262 	u16			fifo_count = 0, csr;  in txstate()  local
281 	csr = musb_readw(epio, MUSB_TXCSR);  in txstate()
287 	if (csr & MUSB_TXCSR_TXPKTRDY) {  in txstate()
289 				musb_ep->end_point.name, csr);  in txstate()
293 	if (csr & MUSB_TXCSR_P_SENDSTALL) {  in txstate()
295 				musb_ep->end_point.name, csr);  in txstate()
301 			csr);  in txstate()
335 					csr &= ~(MUSB_TXCSR_AUTOSET  in txstate()
337 					musb_writew(epio, MUSB_TXCSR, csr  in txstate()
339 					csr &= ~MUSB_TXCSR_DMAMODE;  in txstate()
340 					csr |= (MUSB_TXCSR_DMAENAB |  in txstate()
344 					csr |= (MUSB_TXCSR_DMAENAB  in txstate()
360 						csr |= MUSB_TXCSR_AUTOSET;  in txstate()
362 				csr &= ~MUSB_TXCSR_P_UNDERRUN;  in txstate()
364 				musb_writew(epio, MUSB_TXCSR, csr);  in txstate()
371 			csr &= ~(MUSB_TXCSR_P_UNDERRUN | MUSB_TXCSR_TXPKTRDY);  in txstate()
372 			csr |= MUSB_TXCSR_DMAENAB | MUSB_TXCSR_DMAMODE |  in txstate()
375 						~MUSB_TXCSR_P_UNDERRUN) | csr);  in txstate()
378 			csr = musb_readw(epio, MUSB_TXCSR);  in txstate()
401 				csr &= ~MUSB_TXCSR_DMAENAB;  in txstate()
402 				musb_writew(epio, MUSB_TXCSR, csr);  in txstate()
424 		csr |= MUSB_TXCSR_TXPKTRDY;  in txstate()
425 		csr &= ~MUSB_TXCSR_P_UNDERRUN;  in txstate()
426 		musb_writew(epio, MUSB_TXCSR, csr);  in txstate()
444 	u16			csr;  in musb_g_tx()  local
456 	csr = musb_readw(epio, MUSB_TXCSR);  in musb_g_tx()
457 	dev_dbg(musb->controller, "<== %s, txcsr %04x\n", musb_ep->end_point.name, csr);  in musb_g_tx()
465 	if (csr & MUSB_TXCSR_P_SENTSTALL) {  in musb_g_tx()
466 		csr |=	MUSB_TXCSR_P_WZC_BITS;  in musb_g_tx()
467 		csr &= ~MUSB_TXCSR_P_SENTSTALL;  in musb_g_tx()
468 		musb_writew(epio, MUSB_TXCSR, csr);  in musb_g_tx()
472 	if (csr & MUSB_TXCSR_P_UNDERRUN) {  in musb_g_tx()
474 		csr |=	 MUSB_TXCSR_P_WZC_BITS;  in musb_g_tx()
475 		csr &= ~(MUSB_TXCSR_P_UNDERRUN | MUSB_TXCSR_TXPKTRDY);  in musb_g_tx()
476 		musb_writew(epio, MUSB_TXCSR, csr);  in musb_g_tx()
493 		if (dma && (csr & MUSB_TXCSR_DMAENAB)) {  in musb_g_tx()
495 			csr |= MUSB_TXCSR_P_WZC_BITS;  in musb_g_tx()
496 			csr &= ~(MUSB_TXCSR_DMAENAB | MUSB_TXCSR_P_UNDERRUN |  in musb_g_tx()
498 			musb_writew(epio, MUSB_TXCSR, csr);  in musb_g_tx()
500 			csr = musb_readw(epio, MUSB_TXCSR);  in musb_g_tx()
503 				epnum, csr, musb_ep->dma->actual_len, request);  in musb_g_tx()
523 			if (csr & MUSB_TXCSR_TXPKTRDY)  in musb_g_tx()
568 	u16			csr = musb_readw(epio, MUSB_RXCSR);  in rxstate()  local
592 	if (csr & MUSB_RXCSR_P_SENDSTALL) {  in rxstate()
594 		    musb_ep->end_point.name, csr);  in rxstate()
617 			csr &= ~(MUSB_RXCSR_AUTOCLEAR  in rxstate()
619 			csr |= MUSB_RXCSR_DMAENAB | MUSB_RXCSR_P_WZC_BITS;  in rxstate()
620 			musb_writew(epio, MUSB_RXCSR, csr);  in rxstate()
625 	if (csr & MUSB_RXCSR_RXPKTRDY) {  in rxstate()
673 					csr |= MUSB_RXCSR_AUTOCLEAR;  in rxstate()
674 					musb_writew(epio, MUSB_RXCSR, csr);  in rxstate()
675 					csr |= MUSB_RXCSR_DMAENAB;  in rxstate()
676 					musb_writew(epio, MUSB_RXCSR, csr);  in rxstate()
684 						csr | MUSB_RXCSR_DMAMODE);  in rxstate()
685 					musb_writew(epio, MUSB_RXCSR, csr);  in rxstate()
695 						csr |= MUSB_RXCSR_AUTOCLEAR;  in rxstate()
696 					csr |= MUSB_RXCSR_DMAENAB;  in rxstate()
697 					musb_writew(epio, MUSB_RXCSR, csr);  in rxstate()
740 				csr &= ~MUSB_RXCSR_DMAMODE;  in rxstate()
741 				csr |= (MUSB_RXCSR_DMAENAB |  in rxstate()
744 				musb_writew(epio, MUSB_RXCSR, csr);  in rxstate()
751 					csr |= MUSB_RXCSR_DMAMODE;  in rxstate()
752 					musb_writew(epio, MUSB_RXCSR, csr);  in rxstate()
802 				csr &= ~(MUSB_RXCSR_DMAENAB | MUSB_RXCSR_AUTOCLEAR);  in rxstate()
803 				musb_writew(epio, MUSB_RXCSR, csr);  in rxstate()
815 			csr |= MUSB_RXCSR_P_WZC_BITS;  in rxstate()
816 			csr &= ~MUSB_RXCSR_RXPKTRDY;  in rxstate()
817 			musb_writew(epio, MUSB_RXCSR, csr);  in rxstate()
832 	u16			csr;  in musb_g_rx()  local
854 	csr = musb_readw(epio, MUSB_RXCSR);  in musb_g_rx()
858 			csr, dma ? " (dma)" : "", request);  in musb_g_rx()
860 	if (csr & MUSB_RXCSR_P_SENTSTALL) {  in musb_g_rx()
861 		csr |= MUSB_RXCSR_P_WZC_BITS;  in musb_g_rx()
862 		csr &= ~MUSB_RXCSR_P_SENTSTALL;  in musb_g_rx()
863 		musb_writew(epio, MUSB_RXCSR, csr);  in musb_g_rx()
867 	if (csr & MUSB_RXCSR_P_OVERRUN) {  in musb_g_rx()
869 		csr &= ~MUSB_RXCSR_P_OVERRUN;  in musb_g_rx()
870 		musb_writew(epio, MUSB_RXCSR, csr);  in musb_g_rx()
876 	if (csr & MUSB_RXCSR_INCOMPRX) {  in musb_g_rx()
884 			musb_ep->end_point.name, csr);  in musb_g_rx()
888 	if (dma && (csr & MUSB_RXCSR_DMAENAB)) {  in musb_g_rx()
889 		csr &= ~(MUSB_RXCSR_AUTOCLEAR  in musb_g_rx()
893 			MUSB_RXCSR_P_WZC_BITS | csr);  in musb_g_rx()
898 			epnum, csr,  in musb_g_rx()
909 			csr &= ~MUSB_RXCSR_RXPKTRDY;  in musb_g_rx()
910 			musb_writew(epio, MUSB_RXCSR, csr);  in musb_g_rx()
920 			csr = musb_readw(epio, MUSB_RXCSR);  in musb_g_rx()
921 			if ((csr & MUSB_RXCSR_RXPKTRDY) &&  in musb_g_rx()
962 	u16		csr;  in musb_gadget_enable()  local
1045 		csr = MUSB_TXCSR_MODE | MUSB_TXCSR_CLRDATATOG;  in musb_gadget_enable()
1048 			csr |= MUSB_TXCSR_FLUSHFIFO;  in musb_gadget_enable()
1050 			csr |= MUSB_TXCSR_P_ISO;  in musb_gadget_enable()
1053 		musb_writew(regs, MUSB_TXCSR, csr);  in musb_gadget_enable()
1055 		musb_writew(regs, MUSB_TXCSR, csr);  in musb_gadget_enable()
1086 			csr = musb_readw(regs, MUSB_TXCSR);  in musb_gadget_enable()
1087 			csr &= ~(MUSB_TXCSR_MODE | MUSB_TXCSR_TXPKTRDY);  in musb_gadget_enable()
1088 			musb_writew(regs, MUSB_TXCSR, csr);  in musb_gadget_enable()
1091 		csr = MUSB_RXCSR_FLUSHFIFO | MUSB_RXCSR_CLRDATATOG;  in musb_gadget_enable()
1093 			csr |= MUSB_RXCSR_P_ISO;  in musb_gadget_enable()
1095 			csr |= MUSB_RXCSR_DISNYET;  in musb_gadget_enable()
1098 		musb_writew(regs, MUSB_RXCSR, csr);  in musb_gadget_enable()
1099 		musb_writew(regs, MUSB_RXCSR, csr);  in musb_gadget_enable()
1360 	u16			csr;  in musb_gadget_set_halt()  local
1387 			csr = musb_readw(epio, MUSB_TXCSR);  in musb_gadget_set_halt()
1388 			if (csr & MUSB_TXCSR_FIFONOTEMPTY) {  in musb_gadget_set_halt()
1400 		csr = musb_readw(epio, MUSB_TXCSR);  in musb_gadget_set_halt()
1401 		csr |= MUSB_TXCSR_P_WZC_BITS  in musb_gadget_set_halt()
1404 			csr |= MUSB_TXCSR_P_SENDSTALL;  in musb_gadget_set_halt()
1406 			csr &= ~(MUSB_TXCSR_P_SENDSTALL  in musb_gadget_set_halt()
1408 		csr &= ~MUSB_TXCSR_TXPKTRDY;  in musb_gadget_set_halt()
1409 		musb_writew(epio, MUSB_TXCSR, csr);  in musb_gadget_set_halt()
1411 		csr = musb_readw(epio, MUSB_RXCSR);  in musb_gadget_set_halt()
1412 		csr |= MUSB_RXCSR_P_WZC_BITS  in musb_gadget_set_halt()
1416 			csr |= MUSB_RXCSR_P_SENDSTALL;  in musb_gadget_set_halt()
1418 			csr &= ~(MUSB_RXCSR_P_SENDSTALL  in musb_gadget_set_halt()
1420 		musb_writew(epio, MUSB_RXCSR, csr);  in musb_gadget_set_halt()
1480 	u16		csr;  in musb_gadget_fifo_flush()  local
1491 		csr = musb_readw(epio, MUSB_TXCSR);  in musb_gadget_fifo_flush()
1492 		if (csr & MUSB_TXCSR_FIFONOTEMPTY) {  in musb_gadget_fifo_flush()
1493 			csr |= MUSB_TXCSR_FLUSHFIFO | MUSB_TXCSR_P_WZC_BITS;  in musb_gadget_fifo_flush()
1499 			csr &= ~MUSB_TXCSR_TXPKTRDY;  in musb_gadget_fifo_flush()
1500 			musb_writew(epio, MUSB_TXCSR, csr);  in musb_gadget_fifo_flush()
1502 			musb_writew(epio, MUSB_TXCSR, csr);  in musb_gadget_fifo_flush()
1505 		csr = musb_readw(epio, MUSB_RXCSR);  in musb_gadget_fifo_flush()
1506 		csr |= MUSB_RXCSR_FLUSHFIFO | MUSB_RXCSR_P_WZC_BITS;  in musb_gadget_fifo_flush()
1507 		musb_writew(epio, MUSB_RXCSR, csr);  in musb_gadget_fifo_flush()
1508 		musb_writew(epio, MUSB_RXCSR, csr);  in musb_gadget_fifo_flush()