Lines Matching refs:musb
127 static inline struct musb *dev_to_musb(struct device *dev) in dev_to_musb()
290 struct musb *musb = hw_ep->musb; in musb_default_write_fifo() local
298 dev_dbg(musb->controller, "%cX ep%d fifo %p count %d buf %p\n", in musb_default_write_fifo()
334 struct musb *musb = hw_ep->musb; in musb_default_read_fifo() local
340 dev_dbg(musb->controller, "%cX ep%d fifo %p count %d buf %p\n", in musb_default_read_fifo()
397 return hw_ep->musb->io.read_fifo(hw_ep, len, dst); in musb_read_fifo()
402 return hw_ep->musb->io.write_fifo(hw_ep, len, src); in musb_write_fifo()
427 void musb_load_testpacket(struct musb *musb) in musb_load_testpacket() argument
429 void __iomem *regs = musb->endpoints[0].regs; in musb_load_testpacket()
431 musb_ep_select(musb->mregs, 0); in musb_load_testpacket()
432 musb_write_fifo(musb->control_ep, in musb_load_testpacket()
444 struct musb *musb = (struct musb *)data; in musb_otg_timer_func() local
447 spin_lock_irqsave(&musb->lock, flags); in musb_otg_timer_func()
448 switch (musb->xceiv->otg->state) { in musb_otg_timer_func()
450 dev_dbg(musb->controller, "HNP: b_wait_acon timeout; back to b_peripheral\n"); in musb_otg_timer_func()
451 musb_g_disconnect(musb); in musb_otg_timer_func()
452 musb->xceiv->otg->state = OTG_STATE_B_PERIPHERAL; in musb_otg_timer_func()
453 musb->is_active = 0; in musb_otg_timer_func()
457 dev_dbg(musb->controller, "HNP: %s timeout\n", in musb_otg_timer_func()
458 usb_otg_state_string(musb->xceiv->otg->state)); in musb_otg_timer_func()
459 musb_platform_set_vbus(musb, 0); in musb_otg_timer_func()
460 musb->xceiv->otg->state = OTG_STATE_A_WAIT_VFALL; in musb_otg_timer_func()
463 dev_dbg(musb->controller, "HNP: Unhandled mode %s\n", in musb_otg_timer_func()
464 usb_otg_state_string(musb->xceiv->otg->state)); in musb_otg_timer_func()
466 spin_unlock_irqrestore(&musb->lock, flags); in musb_otg_timer_func()
472 void musb_hnp_stop(struct musb *musb) in musb_hnp_stop() argument
474 struct usb_hcd *hcd = musb->hcd; in musb_hnp_stop()
475 void __iomem *mbase = musb->mregs; in musb_hnp_stop()
478 dev_dbg(musb->controller, "HNP: stop from %s\n", in musb_hnp_stop()
479 usb_otg_state_string(musb->xceiv->otg->state)); in musb_hnp_stop()
481 switch (musb->xceiv->otg->state) { in musb_hnp_stop()
483 musb_g_disconnect(musb); in musb_hnp_stop()
484 dev_dbg(musb->controller, "HNP: back to %s\n", in musb_hnp_stop()
485 usb_otg_state_string(musb->xceiv->otg->state)); in musb_hnp_stop()
488 dev_dbg(musb->controller, "HNP: Disabling HR\n"); in musb_hnp_stop()
491 musb->xceiv->otg->state = OTG_STATE_B_PERIPHERAL; in musb_hnp_stop()
492 MUSB_DEV_MODE(musb); in musb_hnp_stop()
499 dev_dbg(musb->controller, "HNP: Stopping in unknown state %s\n", in musb_hnp_stop()
500 usb_otg_state_string(musb->xceiv->otg->state)); in musb_hnp_stop()
508 musb->port1_status &= ~(USB_PORT_STAT_C_CONNECTION << 16); in musb_hnp_stop()
511 static void musb_recover_from_babble(struct musb *musb);
525 static irqreturn_t musb_stage0_irq(struct musb *musb, u8 int_usb, in musb_stage0_irq() argument
530 dev_dbg(musb->controller, "<== DevCtl=%02x, int_usb=0x%x\n", devctl, in musb_stage0_irq()
539 dev_dbg(musb->controller, "RESUME (%s)\n", in musb_stage0_irq()
540 usb_otg_state_string(musb->xceiv->otg->state)); in musb_stage0_irq()
543 switch (musb->xceiv->otg->state) { in musb_stage0_irq()
549 musb->port1_status |= in musb_stage0_irq()
552 musb->rh_timer = jiffies in musb_stage0_irq()
554 musb->need_finish_resume = 1; in musb_stage0_irq()
556 musb->xceiv->otg->state = OTG_STATE_A_HOST; in musb_stage0_irq()
557 musb->is_active = 1; in musb_stage0_irq()
558 musb_host_resume_root_hub(musb); in musb_stage0_irq()
561 musb->xceiv->otg->state = OTG_STATE_B_PERIPHERAL; in musb_stage0_irq()
562 musb->is_active = 1; in musb_stage0_irq()
563 MUSB_DEV_MODE(musb); in musb_stage0_irq()
568 usb_otg_state_string(musb->xceiv->otg->state)); in musb_stage0_irq()
571 switch (musb->xceiv->otg->state) { in musb_stage0_irq()
574 musb->xceiv->otg->state = OTG_STATE_A_HOST; in musb_stage0_irq()
575 musb_host_resume_root_hub(musb); in musb_stage0_irq()
585 musb->int_usb |= MUSB_INTR_DISCONNECT; in musb_stage0_irq()
586 musb->int_usb &= ~MUSB_INTR_SUSPEND; in musb_stage0_irq()
589 musb_g_resume(musb); in musb_stage0_irq()
592 musb->int_usb &= ~MUSB_INTR_SUSPEND; in musb_stage0_irq()
597 usb_otg_state_string(musb->xceiv->otg->state)); in musb_stage0_irq()
604 void __iomem *mbase = musb->mregs; in musb_stage0_irq()
608 dev_dbg(musb->controller, "SessReq while on B state\n"); in musb_stage0_irq()
612 dev_dbg(musb->controller, "SESSION_REQUEST (%s)\n", in musb_stage0_irq()
613 usb_otg_state_string(musb->xceiv->otg->state)); in musb_stage0_irq()
623 musb->ep0_stage = MUSB_EP0_START; in musb_stage0_irq()
624 musb->xceiv->otg->state = OTG_STATE_A_IDLE; in musb_stage0_irq()
625 MUSB_HST_MODE(musb); in musb_stage0_irq()
626 musb_platform_set_vbus(musb, 1); in musb_stage0_irq()
650 switch (musb->xceiv->otg->state) { in musb_stage0_irq()
660 if (musb->vbuserr_retry) { in musb_stage0_irq()
661 void __iomem *mbase = musb->mregs; in musb_stage0_irq()
663 musb->vbuserr_retry--; in musb_stage0_irq()
668 musb->port1_status |= in musb_stage0_irq()
677 dev_printk(ignore ? KERN_DEBUG : KERN_ERR, musb->controller, in musb_stage0_irq()
679 usb_otg_state_string(musb->xceiv->otg->state), in musb_stage0_irq()
693 VBUSERR_RETRY_COUNT - musb->vbuserr_retry, in musb_stage0_irq()
694 musb->port1_status); in musb_stage0_irq()
698 musb_platform_set_vbus(musb, 0); in musb_stage0_irq()
703 dev_dbg(musb->controller, "SUSPEND (%s) devctl %02x\n", in musb_stage0_irq()
704 usb_otg_state_string(musb->xceiv->otg->state), devctl); in musb_stage0_irq()
707 switch (musb->xceiv->otg->state) { in musb_stage0_irq()
716 musb_hnp_stop(musb); in musb_stage0_irq()
717 musb_host_resume_root_hub(musb); in musb_stage0_irq()
718 musb_root_disconnect(musb); in musb_stage0_irq()
719 musb_platform_try_idle(musb, jiffies in musb_stage0_irq()
720 + msecs_to_jiffies(musb->a_wait_bcon in musb_stage0_irq()
725 if (!musb->is_active) in musb_stage0_irq()
728 musb_g_suspend(musb); in musb_stage0_irq()
729 musb->is_active = musb->g.b_hnp_enable; in musb_stage0_irq()
730 if (musb->is_active) { in musb_stage0_irq()
731 musb->xceiv->otg->state = OTG_STATE_B_WAIT_ACON; in musb_stage0_irq()
732 dev_dbg(musb->controller, "HNP: Setting timer for b_ase0_brst\n"); in musb_stage0_irq()
733 mod_timer(&musb->otg_timer, jiffies in musb_stage0_irq()
739 if (musb->a_wait_bcon != 0) in musb_stage0_irq()
740 musb_platform_try_idle(musb, jiffies in musb_stage0_irq()
741 + msecs_to_jiffies(musb->a_wait_bcon)); in musb_stage0_irq()
744 musb->xceiv->otg->state = OTG_STATE_A_SUSPEND; in musb_stage0_irq()
745 musb->is_active = musb->hcd->self.b_hnp_enable; in musb_stage0_irq()
749 dev_dbg(musb->controller, "REVISIT: SUSPEND as B_HOST\n"); in musb_stage0_irq()
753 musb->is_active = 0; in musb_stage0_irq()
759 struct usb_hcd *hcd = musb->hcd; in musb_stage0_irq()
762 musb->is_active = 1; in musb_stage0_irq()
764 musb->ep0_stage = MUSB_EP0_START; in musb_stage0_irq()
766 musb->intrtxe = musb->epmask; in musb_stage0_irq()
767 musb_writew(musb->mregs, MUSB_INTRTXE, musb->intrtxe); in musb_stage0_irq()
768 musb->intrrxe = musb->epmask & 0xfffe; in musb_stage0_irq()
769 musb_writew(musb->mregs, MUSB_INTRRXE, musb->intrrxe); in musb_stage0_irq()
770 musb_writeb(musb->mregs, MUSB_INTRUSBE, 0xf7); in musb_stage0_irq()
771 musb->port1_status &= ~(USB_PORT_STAT_LOW_SPEED in musb_stage0_irq()
775 musb->port1_status |= USB_PORT_STAT_CONNECTION in musb_stage0_irq()
780 musb->port1_status |= USB_PORT_STAT_LOW_SPEED; in musb_stage0_irq()
783 switch (musb->xceiv->otg->state) { in musb_stage0_irq()
786 dev_dbg(musb->controller, "HNP: SUSPEND+CONNECT, now b_host\n"); in musb_stage0_irq()
790 dev_dbg(musb->controller, "CONNECT as b_peripheral???\n"); in musb_stage0_irq()
793 dev_dbg(musb->controller, "HNP: CONNECT, now b_host\n"); in musb_stage0_irq()
795 musb->xceiv->otg->state = OTG_STATE_B_HOST; in musb_stage0_irq()
796 if (musb->hcd) in musb_stage0_irq()
797 musb->hcd->self.is_b_host = 1; in musb_stage0_irq()
798 del_timer(&musb->otg_timer); in musb_stage0_irq()
803 musb->xceiv->otg->state = OTG_STATE_A_HOST; in musb_stage0_irq()
810 musb_host_poke_root_hub(musb); in musb_stage0_irq()
812 dev_dbg(musb->controller, "CONNECT (%s) devctl %02x\n", in musb_stage0_irq()
813 usb_otg_state_string(musb->xceiv->otg->state), devctl); in musb_stage0_irq()
817 dev_dbg(musb->controller, "DISCONNECT (%s) as %s, devctl %02x\n", in musb_stage0_irq()
818 usb_otg_state_string(musb->xceiv->otg->state), in musb_stage0_irq()
819 MUSB_MODE(musb), devctl); in musb_stage0_irq()
822 switch (musb->xceiv->otg->state) { in musb_stage0_irq()
825 musb_host_resume_root_hub(musb); in musb_stage0_irq()
826 musb_root_disconnect(musb); in musb_stage0_irq()
827 if (musb->a_wait_bcon != 0) in musb_stage0_irq()
828 musb_platform_try_idle(musb, jiffies in musb_stage0_irq()
829 + msecs_to_jiffies(musb->a_wait_bcon)); in musb_stage0_irq()
837 musb_root_disconnect(musb); in musb_stage0_irq()
838 if (musb->hcd) in musb_stage0_irq()
839 musb->hcd->self.is_b_host = 0; in musb_stage0_irq()
840 musb->xceiv->otg->state = OTG_STATE_B_PERIPHERAL; in musb_stage0_irq()
841 MUSB_DEV_MODE(musb); in musb_stage0_irq()
842 musb_g_disconnect(musb); in musb_stage0_irq()
845 musb_hnp_stop(musb); in musb_stage0_irq()
846 musb_root_disconnect(musb); in musb_stage0_irq()
852 musb_g_disconnect(musb); in musb_stage0_irq()
856 usb_otg_state_string(musb->xceiv->otg->state)); in musb_stage0_irq()
875 dev_err(musb->controller, "Babble\n"); in musb_stage0_irq()
877 if (is_host_active(musb)) in musb_stage0_irq()
878 musb_recover_from_babble(musb); in musb_stage0_irq()
880 dev_dbg(musb->controller, "BUS RESET as %s\n", in musb_stage0_irq()
881 usb_otg_state_string(musb->xceiv->otg->state)); in musb_stage0_irq()
882 switch (musb->xceiv->otg->state) { in musb_stage0_irq()
884 musb_g_reset(musb); in musb_stage0_irq()
888 dev_dbg(musb->controller, "HNP: in %s, %d msec timeout\n", in musb_stage0_irq()
889 usb_otg_state_string(musb->xceiv->otg->state), in musb_stage0_irq()
890 TA_WAIT_BCON(musb)); in musb_stage0_irq()
891 mod_timer(&musb->otg_timer, jiffies in musb_stage0_irq()
892 + msecs_to_jiffies(TA_WAIT_BCON(musb))); in musb_stage0_irq()
895 del_timer(&musb->otg_timer); in musb_stage0_irq()
896 musb_g_reset(musb); in musb_stage0_irq()
899 dev_dbg(musb->controller, "HNP: RESET (%s), to b_peripheral\n", in musb_stage0_irq()
900 usb_otg_state_string(musb->xceiv->otg->state)); in musb_stage0_irq()
901 musb->xceiv->otg->state = OTG_STATE_B_PERIPHERAL; in musb_stage0_irq()
902 musb_g_reset(musb); in musb_stage0_irq()
905 musb->xceiv->otg->state = OTG_STATE_B_PERIPHERAL; in musb_stage0_irq()
908 musb_g_reset(musb); in musb_stage0_irq()
911 dev_dbg(musb->controller, "Unhandled BUS RESET as %s\n", in musb_stage0_irq()
912 usb_otg_state_string(musb->xceiv->otg->state)); in musb_stage0_irq()
930 void __iomem *mbase = musb->mregs; in musb_stage0_irq()
935 dev_dbg(musb->controller, "START_OF_FRAME\n"); in musb_stage0_irq()
940 ep = musb->endpoints; in musb_stage0_irq()
941 for (epnum = 1; (epnum < musb->nr_endpoints) in musb_stage0_irq()
942 && (musb->epmask >= (1 << epnum)); in musb_stage0_irq()
954 musb_h_tx_start(musb, epnum); in musb_stage0_irq()
956 cppi_hostdma_start(musb, epnum); in musb_stage0_irq()
962 schedule_work(&musb->irq_work); in musb_stage0_irq()
969 static void musb_disable_interrupts(struct musb *musb) in musb_disable_interrupts() argument
971 void __iomem *mbase = musb->mregs; in musb_disable_interrupts()
976 musb->intrtxe = 0; in musb_disable_interrupts()
978 musb->intrrxe = 0; in musb_disable_interrupts()
987 static void musb_enable_interrupts(struct musb *musb) in musb_enable_interrupts() argument
989 void __iomem *regs = musb->mregs; in musb_enable_interrupts()
992 musb->intrtxe = musb->epmask; in musb_enable_interrupts()
993 musb_writew(regs, MUSB_INTRTXE, musb->intrtxe); in musb_enable_interrupts()
994 musb->intrrxe = musb->epmask & 0xfffe; in musb_enable_interrupts()
995 musb_writew(regs, MUSB_INTRRXE, musb->intrrxe); in musb_enable_interrupts()
1000 static void musb_generic_disable(struct musb *musb) in musb_generic_disable() argument
1002 void __iomem *mbase = musb->mregs; in musb_generic_disable()
1004 musb_disable_interrupts(musb); in musb_generic_disable()
1013 void musb_start(struct musb *musb) in musb_start() argument
1015 void __iomem *regs = musb->mregs; in musb_start()
1018 dev_dbg(musb->controller, "<== devctl %02x\n", devctl); in musb_start()
1020 musb_enable_interrupts(musb); in musb_start()
1030 musb->is_active = 0; in musb_start()
1039 if (musb->port_mode != MUSB_PORT_MODE_HOST && in musb_start()
1041 musb->is_active = 1; in musb_start()
1046 musb_platform_enable(musb); in musb_start()
1057 void musb_stop(struct musb *musb) in musb_stop() argument
1060 musb_platform_disable(musb); in musb_stop()
1061 musb_generic_disable(musb); in musb_stop()
1062 dev_dbg(musb->controller, "HDRC disabled\n"); in musb_stop()
1071 musb_platform_try_idle(musb, 0); in musb_stop()
1076 struct musb *musb = dev_to_musb(&pdev->dev); in musb_shutdown() local
1079 pm_runtime_get_sync(musb->controller); in musb_shutdown()
1081 musb_host_cleanup(musb); in musb_shutdown()
1082 musb_gadget_cleanup(musb); in musb_shutdown()
1084 spin_lock_irqsave(&musb->lock, flags); in musb_shutdown()
1085 musb_platform_disable(musb); in musb_shutdown()
1086 musb_generic_disable(musb); in musb_shutdown()
1087 spin_unlock_irqrestore(&musb->lock, flags); in musb_shutdown()
1089 musb_writeb(musb->mregs, MUSB_DEVCTL, 0); in musb_shutdown()
1090 musb_platform_exit(musb); in musb_shutdown()
1092 pm_runtime_put(musb->controller); in musb_shutdown()
1227 fifo_setup(struct musb *musb, struct musb_hw_ep *hw_ep, in fifo_setup() argument
1230 void __iomem *mbase = musb->mregs; in fifo_setup()
1244 (1 << (musb->config->ram_bits + 2))) in fifo_setup()
1248 if ((offset + maxpacket) > (1 << (musb->config->ram_bits + 2))) in fifo_setup()
1259 musb->bulk_ep = hw_ep; in fifo_setup()
1292 musb->epmask |= (1 << hw_ep->epnum); in fifo_setup()
1301 static int ep_config_from_table(struct musb *musb) in ep_config_from_table() argument
1306 struct musb_hw_ep *hw_ep = musb->endpoints; in ep_config_from_table()
1308 if (musb->config->fifo_cfg) { in ep_config_from_table()
1309 cfg = musb->config->fifo_cfg; in ep_config_from_table()
1310 n = musb->config->fifo_cfg_size; in ep_config_from_table()
1349 offset = fifo_setup(musb, hw_ep, &ep0_cfg, 0); in ep_config_from_table()
1359 if (epn >= musb->config->num_eps) { in ep_config_from_table()
1364 offset = fifo_setup(musb, hw_ep + epn, cfg++, offset); in ep_config_from_table()
1371 musb->nr_endpoints = max(epn, musb->nr_endpoints); in ep_config_from_table()
1376 n + 1, musb->config->num_eps * 2 - 1, in ep_config_from_table()
1377 offset, (1 << (musb->config->ram_bits + 2))); in ep_config_from_table()
1379 if (!musb->bulk_ep) { in ep_config_from_table()
1392 static int ep_config_from_hw(struct musb *musb) in ep_config_from_hw() argument
1396 void __iomem *mbase = musb->mregs; in ep_config_from_hw()
1399 dev_dbg(musb->controller, "<== static silicon ep config\n"); in ep_config_from_hw()
1403 for (epnum = 1; epnum < musb->config->num_eps; epnum++) { in ep_config_from_hw()
1405 hw_ep = musb->endpoints + epnum; in ep_config_from_hw()
1407 ret = musb_read_fifosize(musb, hw_ep, epnum); in ep_config_from_hw()
1421 if (musb->bulk_ep) in ep_config_from_hw()
1423 musb->bulk_ep = hw_ep; in ep_config_from_hw()
1426 if (!musb->bulk_ep) { in ep_config_from_hw()
1439 static int musb_core_init(u16 musb_type, struct musb *musb) in musb_core_init() argument
1444 void __iomem *mbase = musb->mregs; in musb_core_init()
1454 musb->dyn_fifo = true; in musb_core_init()
1458 musb->bulk_combine = true; in musb_core_init()
1462 musb->bulk_split = true; in musb_core_init()
1466 musb->hb_iso_rx = true; in musb_core_init()
1470 musb->hb_iso_tx = true; in musb_core_init()
1480 musb->is_multipoint = 1; in musb_core_init()
1483 musb->is_multipoint = 0; in musb_core_init()
1493 musb->hwvers = musb_read_hwvers(mbase); in musb_core_init()
1494 snprintf(aRevision, 32, "%d.%d%s", MUSB_HWVERS_MAJOR(musb->hwvers), in musb_core_init()
1495 MUSB_HWVERS_MINOR(musb->hwvers), in musb_core_init()
1496 (musb->hwvers & MUSB_HWVERS_RC) ? "RC" : ""); in musb_core_init()
1501 musb_configure_ep0(musb); in musb_core_init()
1504 musb->nr_endpoints = 1; in musb_core_init()
1505 musb->epmask = 1; in musb_core_init()
1507 if (musb->dyn_fifo) in musb_core_init()
1508 status = ep_config_from_table(musb); in musb_core_init()
1510 status = ep_config_from_hw(musb); in musb_core_init()
1516 for (i = 0; i < musb->nr_endpoints; i++) { in musb_core_init()
1517 struct musb_hw_ep *hw_ep = musb->endpoints + i; in musb_core_init()
1519 hw_ep->fifo = musb->io.fifo_offset(i) + mbase; in musb_core_init()
1521 if (musb->io.quirks & MUSB_IN_TUSB) { in musb_core_init()
1522 hw_ep->fifo_async = musb->async + 0x400 + in musb_core_init()
1523 musb->io.fifo_offset(i); in musb_core_init()
1524 hw_ep->fifo_sync = musb->sync + 0x400 + in musb_core_init()
1525 musb->io.fifo_offset(i); in musb_core_init()
1527 musb->sync_va + 0x400 + musb->io.fifo_offset(i); in musb_core_init()
1537 hw_ep->regs = musb->io.ep_offset(i, 0) + mbase; in musb_core_init()
1543 dev_dbg(musb->controller, in musb_core_init()
1552 dev_dbg(musb->controller, in musb_core_init()
1561 dev_dbg(musb->controller, "hw_ep %d not configured\n", i); in musb_core_init()
1576 irqreturn_t musb_interrupt(struct musb *musb) in musb_interrupt() argument
1583 if (!musb->int_usb && !musb->int_tx && !musb->int_rx) in musb_interrupt()
1586 devctl = musb_readb(musb->mregs, MUSB_DEVCTL); in musb_interrupt()
1588 dev_dbg(musb->controller, "** IRQ %s usb%04x tx%04x rx%04x\n", in musb_interrupt()
1589 is_host_active(musb) ? "host" : "peripheral", in musb_interrupt()
1590 musb->int_usb, musb->int_tx, musb->int_rx); in musb_interrupt()
1612 if (musb->int_usb) in musb_interrupt()
1613 retval |= musb_stage0_irq(musb, musb->int_usb, devctl); in musb_interrupt()
1615 if (musb->int_tx & 1) { in musb_interrupt()
1616 if (is_host_active(musb)) in musb_interrupt()
1617 retval |= musb_h_ep0_irq(musb); in musb_interrupt()
1619 retval |= musb_g_ep0_irq(musb); in musb_interrupt()
1622 musb->int_tx &= ~BIT(0); in musb_interrupt()
1625 status = musb->int_tx; in musb_interrupt()
1629 if (is_host_active(musb)) in musb_interrupt()
1630 musb_host_tx(musb, epnum); in musb_interrupt()
1632 musb_g_tx(musb, epnum); in musb_interrupt()
1635 status = musb->int_rx; in musb_interrupt()
1639 if (is_host_active(musb)) in musb_interrupt()
1640 musb_host_rx(musb, epnum); in musb_interrupt()
1642 musb_g_rx(musb, epnum); in musb_interrupt()
1656 void musb_dma_completion(struct musb *musb, u8 epnum, u8 transmit) in musb_dma_completion() argument
1664 if (is_host_active(musb)) in musb_dma_completion()
1665 musb_h_ep0_irq(musb); in musb_dma_completion()
1667 musb_g_ep0_irq(musb); in musb_dma_completion()
1673 if (is_host_active(musb)) in musb_dma_completion()
1674 musb_host_tx(musb, epnum); in musb_dma_completion()
1676 musb_g_tx(musb, epnum); in musb_dma_completion()
1679 if (is_host_active(musb)) in musb_dma_completion()
1680 musb_host_rx(musb, epnum); in musb_dma_completion()
1682 musb_g_rx(musb, epnum); in musb_dma_completion()
1697 struct musb *musb = dev_to_musb(dev); in musb_mode_show() local
1701 spin_lock_irqsave(&musb->lock, flags); in musb_mode_show()
1702 ret = sprintf(buf, "%s\n", usb_otg_state_string(musb->xceiv->otg->state)); in musb_mode_show()
1703 spin_unlock_irqrestore(&musb->lock, flags); in musb_mode_show()
1712 struct musb *musb = dev_to_musb(dev); in musb_mode_store() local
1716 spin_lock_irqsave(&musb->lock, flags); in musb_mode_store()
1718 status = musb_platform_set_mode(musb, MUSB_HOST); in musb_mode_store()
1720 status = musb_platform_set_mode(musb, MUSB_PERIPHERAL); in musb_mode_store()
1722 status = musb_platform_set_mode(musb, MUSB_OTG); in musb_mode_store()
1725 spin_unlock_irqrestore(&musb->lock, flags); in musb_mode_store()
1735 struct musb *musb = dev_to_musb(dev); in musb_vbus_store() local
1744 spin_lock_irqsave(&musb->lock, flags); in musb_vbus_store()
1746 musb->a_wait_bcon = val ? max_t(int, val, OTG_TIME_A_WAIT_BCON) : 0 ; in musb_vbus_store()
1747 if (musb->xceiv->otg->state == OTG_STATE_A_WAIT_BCON) in musb_vbus_store()
1748 musb->is_active = 0; in musb_vbus_store()
1749 musb_platform_try_idle(musb, jiffies + msecs_to_jiffies(val)); in musb_vbus_store()
1750 spin_unlock_irqrestore(&musb->lock, flags); in musb_vbus_store()
1758 struct musb *musb = dev_to_musb(dev); in musb_vbus_show() local
1763 spin_lock_irqsave(&musb->lock, flags); in musb_vbus_show()
1764 val = musb->a_wait_bcon; in musb_vbus_show()
1768 vbus = musb_platform_get_vbus_status(musb); in musb_vbus_show()
1769 spin_unlock_irqrestore(&musb->lock, flags); in musb_vbus_show()
1783 struct musb *musb = dev_to_musb(dev); in musb_srp_store() local
1793 musb_g_wakeup(musb); in musb_srp_store()
1813 struct musb *musb = container_of(data, struct musb, irq_work); in musb_irq_work() local
1815 if (musb->xceiv->otg->state != musb->xceiv_old_state) { in musb_irq_work()
1816 musb->xceiv_old_state = musb->xceiv->otg->state; in musb_irq_work()
1817 sysfs_notify(&musb->controller->kobj, NULL, "mode"); in musb_irq_work()
1821 static void musb_recover_from_babble(struct musb *musb) in musb_recover_from_babble() argument
1826 musb_disable_interrupts(musb); in musb_recover_from_babble()
1834 ret = musb_platform_recover(musb); in musb_recover_from_babble()
1836 musb_enable_interrupts(musb); in musb_recover_from_babble()
1841 devctl = musb_readb(musb->mregs, MUSB_DEVCTL); in musb_recover_from_babble()
1843 musb_writeb(musb->mregs, MUSB_DEVCTL, devctl); in musb_recover_from_babble()
1846 musb_root_disconnect(musb); in musb_recover_from_babble()
1852 if (musb->dyn_fifo) in musb_recover_from_babble()
1853 ret = ep_config_from_table(musb); in musb_recover_from_babble()
1855 ret = ep_config_from_hw(musb); in musb_recover_from_babble()
1859 musb_start(musb); in musb_recover_from_babble()
1866 static struct musb *allocate_instance(struct device *dev, in allocate_instance()
1869 struct musb *musb; in allocate_instance() local
1874 musb = devm_kzalloc(dev, sizeof(*musb), GFP_KERNEL); in allocate_instance()
1875 if (!musb) in allocate_instance()
1878 INIT_LIST_HEAD(&musb->control); in allocate_instance()
1879 INIT_LIST_HEAD(&musb->in_bulk); in allocate_instance()
1880 INIT_LIST_HEAD(&musb->out_bulk); in allocate_instance()
1882 musb->vbuserr_retry = VBUSERR_RETRY_COUNT; in allocate_instance()
1883 musb->a_wait_bcon = OTG_TIME_A_WAIT_BCON; in allocate_instance()
1884 musb->mregs = mbase; in allocate_instance()
1885 musb->ctrl_base = mbase; in allocate_instance()
1886 musb->nIrq = -ENODEV; in allocate_instance()
1887 musb->config = config; in allocate_instance()
1888 BUG_ON(musb->config->num_eps > MUSB_C_NUM_EPS); in allocate_instance()
1889 for (epnum = 0, ep = musb->endpoints; in allocate_instance()
1890 epnum < musb->config->num_eps; in allocate_instance()
1892 ep->musb = musb; in allocate_instance()
1896 musb->controller = dev; in allocate_instance()
1898 ret = musb_host_alloc(musb); in allocate_instance()
1902 dev_set_drvdata(dev, musb); in allocate_instance()
1904 return musb; in allocate_instance()
1910 static void musb_free(struct musb *musb) in musb_free() argument
1918 sysfs_remove_group(&musb->controller->kobj, &musb_attr_group); in musb_free()
1921 if (musb->nIrq >= 0) { in musb_free()
1922 if (musb->irq_wake) in musb_free()
1923 disable_irq_wake(musb->nIrq); in musb_free()
1924 free_irq(musb->nIrq, musb); in musb_free()
1927 musb_host_free(musb); in musb_free()
1932 struct musb *musb; in musb_deassert_reset() local
1935 musb = container_of(work, struct musb, deassert_reset_work.work); in musb_deassert_reset()
1937 spin_lock_irqsave(&musb->lock, flags); in musb_deassert_reset()
1939 if (musb->port1_status & USB_PORT_STAT_RESET) in musb_deassert_reset()
1940 musb_port_reset(musb, false); in musb_deassert_reset()
1942 spin_unlock_irqrestore(&musb->lock, flags); in musb_deassert_reset()
1957 struct musb *musb; in musb_init_controller() local
1970 musb = allocate_instance(dev, plat->config, ctrl); in musb_init_controller()
1971 if (!musb) { in musb_init_controller()
1976 spin_lock_init(&musb->lock); in musb_init_controller()
1977 musb->board_set_power = plat->set_power; in musb_init_controller()
1978 musb->min_power = plat->min_power; in musb_init_controller()
1979 musb->ops = plat->platform_ops; in musb_init_controller()
1980 musb->port_mode = plat->mode; in musb_init_controller()
1995 pm_runtime_use_autosuspend(musb->controller); in musb_init_controller()
1996 pm_runtime_set_autosuspend_delay(musb->controller, 200); in musb_init_controller()
1997 pm_runtime_irq_safe(musb->controller); in musb_init_controller()
1998 pm_runtime_enable(musb->controller); in musb_init_controller()
2012 status = musb_platform_init(musb); in musb_init_controller()
2016 if (!musb->isr) { in musb_init_controller()
2021 if (musb->ops->quirks) in musb_init_controller()
2022 musb->io.quirks = musb->ops->quirks; in musb_init_controller()
2025 if (musb->io.quirks & MUSB_INDEXED_EP) { in musb_init_controller()
2026 musb->io.ep_offset = musb_indexed_ep_offset; in musb_init_controller()
2027 musb->io.ep_select = musb_indexed_ep_select; in musb_init_controller()
2029 musb->io.ep_offset = musb_flat_ep_offset; in musb_init_controller()
2030 musb->io.ep_select = musb_flat_ep_select; in musb_init_controller()
2034 if (musb->ops->ep_offset) in musb_init_controller()
2035 musb->io.ep_offset = musb->ops->ep_offset; in musb_init_controller()
2036 if (musb->ops->ep_select) in musb_init_controller()
2037 musb->io.ep_select = musb->ops->ep_select; in musb_init_controller()
2039 if (musb->ops->fifo_mode) in musb_init_controller()
2040 fifo_mode = musb->ops->fifo_mode; in musb_init_controller()
2044 if (musb->ops->fifo_offset) in musb_init_controller()
2045 musb->io.fifo_offset = musb->ops->fifo_offset; in musb_init_controller()
2047 musb->io.fifo_offset = musb_default_fifo_offset; in musb_init_controller()
2049 if (musb->ops->readb) in musb_init_controller()
2050 musb_readb = musb->ops->readb; in musb_init_controller()
2051 if (musb->ops->writeb) in musb_init_controller()
2052 musb_writeb = musb->ops->writeb; in musb_init_controller()
2053 if (musb->ops->readw) in musb_init_controller()
2054 musb_readw = musb->ops->readw; in musb_init_controller()
2055 if (musb->ops->writew) in musb_init_controller()
2056 musb_writew = musb->ops->writew; in musb_init_controller()
2057 if (musb->ops->readl) in musb_init_controller()
2058 musb_readl = musb->ops->readl; in musb_init_controller()
2059 if (musb->ops->writel) in musb_init_controller()
2060 musb_writel = musb->ops->writel; in musb_init_controller()
2062 if (musb->ops->read_fifo) in musb_init_controller()
2063 musb->io.read_fifo = musb->ops->read_fifo; in musb_init_controller()
2065 musb->io.read_fifo = musb_default_read_fifo; in musb_init_controller()
2067 if (musb->ops->write_fifo) in musb_init_controller()
2068 musb->io.write_fifo = musb->ops->write_fifo; in musb_init_controller()
2070 musb->io.write_fifo = musb_default_write_fifo; in musb_init_controller()
2072 if (!musb->xceiv->io_ops) { in musb_init_controller()
2073 musb->xceiv->io_dev = musb->controller; in musb_init_controller()
2074 musb->xceiv->io_priv = musb->mregs; in musb_init_controller()
2075 musb->xceiv->io_ops = &musb_ulpi_access; in musb_init_controller()
2078 pm_runtime_get_sync(musb->controller); in musb_init_controller()
2081 musb->dma_controller = dma_controller_create(musb, musb->mregs); in musb_init_controller()
2082 if (IS_ERR(musb->dma_controller)) { in musb_init_controller()
2083 status = PTR_ERR(musb->dma_controller); in musb_init_controller()
2089 musb_platform_disable(musb); in musb_init_controller()
2090 musb_generic_disable(musb); in musb_init_controller()
2093 INIT_WORK(&musb->irq_work, musb_irq_work); in musb_init_controller()
2094 INIT_DELAYED_WORK(&musb->deassert_reset_work, musb_deassert_reset); in musb_init_controller()
2095 INIT_DELAYED_WORK(&musb->finish_resume_work, musb_host_finish_resume); in musb_init_controller()
2100 : MUSB_CONTROLLER_HDRC, musb); in musb_init_controller()
2104 setup_timer(&musb->otg_timer, musb_otg_timer_func, (unsigned long) musb); in musb_init_controller()
2107 if (request_irq(nIrq, musb->isr, 0, dev_name(dev), musb)) { in musb_init_controller()
2112 musb->nIrq = nIrq; in musb_init_controller()
2115 musb->irq_wake = 1; in musb_init_controller()
2118 musb->irq_wake = 0; in musb_init_controller()
2123 u8 busctl = musb_read_ulpi_buscontrol(musb->mregs); in musb_init_controller()
2125 musb_write_ulpi_buscontrol(musb->mregs, busctl); in musb_init_controller()
2128 if (musb->xceiv->otg->default_a) { in musb_init_controller()
2129 MUSB_HST_MODE(musb); in musb_init_controller()
2130 musb->xceiv->otg->state = OTG_STATE_A_IDLE; in musb_init_controller()
2132 MUSB_DEV_MODE(musb); in musb_init_controller()
2133 musb->xceiv->otg->state = OTG_STATE_B_IDLE; in musb_init_controller()
2136 switch (musb->port_mode) { in musb_init_controller()
2138 status = musb_host_setup(musb, plat->power); in musb_init_controller()
2141 status = musb_platform_set_mode(musb, MUSB_HOST); in musb_init_controller()
2144 status = musb_gadget_setup(musb); in musb_init_controller()
2147 status = musb_platform_set_mode(musb, MUSB_PERIPHERAL); in musb_init_controller()
2150 status = musb_host_setup(musb, plat->power); in musb_init_controller()
2153 status = musb_gadget_setup(musb); in musb_init_controller()
2155 musb_host_cleanup(musb); in musb_init_controller()
2158 status = musb_platform_set_mode(musb, MUSB_OTG); in musb_init_controller()
2161 dev_err(dev, "unsupported port mode %d\n", musb->port_mode); in musb_init_controller()
2168 status = musb_init_debugfs(musb); in musb_init_controller()
2172 status = sysfs_create_group(&musb->controller->kobj, &musb_attr_group); in musb_init_controller()
2176 pm_runtime_put(musb->controller); in musb_init_controller()
2181 musb_exit_debugfs(musb); in musb_init_controller()
2184 musb_gadget_cleanup(musb); in musb_init_controller()
2185 musb_host_cleanup(musb); in musb_init_controller()
2188 cancel_work_sync(&musb->irq_work); in musb_init_controller()
2189 cancel_delayed_work_sync(&musb->finish_resume_work); in musb_init_controller()
2190 cancel_delayed_work_sync(&musb->deassert_reset_work); in musb_init_controller()
2191 if (musb->dma_controller) in musb_init_controller()
2192 dma_controller_destroy(musb->dma_controller); in musb_init_controller()
2194 pm_runtime_put_sync(musb->controller); in musb_init_controller()
2197 if (musb->irq_wake) in musb_init_controller()
2199 musb_platform_exit(musb); in musb_init_controller()
2202 pm_runtime_disable(musb->controller); in musb_init_controller()
2203 dev_err(musb->controller, in musb_init_controller()
2206 musb_free(musb); in musb_init_controller()
2240 struct musb *musb = dev_to_musb(dev); in musb_remove() local
2247 musb_exit_debugfs(musb); in musb_remove()
2250 if (musb->dma_controller) in musb_remove()
2251 dma_controller_destroy(musb->dma_controller); in musb_remove()
2253 cancel_work_sync(&musb->irq_work); in musb_remove()
2254 cancel_delayed_work_sync(&musb->finish_resume_work); in musb_remove()
2255 cancel_delayed_work_sync(&musb->deassert_reset_work); in musb_remove()
2256 musb_free(musb); in musb_remove()
2263 static void musb_save_context(struct musb *musb) in musb_save_context() argument
2266 void __iomem *musb_base = musb->mregs; in musb_save_context()
2269 musb->context.frame = musb_readw(musb_base, MUSB_FRAME); in musb_save_context()
2270 musb->context.testmode = musb_readb(musb_base, MUSB_TESTMODE); in musb_save_context()
2271 musb->context.busctl = musb_read_ulpi_buscontrol(musb->mregs); in musb_save_context()
2272 musb->context.power = musb_readb(musb_base, MUSB_POWER); in musb_save_context()
2273 musb->context.intrusbe = musb_readb(musb_base, MUSB_INTRUSBE); in musb_save_context()
2274 musb->context.index = musb_readb(musb_base, MUSB_INDEX); in musb_save_context()
2275 musb->context.devctl = musb_readb(musb_base, MUSB_DEVCTL); in musb_save_context()
2277 for (i = 0; i < musb->config->num_eps; ++i) { in musb_save_context()
2280 hw_ep = &musb->endpoints[i]; in musb_save_context()
2289 musb->context.index_regs[i].txmaxp = in musb_save_context()
2291 musb->context.index_regs[i].txcsr = in musb_save_context()
2293 musb->context.index_regs[i].rxmaxp = in musb_save_context()
2295 musb->context.index_regs[i].rxcsr = in musb_save_context()
2298 if (musb->dyn_fifo) { in musb_save_context()
2299 musb->context.index_regs[i].txfifoadd = in musb_save_context()
2301 musb->context.index_regs[i].rxfifoadd = in musb_save_context()
2303 musb->context.index_regs[i].txfifosz = in musb_save_context()
2305 musb->context.index_regs[i].rxfifosz = in musb_save_context()
2309 musb->context.index_regs[i].txtype = in musb_save_context()
2311 musb->context.index_regs[i].txinterval = in musb_save_context()
2313 musb->context.index_regs[i].rxtype = in musb_save_context()
2315 musb->context.index_regs[i].rxinterval = in musb_save_context()
2318 musb->context.index_regs[i].txfunaddr = in musb_save_context()
2320 musb->context.index_regs[i].txhubaddr = in musb_save_context()
2322 musb->context.index_regs[i].txhubport = in musb_save_context()
2325 musb->context.index_regs[i].rxfunaddr = in musb_save_context()
2327 musb->context.index_regs[i].rxhubaddr = in musb_save_context()
2329 musb->context.index_regs[i].rxhubport = in musb_save_context()
2334 static void musb_restore_context(struct musb *musb) in musb_restore_context() argument
2337 void __iomem *musb_base = musb->mregs; in musb_restore_context()
2342 musb_writew(musb_base, MUSB_FRAME, musb->context.frame); in musb_restore_context()
2343 musb_writeb(musb_base, MUSB_TESTMODE, musb->context.testmode); in musb_restore_context()
2344 musb_write_ulpi_buscontrol(musb->mregs, musb->context.busctl); in musb_restore_context()
2349 musb->context.power &= ~(MUSB_POWER_SUSPENDM | MUSB_POWER_RESUME); in musb_restore_context()
2350 power |= musb->context.power; in musb_restore_context()
2353 musb_writew(musb_base, MUSB_INTRTXE, musb->intrtxe); in musb_restore_context()
2354 musb_writew(musb_base, MUSB_INTRRXE, musb->intrrxe); in musb_restore_context()
2355 musb_writeb(musb_base, MUSB_INTRUSBE, musb->context.intrusbe); in musb_restore_context()
2356 musb_writeb(musb_base, MUSB_DEVCTL, musb->context.devctl); in musb_restore_context()
2358 for (i = 0; i < musb->config->num_eps; ++i) { in musb_restore_context()
2361 hw_ep = &musb->endpoints[i]; in musb_restore_context()
2371 musb->context.index_regs[i].txmaxp); in musb_restore_context()
2373 musb->context.index_regs[i].txcsr); in musb_restore_context()
2375 musb->context.index_regs[i].rxmaxp); in musb_restore_context()
2377 musb->context.index_regs[i].rxcsr); in musb_restore_context()
2379 if (musb->dyn_fifo) { in musb_restore_context()
2381 musb->context.index_regs[i].txfifosz); in musb_restore_context()
2383 musb->context.index_regs[i].rxfifosz); in musb_restore_context()
2385 musb->context.index_regs[i].txfifoadd); in musb_restore_context()
2387 musb->context.index_regs[i].rxfifoadd); in musb_restore_context()
2391 musb->context.index_regs[i].txtype); in musb_restore_context()
2393 musb->context.index_regs[i].txinterval); in musb_restore_context()
2395 musb->context.index_regs[i].rxtype); in musb_restore_context()
2398 musb->context.index_regs[i].rxinterval); in musb_restore_context()
2400 musb->context.index_regs[i].txfunaddr); in musb_restore_context()
2402 musb->context.index_regs[i].txhubaddr); in musb_restore_context()
2404 musb->context.index_regs[i].txhubport); in musb_restore_context()
2410 musb->context.index_regs[i].rxfunaddr); in musb_restore_context()
2412 musb->context.index_regs[i].rxhubaddr); in musb_restore_context()
2414 musb->context.index_regs[i].rxhubport); in musb_restore_context()
2416 musb_writeb(musb_base, MUSB_INDEX, musb->context.index); in musb_restore_context()
2421 struct musb *musb = dev_to_musb(dev); in musb_suspend() local
2424 spin_lock_irqsave(&musb->lock, flags); in musb_suspend()
2426 if (is_peripheral_active(musb)) { in musb_suspend()
2430 } else if (is_host_active(musb)) { in musb_suspend()
2436 musb_save_context(musb); in musb_suspend()
2438 spin_unlock_irqrestore(&musb->lock, flags); in musb_suspend()
2444 struct musb *musb = dev_to_musb(dev); in musb_resume() local
2458 musb_restore_context(musb); in musb_resume()
2460 devctl = musb_readb(musb->mregs, MUSB_DEVCTL); in musb_resume()
2462 if ((devctl & mask) != (musb->context.devctl & mask)) in musb_resume()
2463 musb->port1_status = 0; in musb_resume()
2464 if (musb->need_finish_resume) { in musb_resume()
2465 musb->need_finish_resume = 0; in musb_resume()
2466 schedule_delayed_work(&musb->finish_resume_work, in musb_resume()
2482 struct musb *musb = dev_to_musb(dev); in musb_runtime_suspend() local
2484 musb_save_context(musb); in musb_runtime_suspend()
2491 struct musb *musb = dev_to_musb(dev); in musb_runtime_resume() local
2504 musb_restore_context(musb); in musb_runtime_resume()
2507 if (musb->need_finish_resume) { in musb_runtime_resume()
2508 musb->need_finish_resume = 0; in musb_runtime_resume()
2509 schedule_delayed_work(&musb->finish_resume_work, in musb_runtime_resume()