Lines Matching refs:maxpacket
1122 { .hw_ep_num = 1, .style = FIFO_TX, .maxpacket = 512, },
1123 { .hw_ep_num = 1, .style = FIFO_RX, .maxpacket = 512, },
1124 { .hw_ep_num = 2, .style = FIFO_RXTX, .maxpacket = 512, },
1125 { .hw_ep_num = 3, .style = FIFO_RXTX, .maxpacket = 256, },
1126 { .hw_ep_num = 4, .style = FIFO_RXTX, .maxpacket = 256, },
1131 { .hw_ep_num = 1, .style = FIFO_TX, .maxpacket = 512, .mode = BUF_DOUBLE, },
1132 { .hw_ep_num = 1, .style = FIFO_RX, .maxpacket = 512, .mode = BUF_DOUBLE, },
1133 { .hw_ep_num = 2, .style = FIFO_RXTX, .maxpacket = 512, .mode = BUF_DOUBLE, },
1134 { .hw_ep_num = 3, .style = FIFO_RXTX, .maxpacket = 256, },
1135 { .hw_ep_num = 4, .style = FIFO_RXTX, .maxpacket = 256, },
1140 { .hw_ep_num = 1, .style = FIFO_TX, .maxpacket = 512, },
1141 { .hw_ep_num = 1, .style = FIFO_RX, .maxpacket = 512, },
1142 { .hw_ep_num = 2, .style = FIFO_TX, .maxpacket = 512, },
1143 { .hw_ep_num = 2, .style = FIFO_RX, .maxpacket = 512, },
1144 { .hw_ep_num = 3, .style = FIFO_RXTX, .maxpacket = 256, },
1145 { .hw_ep_num = 4, .style = FIFO_RXTX, .maxpacket = 256, },
1150 { .hw_ep_num = 1, .style = FIFO_TX, .maxpacket = 512, .mode = BUF_DOUBLE, },
1151 { .hw_ep_num = 1, .style = FIFO_RX, .maxpacket = 512, .mode = BUF_DOUBLE, },
1152 { .hw_ep_num = 2, .style = FIFO_TX, .maxpacket = 512, },
1153 { .hw_ep_num = 2, .style = FIFO_RX, .maxpacket = 512, },
1154 { .hw_ep_num = 3, .style = FIFO_RXTX, .maxpacket = 256, },
1155 { .hw_ep_num = 4, .style = FIFO_RXTX, .maxpacket = 256, },
1160 { .hw_ep_num = 1, .style = FIFO_TX, .maxpacket = 512, },
1161 { .hw_ep_num = 1, .style = FIFO_RX, .maxpacket = 512, },
1162 { .hw_ep_num = 2, .style = FIFO_TX, .maxpacket = 512, },
1163 { .hw_ep_num = 2, .style = FIFO_RX, .maxpacket = 512, },
1164 { .hw_ep_num = 3, .style = FIFO_TX, .maxpacket = 512, },
1165 { .hw_ep_num = 3, .style = FIFO_RX, .maxpacket = 512, },
1166 { .hw_ep_num = 4, .style = FIFO_TX, .maxpacket = 512, },
1167 { .hw_ep_num = 4, .style = FIFO_RX, .maxpacket = 512, },
1168 { .hw_ep_num = 5, .style = FIFO_TX, .maxpacket = 512, },
1169 { .hw_ep_num = 5, .style = FIFO_RX, .maxpacket = 512, },
1170 { .hw_ep_num = 6, .style = FIFO_TX, .maxpacket = 512, },
1171 { .hw_ep_num = 6, .style = FIFO_RX, .maxpacket = 512, },
1172 { .hw_ep_num = 7, .style = FIFO_TX, .maxpacket = 512, },
1173 { .hw_ep_num = 7, .style = FIFO_RX, .maxpacket = 512, },
1174 { .hw_ep_num = 8, .style = FIFO_TX, .maxpacket = 512, },
1175 { .hw_ep_num = 8, .style = FIFO_RX, .maxpacket = 512, },
1176 { .hw_ep_num = 9, .style = FIFO_TX, .maxpacket = 512, },
1177 { .hw_ep_num = 9, .style = FIFO_RX, .maxpacket = 512, },
1178 { .hw_ep_num = 10, .style = FIFO_TX, .maxpacket = 256, },
1179 { .hw_ep_num = 10, .style = FIFO_RX, .maxpacket = 64, },
1180 { .hw_ep_num = 11, .style = FIFO_TX, .maxpacket = 256, },
1181 { .hw_ep_num = 11, .style = FIFO_RX, .maxpacket = 64, },
1182 { .hw_ep_num = 12, .style = FIFO_TX, .maxpacket = 256, },
1183 { .hw_ep_num = 12, .style = FIFO_RX, .maxpacket = 64, },
1184 { .hw_ep_num = 13, .style = FIFO_RXTX, .maxpacket = 4096, },
1185 { .hw_ep_num = 14, .style = FIFO_RXTX, .maxpacket = 1024, },
1186 { .hw_ep_num = 15, .style = FIFO_RXTX, .maxpacket = 1024, },
1191 { .hw_ep_num = 1, .style = FIFO_TX, .maxpacket = 512, },
1192 { .hw_ep_num = 1, .style = FIFO_RX, .maxpacket = 512, },
1193 { .hw_ep_num = 2, .style = FIFO_TX, .maxpacket = 512, },
1194 { .hw_ep_num = 2, .style = FIFO_RX, .maxpacket = 512, },
1195 { .hw_ep_num = 3, .style = FIFO_TX, .maxpacket = 512, },
1196 { .hw_ep_num = 3, .style = FIFO_RX, .maxpacket = 512, },
1197 { .hw_ep_num = 4, .style = FIFO_TX, .maxpacket = 512, },
1198 { .hw_ep_num = 4, .style = FIFO_RX, .maxpacket = 512, },
1199 { .hw_ep_num = 5, .style = FIFO_TX, .maxpacket = 512, },
1200 { .hw_ep_num = 5, .style = FIFO_RX, .maxpacket = 512, },
1201 { .hw_ep_num = 6, .style = FIFO_TX, .maxpacket = 32, },
1202 { .hw_ep_num = 6, .style = FIFO_RX, .maxpacket = 32, },
1203 { .hw_ep_num = 7, .style = FIFO_TX, .maxpacket = 32, },
1204 { .hw_ep_num = 7, .style = FIFO_RX, .maxpacket = 32, },
1205 { .hw_ep_num = 8, .style = FIFO_TX, .maxpacket = 32, },
1206 { .hw_ep_num = 8, .style = FIFO_RX, .maxpacket = 32, },
1207 { .hw_ep_num = 9, .style = FIFO_TX, .maxpacket = 32, },
1208 { .hw_ep_num = 9, .style = FIFO_RX, .maxpacket = 32, },
1209 { .hw_ep_num = 10, .style = FIFO_TX, .maxpacket = 32, },
1210 { .hw_ep_num = 10, .style = FIFO_RX, .maxpacket = 32, },
1211 { .hw_ep_num = 11, .style = FIFO_TX, .maxpacket = 32, },
1212 { .hw_ep_num = 11, .style = FIFO_RX, .maxpacket = 32, },
1213 { .hw_ep_num = 12, .style = FIFO_TX, .maxpacket = 32, },
1214 { .hw_ep_num = 12, .style = FIFO_RX, .maxpacket = 32, },
1215 { .hw_ep_num = 13, .style = FIFO_RXTX, .maxpacket = 512, },
1216 { .hw_ep_num = 14, .style = FIFO_RXTX, .maxpacket = 1024, },
1217 { .hw_ep_num = 15, .style = FIFO_RXTX, .maxpacket = 1024, },
1232 u16 maxpacket = cfg->maxpacket; in fifo_setup() local
1238 size = ffs(max(maxpacket, (u16) 8)) - 1; in fifo_setup()
1239 maxpacket = 1 << size; in fifo_setup()
1243 if ((offset + (maxpacket << 1)) > in fifo_setup()
1248 if ((offset + maxpacket) > (1 << (musb->config->ram_bits + 2))) in fifo_setup()
1266 hw_ep->max_packet_sz_tx = maxpacket; in fifo_setup()
1272 hw_ep->max_packet_sz_rx = maxpacket; in fifo_setup()
1278 hw_ep->max_packet_sz_rx = maxpacket; in fifo_setup()
1283 hw_ep->max_packet_sz_tx = maxpacket; in fifo_setup()
1294 return offset + (maxpacket << ((c_size & MUSB_FIFOSZ_DPB) ? 1 : 0)); in fifo_setup()
1298 .style = FIFO_RXTX, .maxpacket = 64,