629 	temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);  in xhci_run()
636 	temp = readl(&xhci->ir_set->irq_control);  in xhci_run()
639 	writel(temp, &xhci->ir_set->irq_control);  in xhci_run()
648 	temp = readl(&xhci->ir_set->irq_pending);  in xhci_run()
651 			xhci->ir_set, (unsigned int) ER_IRQ_ENABLE(temp));  in xhci_run()
652 	writel(ER_IRQ_ENABLE(temp), &xhci->ir_set->irq_pending);  in xhci_run()
732 	temp = readl(&xhci->ir_set->irq_pending);  in xhci_stop()
733 	writel(ER_IRQ_DISABLE(temp), &xhci->ir_set->irq_pending);  in xhci_stop()
785 	xhci->s3.erst_size = readl(&xhci->ir_set->erst_size);  in xhci_save_registers()
786 	xhci->s3.erst_base = xhci_read_64(xhci, &xhci->ir_set->erst_base);  in xhci_save_registers()
787 	xhci->s3.erst_dequeue = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);  in xhci_save_registers()
788 	xhci->s3.irq_pending = readl(&xhci->ir_set->irq_pending);  in xhci_save_registers()
789 	xhci->s3.irq_control = readl(&xhci->ir_set->irq_control);  in xhci_save_registers()
798 	writel(xhci->s3.erst_size, &xhci->ir_set->erst_size);  in xhci_restore_registers()
799 	xhci_write_64(xhci, xhci->s3.erst_base, &xhci->ir_set->erst_base);  in xhci_restore_registers()
800 	xhci_write_64(xhci, xhci->s3.erst_dequeue, &xhci->ir_set->erst_dequeue);  in xhci_restore_registers()
801 	writel(xhci->s3.irq_pending, &xhci->ir_set->irq_pending);  in xhci_restore_registers()
802 	writel(xhci->s3.irq_control, &xhci->ir_set->irq_control);  in xhci_restore_registers()
1059 		temp = readl(&xhci->ir_set->irq_pending);  in xhci_resume()
1060 		writel(ER_IRQ_DISABLE(temp), &xhci->ir_set->irq_pending);  in xhci_resume()