Lines Matching refs:imx21
70 #define DEBUG_LOG_FRAME(imx21, etd, event) \ argument
71 (etd)->event##_frame = readl((imx21)->regs + USBH_FRMNUB)
73 #define DEBUG_LOG_FRAME(imx21, etd, event) do { } while (0) argument
78 static inline struct imx21 *hcd_to_imx21(struct usb_hcd *hcd) in hcd_to_imx21()
80 return (struct imx21 *)hcd->hcd_priv; in hcd_to_imx21()
88 static inline void set_register_bits(struct imx21 *imx21, u32 offset, u32 mask) in set_register_bits() argument
90 void __iomem *reg = imx21->regs + offset; in set_register_bits()
94 static inline void clear_register_bits(struct imx21 *imx21, in clear_register_bits() argument
97 void __iomem *reg = imx21->regs + offset; in clear_register_bits()
101 static inline void clear_toggle_bit(struct imx21 *imx21, u32 offset, u32 mask) in clear_toggle_bit() argument
103 void __iomem *reg = imx21->regs + offset; in clear_toggle_bit()
109 static inline void set_toggle_bit(struct imx21 *imx21, u32 offset, u32 mask) in set_toggle_bit() argument
111 void __iomem *reg = imx21->regs + offset; in set_toggle_bit()
117 static void etd_writel(struct imx21 *imx21, int etd_num, int dword, u32 value) in etd_writel() argument
119 writel(value, imx21->regs + USB_ETD_DWORD(etd_num, dword)); in etd_writel()
122 static u32 etd_readl(struct imx21 *imx21, int etd_num, int dword) in etd_readl() argument
124 return readl(imx21->regs + USB_ETD_DWORD(etd_num, dword)); in etd_readl()
140 struct imx21 *imx21 = hcd_to_imx21(hcd); in imx21_hc_get_frame() local
142 return wrap_frame(readl(imx21->regs + USBH_FRMNUB)); in imx21_hc_get_frame()
153 struct imx21 *imx21, struct etd_priv *etd, int status);
154 static void schedule_nonisoc_etd(struct imx21 *imx21, struct urb *urb);
155 static void free_dmem(struct imx21 *imx21, struct etd_priv *etd);
161 static int alloc_etd(struct imx21 *imx21) in alloc_etd() argument
164 struct etd_priv *etd = imx21->etd; in alloc_etd()
168 memset(etd, 0, sizeof(imx21->etd[0])); in alloc_etd()
170 debug_etd_allocated(imx21); in alloc_etd()
177 static void disactivate_etd(struct imx21 *imx21, int num) in disactivate_etd() argument
180 struct etd_priv *etd = &imx21->etd[num]; in disactivate_etd()
182 writel(etd_mask, imx21->regs + USBH_ETDENCLR); in disactivate_etd()
183 clear_register_bits(imx21, USBH_ETDDONEEN, etd_mask); in disactivate_etd()
184 writel(etd_mask, imx21->regs + USB_ETDDMACHANLCLR); in disactivate_etd()
185 clear_toggle_bit(imx21, USBH_ETDDONESTAT, etd_mask); in disactivate_etd()
189 DEBUG_LOG_FRAME(imx21, etd, disactivated); in disactivate_etd()
192 static void reset_etd(struct imx21 *imx21, int num) in reset_etd() argument
194 struct etd_priv *etd = imx21->etd + num; in reset_etd()
197 disactivate_etd(imx21, num); in reset_etd()
200 etd_writel(imx21, num, i, 0); in reset_etd()
207 static void free_etd(struct imx21 *imx21, int num) in free_etd() argument
213 dev_err(imx21->dev, "BAD etd=%d!\n", num); in free_etd()
216 if (imx21->etd[num].alloc == 0) { in free_etd()
217 dev_err(imx21->dev, "ETD %d already free!\n", num); in free_etd()
221 debug_etd_freed(imx21); in free_etd()
222 reset_etd(imx21, num); in free_etd()
223 memset(&imx21->etd[num], 0, sizeof(imx21->etd[0])); in free_etd()
227 static void setup_etd_dword0(struct imx21 *imx21, in setup_etd_dword0() argument
230 etd_writel(imx21, etd_num, 0, in setup_etd_dword0()
245 struct imx21 *imx21, int dmem_offset, void *src, int count) in copy_to_dmem() argument
247 void __iomem *dmem = imx21->regs + USBOTG_DMEM + dmem_offset; in copy_to_dmem()
267 static void activate_etd(struct imx21 *imx21, int etd_num, u8 dir) in activate_etd() argument
270 struct etd_priv *etd = &imx21->etd[etd_num]; in activate_etd()
277 copy_to_dmem(imx21, in activate_etd()
298 dev_err(imx21->dev, "failed bounce alloc\n"); in activate_etd()
303 dma_map_single(imx21->dev, in activate_etd()
307 if (dma_mapping_error(imx21->dev, etd->dma_handle)) { in activate_etd()
308 dev_err(imx21->dev, "failed bounce map\n"); in activate_etd()
314 clear_toggle_bit(imx21, USBH_ETDDONESTAT, etd_mask); in activate_etd()
315 set_register_bits(imx21, USBH_ETDDONEEN, etd_mask); in activate_etd()
316 clear_toggle_bit(imx21, USBH_XFILLSTAT, etd_mask); in activate_etd()
317 clear_toggle_bit(imx21, USBH_YFILLSTAT, etd_mask); in activate_etd()
320 set_register_bits(imx21, USB_ETDDMACHANLCLR, etd_mask); in activate_etd()
321 clear_toggle_bit(imx21, USBH_XBUFSTAT, etd_mask); in activate_etd()
322 clear_toggle_bit(imx21, USBH_YBUFSTAT, etd_mask); in activate_etd()
323 writel(etd->dma_handle, imx21->regs + USB_ETDSMSA(etd_num)); in activate_etd()
324 set_register_bits(imx21, USB_ETDDMAEN, etd_mask); in activate_etd()
328 set_toggle_bit(imx21, USBH_XFILLSTAT, etd_mask); in activate_etd()
329 set_toggle_bit(imx21, USBH_YFILLSTAT, etd_mask); in activate_etd()
333 DEBUG_LOG_FRAME(imx21, etd, activated); in activate_etd()
338 etd->activated_frame = readl(imx21->regs + USBH_FRMNUB); in activate_etd()
344 etd->submitted_dwords[i] = etd_readl(imx21, etd_num, i); in activate_etd()
349 writel(etd_mask, imx21->regs + USBH_ETDENSET); in activate_etd()
356 free_dmem(imx21, etd); in activate_etd()
357 nonisoc_urb_completed_for_etd(imx21, etd, -ENOMEM); in activate_etd()
364 static int alloc_dmem(struct imx21 *imx21, unsigned int size, in alloc_dmem() argument
374 dev_err(imx21->dev, "size=%d > DMEM_SIZE(%d)\n", in alloc_dmem()
379 list_for_each_entry(tmp, &imx21->dmem_list, list) { in alloc_dmem()
397 debug_dmem_allocated(imx21, size); in alloc_dmem()
405 static void activate_queued_etd(struct imx21 *imx21, in activate_queued_etd() argument
409 int etd_num = etd - &imx21->etd[0]; in activate_queued_etd()
410 u32 maxpacket = etd_readl(imx21, etd_num, 1) >> DW1_YBUFSRTAD; in activate_queued_etd()
411 u8 dir = (etd_readl(imx21, etd_num, 2) >> DW2_DIRPID) & 0x03; in activate_queued_etd()
413 dev_dbg(imx21->dev, "activating queued ETD %d now DMEM available\n", in activate_queued_etd()
415 etd_writel(imx21, etd_num, 1, in activate_queued_etd()
420 activate_etd(imx21, etd_num, dir); in activate_queued_etd()
423 static void free_dmem(struct imx21 *imx21, struct etd_priv *etd) in free_dmem() argument
435 list_for_each_entry(area, &imx21->dmem_list, list) { in free_dmem()
437 debug_dmem_freed(imx21, area->size); in free_dmem()
446 dev_err(imx21->dev, in free_dmem()
452 list_for_each_entry_safe(etd, tmp, &imx21->queue_for_dmem, queue) { in free_dmem()
453 offset = alloc_dmem(imx21, etd->dmem_size, etd->ep); in free_dmem()
456 activate_queued_etd(imx21, etd, (u32)offset); in free_dmem()
461 static void free_epdmem(struct imx21 *imx21, struct usb_host_endpoint *ep) in free_epdmem() argument
465 list_for_each_entry_safe(area, tmp, &imx21->dmem_list, list) { in free_epdmem()
467 dev_err(imx21->dev, in free_epdmem()
482 static void ep_idle(struct imx21 *imx21, struct ep_priv *ep_priv) in ep_idle() argument
492 etd = &imx21->etd[etd_num]; in ep_idle()
495 free_dmem(imx21, etd); /* for isoc */ in ep_idle()
497 if (list_empty(&imx21->queue_for_etd)) { in ep_idle()
498 free_etd(imx21, etd_num); in ep_idle()
502 dev_dbg(imx21->dev, in ep_idle()
504 ep_priv = list_first_entry(&imx21->queue_for_etd, in ep_idle()
507 reset_etd(imx21, etd_num); in ep_idle()
512 dev_err(imx21->dev, "No urb for queued ep!\n"); in ep_idle()
515 schedule_nonisoc_etd(imx21, list_first_entry( in ep_idle()
521 __releases(imx21->lock) in urb_done()
522 __acquires(imx21->lock) in urb_done()
524 struct imx21 *imx21 = hcd_to_imx21(hcd); in urb_done() local
528 debug_urb_completed(imx21, urb, status); in urb_done()
529 dev_vdbg(imx21->dev, "urb %p done %d\n", urb, status); in urb_done()
535 spin_unlock(&imx21->lock); in urb_done()
537 spin_lock(&imx21->lock); in urb_done()
539 ep_idle(imx21, ep_priv); in urb_done()
543 struct imx21 *imx21, struct etd_priv *etd, int status) in nonisoc_urb_completed_for_etd() argument
547 urb_done(imx21->hcd, etd->urb, status); in nonisoc_urb_completed_for_etd()
554 dev_vdbg(imx21->dev, "next URB %p\n", urb); in nonisoc_urb_completed_for_etd()
555 schedule_nonisoc_etd(imx21, urb); in nonisoc_urb_completed_for_etd()
567 struct imx21 *imx21 = hcd_to_imx21(hcd); in schedule_isoc_etds() local
586 etd = &imx21->etd[etd_num]; in schedule_isoc_etds()
596 dev_dbg(imx21->dev, "isoc too late frame %d > %d\n", in schedule_isoc_etds()
615 debug_isoc_submitted(imx21, cur_frame, td); in schedule_isoc_etds()
618 setup_etd_dword0(imx21, etd_num, td->urb, dir, etd->dmem_size); in schedule_isoc_etds()
619 etd_writel(imx21, etd_num, 1, etd->dmem_offset); in schedule_isoc_etds()
620 etd_writel(imx21, etd_num, 2, in schedule_isoc_etds()
623 etd_writel(imx21, etd_num, 3, in schedule_isoc_etds()
627 activate_etd(imx21, etd_num, dir); in schedule_isoc_etds()
633 struct imx21 *imx21 = hcd_to_imx21(hcd); in isoc_etd_done() local
635 struct etd_priv *etd = imx21->etd + etd_num; in isoc_etd_done()
646 disactivate_etd(imx21, etd_num); in isoc_etd_done()
648 cc = (etd_readl(imx21, etd_num, 3) >> DW3_COMPCODE0) & 0xf; in isoc_etd_done()
649 bytes_xfrd = etd_readl(imx21, etd_num, 3) & 0x3ff; in isoc_etd_done()
660 debug_isoc_completed(imx21, in isoc_etd_done()
664 dev_dbg(imx21->dev, in isoc_etd_done()
672 clear_toggle_bit(imx21, USBH_XFILLSTAT, etd_mask); in isoc_etd_done()
675 imx21->regs + USBOTG_DMEM + etd->dmem_offset, in isoc_etd_done()
694 struct imx21 *imx21, struct usb_host_endpoint *ep) in alloc_isoc_ep() argument
712 static int alloc_isoc_etds(struct imx21 *imx21, struct ep_priv *ep_priv) in alloc_isoc_etds() argument
720 etd_num = alloc_etd(imx21); in alloc_isoc_etds()
725 imx21->etd[etd_num].ep = ep_priv->ep; in alloc_isoc_etds()
731 dev_err(imx21->dev, "isoc: Couldn't allocate etd\n"); in alloc_isoc_etds()
733 free_etd(imx21, ep_priv->etd[j]); in alloc_isoc_etds()
743 struct imx21 *imx21 = hcd_to_imx21(hcd); in imx21_hc_urb_enqueue_isoc() local
764 spin_lock_irqsave(&imx21->lock, flags); in imx21_hc_urb_enqueue_isoc()
767 ep_priv = alloc_isoc_ep(imx21, ep); in imx21_hc_urb_enqueue_isoc()
776 ret = alloc_isoc_etds(imx21, ep_priv); in imx21_hc_urb_enqueue_isoc()
793 struct etd_priv *etd = &imx21->etd[ep_priv->etd[i]]; in imx21_hc_urb_enqueue_isoc()
797 dev_err(imx21->dev, "increasing isoc buffer %d->%d\n", in imx21_hc_urb_enqueue_isoc()
804 etd->dmem_offset = alloc_dmem(imx21, maxpacket, ep); in imx21_hc_urb_enqueue_isoc()
806 dev_dbg(imx21->dev, "failed alloc isoc dmem\n"); in imx21_hc_urb_enqueue_isoc()
824 dev_dbg(imx21->dev, in imx21_hc_urb_enqueue_isoc()
857 dev_vdbg(imx21->dev, "setup %d packets for iso frame %d->%d\n", in imx21_hc_urb_enqueue_isoc()
860 debug_urb_submitted(imx21, urb); in imx21_hc_urb_enqueue_isoc()
863 spin_unlock_irqrestore(&imx21->lock, flags); in imx21_hc_urb_enqueue_isoc()
872 spin_unlock_irqrestore(&imx21->lock, flags); in imx21_hc_urb_enqueue_isoc()
880 static void dequeue_isoc_urb(struct imx21 *imx21, in dequeue_isoc_urb() argument
890 if (etd_num != -1 && imx21->etd[etd_num].urb == urb) { in dequeue_isoc_urb()
891 struct etd_priv *etd = imx21->etd + etd_num; in dequeue_isoc_urb()
893 reset_etd(imx21, etd_num); in dequeue_isoc_urb()
894 free_dmem(imx21, etd); in dequeue_isoc_urb()
901 dev_vdbg(imx21->dev, "removing td %p\n", td); in dequeue_isoc_urb()
911 static void schedule_nonisoc_etd(struct imx21 *imx21, struct urb *urb) in schedule_nonisoc_etd() argument
929 dev_err(imx21->dev, "No valid ETD\n"); in schedule_nonisoc_etd()
932 if (readl(imx21->regs + USBH_ETDENSET) & (1 << etd_num)) in schedule_nonisoc_etd()
933 dev_err(imx21->dev, "submitting to active ETD %d\n", etd_num); in schedule_nonisoc_etd()
935 etd = &imx21->etd[etd_num]; in schedule_nonisoc_etd()
944 usb_hcd_unmap_urb_setup_for_dma(imx21->hcd, in schedule_nonisoc_etd()
961 usb_hcd_unmap_urb_for_dma(imx21->hcd, urb); in schedule_nonisoc_etd()
989 relpolpos = (readl(imx21->regs + USBH_FRMNUB) + 1) & 0xff; in schedule_nonisoc_etd()
993 setup_etd_dword0(imx21, etd_num, urb, dir, maxpacket); in schedule_nonisoc_etd()
995 etd_writel(imx21, etd_num, 2, in schedule_nonisoc_etd()
1011 etd_writel(imx21, etd_num, 3, in schedule_nonisoc_etd()
1019 etd->dmem_offset = alloc_dmem(imx21, etd->dmem_size, urb_priv->ep); in schedule_nonisoc_etd()
1022 etd_writel(imx21, etd_num, 1, (u32)maxpacket << 16); in schedule_nonisoc_etd()
1024 dev_dbg(imx21->dev, "Queuing etd %d for DMEM\n", etd_num); in schedule_nonisoc_etd()
1025 debug_urb_queued_for_dmem(imx21, urb); in schedule_nonisoc_etd()
1026 list_add_tail(&etd->queue, &imx21->queue_for_dmem); in schedule_nonisoc_etd()
1030 etd_writel(imx21, etd_num, 1, in schedule_nonisoc_etd()
1037 dev_vdbg(imx21->dev, "Activating etd %d for %d bytes %s\n", in schedule_nonisoc_etd()
1039 activate_etd(imx21, etd_num, dir); in schedule_nonisoc_etd()
1045 struct imx21 *imx21 = hcd_to_imx21(hcd); in nonisoc_etd_done() local
1046 struct etd_priv *etd = &imx21->etd[etd_num]; in nonisoc_etd_done()
1055 disactivate_etd(imx21, etd_num); in nonisoc_etd_done()
1057 dir = (etd_readl(imx21, etd_num, 0) >> DW0_DIRECT) & 0x3; in nonisoc_etd_done()
1058 cc = (etd_readl(imx21, etd_num, 2) >> DW2_COMPCODE) & 0xf; in nonisoc_etd_done()
1059 bytes_xfrd = etd->len - (etd_readl(imx21, etd_num, 3) & 0x1fffff); in nonisoc_etd_done()
1064 (etd_readl(imx21, etd_num, 0) >> DW0_TOGCRY) & 0x1); in nonisoc_etd_done()
1067 clear_toggle_bit(imx21, USBH_XFILLSTAT, etd_mask); in nonisoc_etd_done()
1068 clear_toggle_bit(imx21, USBH_YFILLSTAT, etd_mask); in nonisoc_etd_done()
1072 dma_unmap_single(imx21->dev, in nonisoc_etd_done()
1076 imx21->regs + USBOTG_DMEM + etd->dmem_offset, in nonisoc_etd_done()
1083 free_dmem(imx21, etd); in nonisoc_etd_done()
1091 dev_vdbg(imx21->dev, "cc is 0x%x\n", cc); in nonisoc_etd_done()
1112 dev_err(imx21->dev, in nonisoc_etd_done()
1141 nonisoc_urb_completed_for_etd(imx21, etd, cc_to_error[cc]); in nonisoc_etd_done()
1143 dev_vdbg(imx21->dev, "next state=%d\n", urb_priv->state); in nonisoc_etd_done()
1144 schedule_nonisoc_etd(imx21, urb); in nonisoc_etd_done()
1167 struct imx21 *imx21 = hcd_to_imx21(hcd); in imx21_hc_urb_enqueue() local
1175 dev_vdbg(imx21->dev, in imx21_hc_urb_enqueue()
1190 spin_lock_irqsave(&imx21->lock, flags); in imx21_hc_urb_enqueue()
1222 debug_urb_submitted(imx21, urb); in imx21_hc_urb_enqueue()
1225 dev_dbg(imx21->dev, in imx21_hc_urb_enqueue()
1228 debug_urb_queued_for_etd(imx21, urb); in imx21_hc_urb_enqueue()
1231 ep_priv->etd[0] = alloc_etd(imx21); in imx21_hc_urb_enqueue()
1233 dev_dbg(imx21->dev, in imx21_hc_urb_enqueue()
1235 debug_urb_queued_for_etd(imx21, urb); in imx21_hc_urb_enqueue()
1236 list_add_tail(&ep_priv->queue, &imx21->queue_for_etd); in imx21_hc_urb_enqueue()
1243 etd = &imx21->etd[ep_priv->etd[0]]; in imx21_hc_urb_enqueue()
1245 DEBUG_LOG_FRAME(imx21, etd, last_req); in imx21_hc_urb_enqueue()
1246 schedule_nonisoc_etd(imx21, urb); in imx21_hc_urb_enqueue()
1250 spin_unlock_irqrestore(&imx21->lock, flags); in imx21_hc_urb_enqueue()
1255 spin_unlock_irqrestore(&imx21->lock, flags); in imx21_hc_urb_enqueue()
1263 struct imx21 *imx21 = hcd_to_imx21(hcd); in imx21_hc_urb_dequeue() local
1270 dev_vdbg(imx21->dev, "dequeue urb=%p iso=%d status=%d\n", in imx21_hc_urb_dequeue()
1273 spin_lock_irqsave(&imx21->lock, flags); in imx21_hc_urb_dequeue()
1281 debug_urb_unlinked(imx21, urb); in imx21_hc_urb_dequeue()
1284 dequeue_isoc_urb(imx21, urb, ep_priv); in imx21_hc_urb_dequeue()
1289 struct etd_priv *etd = &imx21->etd[etd_num]; in imx21_hc_urb_dequeue()
1291 disactivate_etd(imx21, etd_num); in imx21_hc_urb_dequeue()
1292 free_dmem(imx21, etd); in imx21_hc_urb_dequeue()
1301 spin_unlock_irqrestore(&imx21->lock, flags); in imx21_hc_urb_dequeue()
1305 spin_unlock_irqrestore(&imx21->lock, flags); in imx21_hc_urb_dequeue()
1313 static void process_etds(struct usb_hcd *hcd, struct imx21 *imx21, int sof) in process_etds() argument
1319 spin_lock_irqsave(&imx21->lock, flags); in process_etds()
1323 u32 enabled = readl(imx21->regs + USBH_ETDENSET) & etd_mask; in process_etds()
1324 u32 done = readl(imx21->regs + USBH_ETDDONESTAT) & etd_mask; in process_etds()
1325 struct etd_priv *etd = &imx21->etd[etd_num]; in process_etds()
1329 DEBUG_LOG_FRAME(imx21, etd, last_int); in process_etds()
1356 cc = etd_readl(imx21, etd_num, 2) >> DW2_COMPCODE; in process_etds()
1363 dword0 = etd_readl(imx21, etd_num, 0); in process_etds()
1364 dev_dbg(imx21->dev, in process_etds()
1371 dev_dbg(imx21->dev, in process_etds()
1378 readl(imx21->regs + USBH_FRMNUB)); in process_etds()
1379 imx21->debug_unblocks++; in process_etds()
1386 dev_dbg(imx21->dev, in process_etds()
1390 disactivate_etd(imx21, etd_num); in process_etds()
1402 set_register_bits(imx21, USBH_SYSIEN, USBH_SYSIEN_SOFINT); in process_etds()
1404 clear_register_bits(imx21, USBH_SYSIEN, USBH_SYSIEN_SOFINT); in process_etds()
1407 spin_unlock_irqrestore(&imx21->lock, flags); in process_etds()
1412 struct imx21 *imx21 = hcd_to_imx21(hcd); in imx21_irq() local
1413 u32 ints = readl(imx21->regs + USBH_SYSISR); in imx21_irq()
1416 dev_dbg(imx21->dev, "Scheduling error\n"); in imx21_irq()
1419 dev_dbg(imx21->dev, "Scheduling overrun\n"); in imx21_irq()
1422 process_etds(hcd, imx21, ints & USBH_SYSISR_SOFINT); in imx21_irq()
1424 writel(ints, imx21->regs + USBH_SYSISR); in imx21_irq()
1431 struct imx21 *imx21 = hcd_to_imx21(hcd); in imx21_hc_endpoint_disable() local
1439 spin_lock_irqsave(&imx21->lock, flags); in imx21_hc_endpoint_disable()
1441 dev_vdbg(imx21->dev, "disable ep=%p, ep->hcpriv=%p\n", ep, ep_priv); in imx21_hc_endpoint_disable()
1444 dev_dbg(imx21->dev, "ep's URB list is not empty\n"); in imx21_hc_endpoint_disable()
1449 dev_dbg(imx21->dev, "free etd %d for disable\n", in imx21_hc_endpoint_disable()
1452 free_etd(imx21, ep_priv->etd[i]); in imx21_hc_endpoint_disable()
1459 if (imx21->etd[i].alloc && imx21->etd[i].ep == ep) { in imx21_hc_endpoint_disable()
1460 dev_err(imx21->dev, in imx21_hc_endpoint_disable()
1462 free_etd(imx21, i); in imx21_hc_endpoint_disable()
1465 free_epdmem(imx21, ep); in imx21_hc_endpoint_disable()
1466 spin_unlock_irqrestore(&imx21->lock, flags); in imx21_hc_endpoint_disable()
1476 struct imx21 *imx21 = hcd_to_imx21(hcd); in get_hub_descriptor() local
1480 desc->bNbrPorts = readl(imx21->regs + USBH_ROOTHUBA) in get_hub_descriptor()
1495 struct imx21 *imx21 = hcd_to_imx21(hcd); in imx21_hc_hub_status_data() local
1501 spin_lock_irqsave(&imx21->lock, flags); in imx21_hc_hub_status_data()
1502 ports = readl(imx21->regs + USBH_ROOTHUBA) in imx21_hc_hub_status_data()
1506 dev_err(imx21->dev, "ports %d > 7\n", ports); in imx21_hc_hub_status_data()
1509 if (readl(imx21->regs + USBH_PORTSTAT(i)) & in imx21_hc_hub_status_data()
1520 spin_unlock_irqrestore(&imx21->lock, flags); in imx21_hc_hub_status_data()
1523 dev_info(imx21->dev, "Hub status changed\n"); in imx21_hc_hub_status_data()
1531 struct imx21 *imx21 = hcd_to_imx21(hcd); in imx21_hc_hub_control() local
1537 dev_dbg(imx21->dev, "ClearHubFeature\n"); in imx21_hc_hub_control()
1540 dev_dbg(imx21->dev, " OVER_CURRENT\n"); in imx21_hc_hub_control()
1543 dev_dbg(imx21->dev, " LOCAL_POWER\n"); in imx21_hc_hub_control()
1546 dev_dbg(imx21->dev, " unknown\n"); in imx21_hc_hub_control()
1553 dev_dbg(imx21->dev, "ClearPortFeature\n"); in imx21_hc_hub_control()
1556 dev_dbg(imx21->dev, " ENABLE\n"); in imx21_hc_hub_control()
1560 dev_dbg(imx21->dev, " SUSPEND\n"); in imx21_hc_hub_control()
1564 dev_dbg(imx21->dev, " POWER\n"); in imx21_hc_hub_control()
1568 dev_dbg(imx21->dev, " C_ENABLE\n"); in imx21_hc_hub_control()
1572 dev_dbg(imx21->dev, " C_SUSPEND\n"); in imx21_hc_hub_control()
1576 dev_dbg(imx21->dev, " C_CONNECTION\n"); in imx21_hc_hub_control()
1580 dev_dbg(imx21->dev, " C_OVER_CURRENT\n"); in imx21_hc_hub_control()
1584 dev_dbg(imx21->dev, " C_RESET\n"); in imx21_hc_hub_control()
1588 dev_dbg(imx21->dev, " unknown\n"); in imx21_hc_hub_control()
1596 dev_dbg(imx21->dev, "GetHubDescriptor\n"); in imx21_hc_hub_control()
1601 dev_dbg(imx21->dev, " GetHubStatus\n"); in imx21_hc_hub_control()
1606 dev_dbg(imx21->dev, "GetPortStatus: port: %d, 0x%x\n", in imx21_hc_hub_control()
1608 *(__le32 *) buf = readl(imx21->regs + in imx21_hc_hub_control()
1613 dev_dbg(imx21->dev, "SetHubFeature\n"); in imx21_hc_hub_control()
1616 dev_dbg(imx21->dev, " OVER_CURRENT\n"); in imx21_hc_hub_control()
1620 dev_dbg(imx21->dev, " LOCAL_POWER\n"); in imx21_hc_hub_control()
1623 dev_dbg(imx21->dev, " unknown\n"); in imx21_hc_hub_control()
1631 dev_dbg(imx21->dev, "SetPortFeature\n"); in imx21_hc_hub_control()
1634 dev_dbg(imx21->dev, " SUSPEND\n"); in imx21_hc_hub_control()
1638 dev_dbg(imx21->dev, " POWER\n"); in imx21_hc_hub_control()
1642 dev_dbg(imx21->dev, " RESET\n"); in imx21_hc_hub_control()
1646 dev_dbg(imx21->dev, " unknown\n"); in imx21_hc_hub_control()
1653 dev_dbg(imx21->dev, " unknown\n"); in imx21_hc_hub_control()
1659 writel(status_write, imx21->regs + USBH_PORTSTAT(wIndex - 1)); in imx21_hc_hub_control()
1669 struct imx21 *imx21 = hcd_to_imx21(hcd); in imx21_hc_reset() local
1673 spin_lock_irqsave(&imx21->lock, flags); in imx21_hc_reset()
1678 imx21->regs + USBOTG_RST_CTRL); in imx21_hc_reset()
1682 while (readl(imx21->regs + USBOTG_RST_CTRL) != 0) { in imx21_hc_reset()
1684 spin_unlock_irqrestore(&imx21->lock, flags); in imx21_hc_reset()
1685 dev_err(imx21->dev, "timeout waiting for reset\n"); in imx21_hc_reset()
1688 spin_unlock_irq(&imx21->lock); in imx21_hc_reset()
1690 spin_lock_irq(&imx21->lock); in imx21_hc_reset()
1692 spin_unlock_irqrestore(&imx21->lock, flags); in imx21_hc_reset()
1698 struct imx21 *imx21 = hcd_to_imx21(hcd); in imx21_hc_start() local
1704 hw_mode |= ((imx21->pdata->host_xcvr << USBOTG_HWMODE_HOSTXCVR_SHIFT) & in imx21_hc_start()
1706 hw_mode |= ((imx21->pdata->otg_xcvr << USBOTG_HWMODE_OTGXCVR_SHIFT) & in imx21_hc_start()
1709 if (imx21->pdata->host1_txenoe) in imx21_hc_start()
1712 if (!imx21->pdata->host1_xcverless) in imx21_hc_start()
1715 if (imx21->pdata->otg_ext_xcvr) in imx21_hc_start()
1719 spin_lock_irqsave(&imx21->lock, flags); in imx21_hc_start()
1722 imx21->regs + USBOTG_CLK_CTRL); in imx21_hc_start()
1723 writel(hw_mode, imx21->regs + USBOTG_HWMODE); in imx21_hc_start()
1724 writel(usb_control, imx21->regs + USBCTRL); in imx21_hc_start()
1726 imx21->regs + USB_MISCCONTROL); in imx21_hc_start()
1731 etd_writel(imx21, i, j, 0); in imx21_hc_start()
1735 imx21->regs + USBH_HOST_CTRL); in imx21_hc_start()
1738 if (imx21->pdata->enable_otg_host) in imx21_hc_start()
1740 imx21->regs + USBH_PORTSTAT(0)); in imx21_hc_start()
1742 if (imx21->pdata->enable_host1) in imx21_hc_start()
1744 imx21->regs + USBH_PORTSTAT(1)); in imx21_hc_start()
1746 if (imx21->pdata->enable_host2) in imx21_hc_start()
1748 imx21->regs + USBH_PORTSTAT(2)); in imx21_hc_start()
1754 set_register_bits(imx21, USBH_SYSIEN, in imx21_hc_start()
1757 set_register_bits(imx21, USBOTG_CINT_STEN, USBOTG_HCINT); in imx21_hc_start()
1759 spin_unlock_irqrestore(&imx21->lock, flags); in imx21_hc_start()
1766 struct imx21 *imx21 = hcd_to_imx21(hcd); in imx21_hc_stop() local
1769 spin_lock_irqsave(&imx21->lock, flags); in imx21_hc_stop()
1771 writel(0, imx21->regs + USBH_SYSIEN); in imx21_hc_stop()
1772 clear_register_bits(imx21, USBOTG_CINT_STEN, USBOTG_HCINT); in imx21_hc_stop()
1773 clear_register_bits(imx21, USBOTG_CLK_CTRL_HST | USBOTG_CLK_CTRL_MAIN, in imx21_hc_stop()
1775 spin_unlock_irqrestore(&imx21->lock, flags); in imx21_hc_stop()
1785 .hcd_priv_size = sizeof(struct imx21),
1820 struct imx21 *imx21 = hcd_to_imx21(hcd); in imx21_remove() local
1823 remove_debug_files(imx21); in imx21_remove()
1827 clk_disable_unprepare(imx21->clk); in imx21_remove()
1828 clk_put(imx21->clk); in imx21_remove()
1829 iounmap(imx21->regs); in imx21_remove()
1841 struct imx21 *imx21; in imx21_probe() local
1863 imx21 = hcd_to_imx21(hcd); in imx21_probe()
1864 imx21->hcd = hcd; in imx21_probe()
1865 imx21->dev = &pdev->dev; in imx21_probe()
1866 imx21->pdata = dev_get_platdata(&pdev->dev); in imx21_probe()
1867 if (!imx21->pdata) in imx21_probe()
1868 imx21->pdata = &default_pdata; in imx21_probe()
1870 spin_lock_init(&imx21->lock); in imx21_probe()
1871 INIT_LIST_HEAD(&imx21->dmem_list); in imx21_probe()
1872 INIT_LIST_HEAD(&imx21->queue_for_etd); in imx21_probe()
1873 INIT_LIST_HEAD(&imx21->queue_for_dmem); in imx21_probe()
1874 create_debug_files(imx21); in imx21_probe()
1882 imx21->regs = ioremap(res->start, resource_size(res)); in imx21_probe()
1883 if (imx21->regs == NULL) { in imx21_probe()
1884 dev_err(imx21->dev, "Cannot map registers\n"); in imx21_probe()
1890 imx21->clk = clk_get(imx21->dev, NULL); in imx21_probe()
1891 if (IS_ERR(imx21->clk)) { in imx21_probe()
1892 dev_err(imx21->dev, "no clock found\n"); in imx21_probe()
1893 ret = PTR_ERR(imx21->clk); in imx21_probe()
1897 ret = clk_set_rate(imx21->clk, clk_round_rate(imx21->clk, 48000000)); in imx21_probe()
1900 ret = clk_prepare_enable(imx21->clk); in imx21_probe()
1904 dev_info(imx21->dev, "Hardware HC revision: 0x%02X\n", in imx21_probe()
1905 (readl(imx21->regs + USBOTG_HWMODE) >> 16) & 0xFF); in imx21_probe()
1909 dev_err(imx21->dev, "usb_add_hcd() returned %d\n", ret); in imx21_probe()
1917 clk_disable_unprepare(imx21->clk); in imx21_probe()
1920 clk_put(imx21->clk); in imx21_probe()
1922 iounmap(imx21->regs); in imx21_probe()
1926 remove_debug_files(imx21); in imx21_probe()