179 	int etd_mask = (1 << num);  in disactivate_etd()  local
182 	writel(etd_mask, imx21->regs + USBH_ETDENCLR);  in disactivate_etd()
183 	clear_register_bits(imx21, USBH_ETDDONEEN, etd_mask);  in disactivate_etd()
184 	writel(etd_mask, imx21->regs + USB_ETDDMACHANLCLR);  in disactivate_etd()
185 	clear_toggle_bit(imx21, USBH_ETDDONESTAT, etd_mask);  in disactivate_etd()
269 	u32 etd_mask = 1 << etd_num;  in activate_etd()  local
314 	clear_toggle_bit(imx21, USBH_ETDDONESTAT, etd_mask);  in activate_etd()
315 	set_register_bits(imx21, USBH_ETDDONEEN, etd_mask);  in activate_etd()
316 	clear_toggle_bit(imx21, USBH_XFILLSTAT, etd_mask);  in activate_etd()
317 	clear_toggle_bit(imx21, USBH_YFILLSTAT, etd_mask);  in activate_etd()
320 		set_register_bits(imx21, USB_ETDDMACHANLCLR, etd_mask);  in activate_etd()
321 		clear_toggle_bit(imx21, USBH_XBUFSTAT, etd_mask);  in activate_etd()
322 		clear_toggle_bit(imx21, USBH_YBUFSTAT, etd_mask);  in activate_etd()
324 		set_register_bits(imx21, USB_ETDDMAEN, etd_mask);  in activate_etd()
328 			set_toggle_bit(imx21, USBH_XFILLSTAT, etd_mask);  in activate_etd()
329 			set_toggle_bit(imx21, USBH_YFILLSTAT, etd_mask);  in activate_etd()
349 	writel(etd_mask, imx21->regs + USBH_ETDENSET);  in activate_etd()
634 	int etd_mask = 1 << etd_num;  in isoc_etd_done()  local
672 		clear_toggle_bit(imx21, USBH_XFILLSTAT, etd_mask);  in isoc_etd_done()
1048 	u32 etd_mask = 1 << etd_num;  in nonisoc_etd_done()  local
1067 		clear_toggle_bit(imx21, USBH_XFILLSTAT, etd_mask);  in nonisoc_etd_done()
1068 		clear_toggle_bit(imx21, USBH_YFILLSTAT, etd_mask);  in nonisoc_etd_done()
1322 		u32 etd_mask = 1 << etd_num;  in process_etds()  local
1323 		u32 enabled = readl(imx21->regs + USBH_ETDENSET) & etd_mask;  in process_etds()
1324 		u32 done = readl(imx21->regs + USBH_ETDDONESTAT) & etd_mask;  in process_etds()