392 		if (ep->num != UDC_EP0OUT_IX)  in udc_ep_enable()
773 				|| ep->num == UDC_EP0OUT_IX  in prep_dma()
1067 	if (!ep->ep.desc && (ep->num != 0 && ep->num != UDC_EP0OUT_IX))  in udc_queue()
1208 			if (ep->num != UDC_EP0OUT_IX)  in udc_queue()
1259 				&& ep->num != UDC_EP0OUT_IX)))  in udc_dequeue()
1318 	if (!ep->ep.desc && (ep->num != 0 && ep->num != UDC_EP0OUT_IX))  in udc_set_halt()
1552 			if (tmp != UDC_EP0IN_IX && tmp != UDC_EP0OUT_IX  in udc_setup_endpoints()
1567 		usb_ep_set_maxpacket_limit(&dev->ep[UDC_EP0OUT_IX].ep,  in udc_setup_endpoints()
1572 		usb_ep_set_maxpacket_limit(&dev->ep[UDC_EP0OUT_IX].ep,  in udc_setup_endpoints()
1820 	dev->ep[UDC_EP0OUT_IX].in = 0;  in activate_control_endpoints()
1843 	tmp = readl(&dev->ep[UDC_EP0OUT_IX].regs->bufout_maxpkt);  in activate_control_endpoints()
1850 	writel(tmp, &dev->ep[UDC_EP0OUT_IX].regs->bufout_maxpkt);  in activate_control_endpoints()
1863 		dev->ep[UDC_EP0OUT_IX].td->status |=  in activate_control_endpoints()
1866 		writel(dev->ep[UDC_EP0OUT_IX].td_stp_dma,  in activate_control_endpoints()
1867 			&dev->ep[UDC_EP0OUT_IX].regs->subptr);  in activate_control_endpoints()
1868 		writel(dev->ep[UDC_EP0OUT_IX].td_phys,  in activate_control_endpoints()
1869 			&dev->ep[UDC_EP0OUT_IX].regs->desptr);  in activate_control_endpoints()
1898 	tmp = readl(&dev->ep[UDC_EP0OUT_IX].regs->ctl);  in activate_control_endpoints()
1900 	writel(tmp, &dev->ep[UDC_EP0OUT_IX].regs->ctl);  in activate_control_endpoints()
1901 	dev->ep[UDC_EP0OUT_IX].naking = 0;  in activate_control_endpoints()
1902 	UDC_QUEUE_CNAK(&dev->ep[UDC_EP0OUT_IX], UDC_EP0OUT_IX);  in activate_control_endpoints()
1930 	dev->ep[UDC_EP0OUT_IX].ep.driver_data =  in amd5536_udc_start()
2005 	if (cnak_pending & (1 << UDC_EP0OUT_IX)) {  in udc_process_cnak_queue()
2006 		DBG(dev, "CNAK pending for ep%d\n", UDC_EP0OUT_IX);  in udc_process_cnak_queue()
2008 		reg = readl(&dev->ep[UDC_EP0OUT_IX].regs->ctl);  in udc_process_cnak_queue()
2010 		writel(reg, &dev->ep[UDC_EP0OUT_IX].regs->ctl);  in udc_process_cnak_queue()
2011 		dev->ep[UDC_EP0OUT_IX].naking = 0;  in udc_process_cnak_queue()
2012 		UDC_QUEUE_CNAK(&dev->ep[UDC_EP0OUT_IX],  in udc_process_cnak_queue()
2013 				dev->ep[UDC_EP0OUT_IX].num);  in udc_process_cnak_queue()
2228 				if (ep->num != UDC_EP0OUT_IX)  in udc_data_out_isr()
2430 	ep = &dev->ep[UDC_EP0OUT_IX];  in udc_control_out_isr()
2435 	tmp = readl(&dev->ep[UDC_EP0OUT_IX].regs->sts);  in udc_control_out_isr()
2440 			&dev->ep[UDC_EP0OUT_IX].regs->sts);  in udc_control_out_isr()
2467 				&dev->ep[UDC_EP0OUT_IX].regs->sts);  in udc_control_out_isr()
2470 				dev->ep[UDC_EP0OUT_IX].td_stp->data12;  in udc_control_out_isr()
2472 				dev->ep[UDC_EP0OUT_IX].td_stp->data34;  in udc_control_out_isr()
2474 			dev->ep[UDC_EP0OUT_IX].td_stp->status =  in udc_control_out_isr()
2488 			dev->gadget.ep0 = &dev->ep[UDC_EP0OUT_IX].ep;  in udc_control_out_isr()
2496 					&dev->ep[UDC_EP0OUT_IX].regs->desptr);  in udc_control_out_isr()
2501 			dev->ep[UDC_EP0OUT_IX].naking = 1;  in udc_control_out_isr()
2560 			tmp = readl(&dev->ep[UDC_EP0OUT_IX].regs->ctl);  in udc_control_out_isr()
2562 			writel(tmp, &dev->ep[UDC_EP0OUT_IX].regs->ctl);  in udc_control_out_isr()
2563 			dev->ep[UDC_EP0OUT_IX].naking = 0;  in udc_control_out_isr()
2564 			UDC_QUEUE_CNAK(&dev->ep[UDC_EP0OUT_IX], UDC_EP0OUT_IX);  in udc_control_out_isr()
2570 				&dev->ep[UDC_EP0OUT_IX].regs->sts);  in udc_control_out_isr()
2576 		writel(UDC_EPSTS_OUT_CLEAR, &dev->ep[UDC_EP0OUT_IX].regs->sts);  in udc_control_out_isr()
2581 			if (list_empty(&dev->ep[UDC_EP0OUT_IX].queue)) {  in udc_control_out_isr()
2585 				dev->ep[UDC_EP0OUT_IX].td->status =  in udc_control_out_isr()
2587 					dev->ep[UDC_EP0OUT_IX].td->status,  in udc_control_out_isr()
2596 				ret_val |= udc_data_out_isr(dev, UDC_EP0OUT_IX);  in udc_control_out_isr()
2598 				writel(dev->ep[UDC_EP0OUT_IX].td_phys,  in udc_control_out_isr()
2599 					&dev->ep[UDC_EP0OUT_IX].regs->desptr);  in udc_control_out_isr()
2606 			count = readl(&dev->ep[UDC_EP0OUT_IX].regs->sts);  in udc_control_out_isr()
2613 				ret_val |= udc_data_out_isr(dev, UDC_EP0OUT_IX);  in udc_control_out_isr()
2616 				readl(&dev->ep[UDC_EP0OUT_IX].regs->confirm);  in udc_control_out_isr()
3060 			dev->ep[UDC_EP0OUT_IX].td_stp,  in udc_pci_remove()
3061 			dev->ep[UDC_EP0OUT_IX].td_stp_dma);  in udc_pci_remove()
3063 			dev->ep[UDC_EP0OUT_IX].td,  in udc_pci_remove()
3064 			dev->ep[UDC_EP0OUT_IX].td_phys);  in udc_pci_remove()
3121 				&dev->ep[UDC_EP0OUT_IX].td_stp_dma);  in init_dma_pools()
3126 	dev->ep[UDC_EP0OUT_IX].td_stp = td_stp;  in init_dma_pools()
3130 				&dev->ep[UDC_EP0OUT_IX].td_phys);  in init_dma_pools()
3135 	dev->ep[UDC_EP0OUT_IX].td = td_data;  in init_dma_pools()