218 	unsigned char ie1_value;  member
2111 	unsigned char status = read_reg(info, SR1) & info->ie1_value & (FLGD + IDLD + CDCD + BRKD);  in isr_rxint()
2246 	info->ie1_value &= ~(IDLE + UDRN);  in isr_txeom()
2247 	write_reg16(info, IE0, (unsigned short)((info->ie1_value << 8) + info->ie0_value));  in isr_txeom()
2290 	unsigned char status = read_reg(info, SR1) & info->ie1_value & (UDRN + IDLE + CCTS);  in isr_txint()
2325 		info->ie1_value |= IDLE;  in isr_txrdy()
2326 		write_reg16(info, IE0, (unsigned short)((info->ie1_value << 8) + info->ie0_value));  in isr_txrdy()
2445 				info->ie1_value &= ~CDCD;  in isr_io_pin()
2446 				write_reg(info, IE1, info->ie1_value);  in isr_io_pin()
2465 				info->ie1_value &= ~CCTS;  in isr_io_pin()
2466 				write_reg(info, IE1, info->ie1_value);  in isr_io_pin()
2745 	info->ie1_value |= (CDCD|CCTS);  in program_hw()
2746 	write_reg(info, IE1, info->ie1_value);  in program_hw()
2994 		info->ie1_value &= ~UDRN;  in tx_abort()
2995 		info->ie1_value |= IDLE;  in tx_abort()
2996 		write_reg(info, IE1, info->ie1_value);	/* disable tx status interrupts */  in tx_abort()
3072 		unsigned char oldval = info->ie1_value;  in wait_mgsl_event()
3077 			info->ie1_value = newval;  in wait_mgsl_event()
3078 			write_reg(info, IE1, info->ie1_value);  in wait_mgsl_event()
3142 			info->ie1_value &= ~(FLGD|IDLD);  in wait_mgsl_event()
3143 			write_reg(info, IE1, info->ie1_value);  in wait_mgsl_event()
4246 			info->ie1_value &= ~IDLE;  in tx_start()
4247 			info->ie1_value |= UDRN;  in tx_start()
4248 			write_reg(info, IE1, info->ie1_value);  in tx_start()
4283 	info->ie1_value &= ~(UDRN + IDLE);  in tx_stop()
4284 	write_reg(info, IE1, info->ie1_value);	/* disable tx status interrupts */  in tx_stop()
4358 		info->ie1_value = 0;  in reset_port()
4361 		write_reg(info, IE1, info->ie1_value);  in reset_port()
4509 	info->ie1_value = BRKD;  in async_mode()
4510 	write_reg(info, IE1, info->ie1_value);  in async_mode()