Lines Matching refs:info
601 void usc_DisableMasterIrqBit( struct mgsl_struct *info );
602 void usc_EnableMasterIrqBit( struct mgsl_struct *info );
603 void usc_EnableInterrupts( struct mgsl_struct *info, u16 IrqMask );
604 void usc_DisableInterrupts( struct mgsl_struct *info, u16 IrqMask );
605 void usc_ClearIrqPendingBits( struct mgsl_struct *info, u16 IrqMask );
665 static u16 usc_InDmaReg( struct mgsl_struct *info, u16 Port );
666 static void usc_OutDmaReg( struct mgsl_struct *info, u16 Port, u16 Value );
667 static void usc_DmaCmd( struct mgsl_struct *info, u16 Cmd );
669 static u16 usc_InReg( struct mgsl_struct *info, u16 Port );
670 static void usc_OutReg( struct mgsl_struct *info, u16 Port, u16 Value );
671 static void usc_RTCmd( struct mgsl_struct *info, u16 Cmd );
672 void usc_RCmd( struct mgsl_struct *info, u16 Cmd );
673 void usc_TCmd( struct mgsl_struct *info, u16 Cmd );
680 static void usc_process_rxoverrun_sync( struct mgsl_struct *info );
681 static void usc_start_receiver( struct mgsl_struct *info );
682 static void usc_stop_receiver( struct mgsl_struct *info );
684 static void usc_start_transmitter( struct mgsl_struct *info );
685 static void usc_stop_transmitter( struct mgsl_struct *info );
686 static void usc_set_txidle( struct mgsl_struct *info );
687 static void usc_load_txfifo( struct mgsl_struct *info );
689 static void usc_enable_aux_clock( struct mgsl_struct *info, u32 DataRate );
690 static void usc_enable_loopback( struct mgsl_struct *info, int enable );
692 static void usc_get_serial_signals( struct mgsl_struct *info );
693 static void usc_set_serial_signals( struct mgsl_struct *info );
695 static void usc_reset( struct mgsl_struct *info );
697 static void usc_set_sync_mode( struct mgsl_struct *info );
698 static void usc_set_sdlc_mode( struct mgsl_struct *info );
699 static void usc_set_async_mode( struct mgsl_struct *info );
700 static void usc_enable_async_clock( struct mgsl_struct *info, u32 DataRate );
702 static void usc_loopback_frame( struct mgsl_struct *info );
707 static void usc_loopmode_cancel_transmit( struct mgsl_struct * info );
708 static void usc_loopmode_insert_request( struct mgsl_struct * info );
709 static int usc_loopmode_active( struct mgsl_struct * info);
710 static void usc_loopmode_send_done( struct mgsl_struct * info );
712 static int mgsl_ioctl_common(struct mgsl_struct *info, unsigned int cmd, unsigned long arg);
716 static void hdlcdev_tx_done(struct mgsl_struct *info);
717 static void hdlcdev_rx(struct mgsl_struct *info, char *buf, int size);
718 static int hdlcdev_init(struct mgsl_struct *info);
719 static void hdlcdev_exit(struct mgsl_struct *info);
738 static void mgsl_trace_block(struct mgsl_struct *info,const char* data, int count, int xmit);
743 static bool mgsl_register_test( struct mgsl_struct *info );
744 static bool mgsl_irq_test( struct mgsl_struct *info );
745 static bool mgsl_dma_test( struct mgsl_struct *info );
746 static bool mgsl_memory_test( struct mgsl_struct *info );
747 static int mgsl_adapter_test( struct mgsl_struct *info );
752 static int mgsl_claim_resources(struct mgsl_struct *info);
753 static void mgsl_release_resources(struct mgsl_struct *info);
754 static void mgsl_add_device(struct mgsl_struct *info);
760 static void mgsl_free_rx_frame_buffers( struct mgsl_struct *info, unsigned int StartIndex, unsigned…
761 static bool mgsl_get_rx_frame( struct mgsl_struct *info );
762 static bool mgsl_get_raw_rx_frame( struct mgsl_struct *info );
763 static void mgsl_reset_rx_dma_buffers( struct mgsl_struct *info );
764 static void mgsl_reset_tx_dma_buffers( struct mgsl_struct *info );
765 static int num_free_tx_dma_buffers(struct mgsl_struct *info);
766 static void mgsl_load_tx_dma_buffer( struct mgsl_struct *info, const char *Buffer, unsigned int Buf…
772 static int mgsl_allocate_dma_buffers(struct mgsl_struct *info);
773 static void mgsl_free_dma_buffers(struct mgsl_struct *info);
774 static int mgsl_alloc_frame_memory(struct mgsl_struct *info, DMABUFFERENTRY *BufferList,int Buffer…
775 static void mgsl_free_frame_memory(struct mgsl_struct *info, DMABUFFERENTRY *BufferList,int Bufferc…
776 static int mgsl_alloc_buffer_list_memory(struct mgsl_struct *info);
777 static void mgsl_free_buffer_list_memory(struct mgsl_struct *info);
778 static int mgsl_alloc_intermediate_rxbuffer_memory(struct mgsl_struct *info);
779 static void mgsl_free_intermediate_rxbuffer_memory(struct mgsl_struct *info);
780 static int mgsl_alloc_intermediate_txbuffer_memory(struct mgsl_struct *info);
781 static void mgsl_free_intermediate_txbuffer_memory(struct mgsl_struct *info);
782 static bool load_next_tx_holding_buffer(struct mgsl_struct *info);
783 static int save_tx_buffer_request(struct mgsl_struct *info,const char *Buffer, unsigned int BufferS…
789 static void mgsl_bh_receive(struct mgsl_struct *info);
790 static void mgsl_bh_transmit(struct mgsl_struct *info);
791 static void mgsl_bh_status(struct mgsl_struct *info);
796 static void mgsl_isr_null( struct mgsl_struct *info );
797 static void mgsl_isr_transmit_data( struct mgsl_struct *info );
798 static void mgsl_isr_receive_data( struct mgsl_struct *info );
799 static void mgsl_isr_receive_status( struct mgsl_struct *info );
800 static void mgsl_isr_transmit_status( struct mgsl_struct *info );
801 static void mgsl_isr_io_pin( struct mgsl_struct *info );
802 static void mgsl_isr_misc( struct mgsl_struct *info );
803 static void mgsl_isr_receive_dma( struct mgsl_struct *info );
804 static void mgsl_isr_transmit_dma( struct mgsl_struct *info );
825 static int mgsl_get_stats(struct mgsl_struct * info, struct mgsl_icount
827 static int mgsl_get_params(struct mgsl_struct * info, MGSL_PARAMS __user *user_params);
828 static int mgsl_set_params(struct mgsl_struct * info, MGSL_PARAMS __user *new_params);
829 static int mgsl_get_txidle(struct mgsl_struct * info, int __user *idle_mode);
830 static int mgsl_set_txidle(struct mgsl_struct * info, int idle_mode);
831 static int mgsl_txenable(struct mgsl_struct * info, int enable);
832 static int mgsl_txabort(struct mgsl_struct * info);
833 static int mgsl_rxenable(struct mgsl_struct * info, int enable);
834 static int mgsl_wait_event(struct mgsl_struct * info, int __user *mask);
835 static int mgsl_loopmode_send_done( struct mgsl_struct * info );
909 static void mgsl_change_params(struct mgsl_struct *info);
923 static inline int mgsl_paranoia_check(struct mgsl_struct *info, in mgsl_paranoia_check() argument
932 if (!info) { in mgsl_paranoia_check()
936 if (info->magic != MGSL_MAGIC) { in mgsl_paranoia_check()
941 if (!info) in mgsl_paranoia_check()
977 struct mgsl_struct *info = tty->driver_data; in mgsl_stop() local
980 if (mgsl_paranoia_check(info, tty->name, "mgsl_stop")) in mgsl_stop()
984 printk("mgsl_stop(%s)\n",info->device_name); in mgsl_stop()
986 spin_lock_irqsave(&info->irq_spinlock,flags); in mgsl_stop()
987 if (info->tx_enabled) in mgsl_stop()
988 usc_stop_transmitter(info); in mgsl_stop()
989 spin_unlock_irqrestore(&info->irq_spinlock,flags); in mgsl_stop()
1000 struct mgsl_struct *info = tty->driver_data; in mgsl_start() local
1003 if (mgsl_paranoia_check(info, tty->name, "mgsl_start")) in mgsl_start()
1007 printk("mgsl_start(%s)\n",info->device_name); in mgsl_start()
1009 spin_lock_irqsave(&info->irq_spinlock,flags); in mgsl_start()
1010 if (!info->tx_enabled) in mgsl_start()
1011 usc_start_transmitter(info); in mgsl_start()
1012 spin_unlock_irqrestore(&info->irq_spinlock,flags); in mgsl_start()
1023 static int mgsl_bh_action(struct mgsl_struct *info) in mgsl_bh_action() argument
1028 spin_lock_irqsave(&info->irq_spinlock,flags); in mgsl_bh_action()
1030 if (info->pending_bh & BH_RECEIVE) { in mgsl_bh_action()
1031 info->pending_bh &= ~BH_RECEIVE; in mgsl_bh_action()
1033 } else if (info->pending_bh & BH_TRANSMIT) { in mgsl_bh_action()
1034 info->pending_bh &= ~BH_TRANSMIT; in mgsl_bh_action()
1036 } else if (info->pending_bh & BH_STATUS) { in mgsl_bh_action()
1037 info->pending_bh &= ~BH_STATUS; in mgsl_bh_action()
1043 info->bh_running = false; in mgsl_bh_action()
1044 info->bh_requested = false; in mgsl_bh_action()
1047 spin_unlock_irqrestore(&info->irq_spinlock,flags); in mgsl_bh_action()
1057 struct mgsl_struct *info = in mgsl_bh_handler() local
1063 __FILE__,__LINE__,info->device_name); in mgsl_bh_handler()
1065 info->bh_running = true; in mgsl_bh_handler()
1067 while((action = mgsl_bh_action(info)) != 0) { in mgsl_bh_handler()
1077 mgsl_bh_receive(info); in mgsl_bh_handler()
1080 mgsl_bh_transmit(info); in mgsl_bh_handler()
1083 mgsl_bh_status(info); in mgsl_bh_handler()
1094 __FILE__,__LINE__,info->device_name); in mgsl_bh_handler()
1097 static void mgsl_bh_receive(struct mgsl_struct *info) in mgsl_bh_receive() argument
1099 bool (*get_rx_frame)(struct mgsl_struct *info) = in mgsl_bh_receive()
1100 (info->params.mode == MGSL_MODE_HDLC ? mgsl_get_rx_frame : mgsl_get_raw_rx_frame); in mgsl_bh_receive()
1104 __FILE__,__LINE__,info->device_name); in mgsl_bh_receive()
1108 if (info->rx_rcc_underrun) { in mgsl_bh_receive()
1110 spin_lock_irqsave(&info->irq_spinlock,flags); in mgsl_bh_receive()
1111 usc_start_receiver(info); in mgsl_bh_receive()
1112 spin_unlock_irqrestore(&info->irq_spinlock,flags); in mgsl_bh_receive()
1115 } while(get_rx_frame(info)); in mgsl_bh_receive()
1118 static void mgsl_bh_transmit(struct mgsl_struct *info) in mgsl_bh_transmit() argument
1120 struct tty_struct *tty = info->port.tty; in mgsl_bh_transmit()
1125 __FILE__,__LINE__,info->device_name); in mgsl_bh_transmit()
1133 spin_lock_irqsave(&info->irq_spinlock,flags); in mgsl_bh_transmit()
1134 if ( !info->tx_active && info->loopmode_send_done_requested ) in mgsl_bh_transmit()
1135 usc_loopmode_send_done( info ); in mgsl_bh_transmit()
1136 spin_unlock_irqrestore(&info->irq_spinlock,flags); in mgsl_bh_transmit()
1139 static void mgsl_bh_status(struct mgsl_struct *info) in mgsl_bh_status() argument
1143 __FILE__,__LINE__,info->device_name); in mgsl_bh_status()
1145 info->ri_chkcount = 0; in mgsl_bh_status()
1146 info->dsr_chkcount = 0; in mgsl_bh_status()
1147 info->dcd_chkcount = 0; in mgsl_bh_status()
1148 info->cts_chkcount = 0; in mgsl_bh_status()
1160 static void mgsl_isr_receive_status( struct mgsl_struct *info ) in mgsl_isr_receive_status() argument
1162 u16 status = usc_InReg( info, RCSR ); in mgsl_isr_receive_status()
1169 info->loopmode_insert_requested && in mgsl_isr_receive_status()
1170 usc_loopmode_active(info) ) in mgsl_isr_receive_status()
1172 ++info->icount.rxabort; in mgsl_isr_receive_status()
1173 info->loopmode_insert_requested = false; in mgsl_isr_receive_status()
1176 info->cmr_value &= ~BIT13; in mgsl_isr_receive_status()
1177 usc_OutReg(info, CMR, info->cmr_value); in mgsl_isr_receive_status()
1180 usc_OutReg(info, RICR, in mgsl_isr_receive_status()
1181 (usc_InReg(info, RICR) & ~RXSTATUS_ABORT_RECEIVED)); in mgsl_isr_receive_status()
1186 info->icount.exithunt++; in mgsl_isr_receive_status()
1188 info->icount.rxidle++; in mgsl_isr_receive_status()
1189 wake_up_interruptible(&info->event_wait_q); in mgsl_isr_receive_status()
1193 info->icount.rxover++; in mgsl_isr_receive_status()
1194 usc_process_rxoverrun_sync( info ); in mgsl_isr_receive_status()
1197 usc_ClearIrqPendingBits( info, RECEIVE_STATUS ); in mgsl_isr_receive_status()
1198 usc_UnlatchRxstatusBits( info, status ); in mgsl_isr_receive_status()
1212 static void mgsl_isr_transmit_status( struct mgsl_struct *info ) in mgsl_isr_transmit_status() argument
1214 u16 status = usc_InReg( info, TCSR ); in mgsl_isr_transmit_status()
1220 usc_ClearIrqPendingBits( info, TRANSMIT_STATUS ); in mgsl_isr_transmit_status()
1221 usc_UnlatchTxstatusBits( info, status ); in mgsl_isr_transmit_status()
1230 usc_DmaCmd( info, DmaCmd_ResetTxChannel ); in mgsl_isr_transmit_status()
1231 usc_RTCmd( info, RTCmd_PurgeTxFifo ); in mgsl_isr_transmit_status()
1235 info->icount.txok++; in mgsl_isr_transmit_status()
1237 info->icount.txunder++; in mgsl_isr_transmit_status()
1239 info->icount.txabort++; in mgsl_isr_transmit_status()
1241 info->icount.txunder++; in mgsl_isr_transmit_status()
1243 info->tx_active = false; in mgsl_isr_transmit_status()
1244 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0; in mgsl_isr_transmit_status()
1245 del_timer(&info->tx_timer); in mgsl_isr_transmit_status()
1247 if ( info->drop_rts_on_tx_done ) { in mgsl_isr_transmit_status()
1248 usc_get_serial_signals( info ); in mgsl_isr_transmit_status()
1249 if ( info->serial_signals & SerialSignal_RTS ) { in mgsl_isr_transmit_status()
1250 info->serial_signals &= ~SerialSignal_RTS; in mgsl_isr_transmit_status()
1251 usc_set_serial_signals( info ); in mgsl_isr_transmit_status()
1253 info->drop_rts_on_tx_done = false; in mgsl_isr_transmit_status()
1257 if (info->netcount) in mgsl_isr_transmit_status()
1258 hdlcdev_tx_done(info); in mgsl_isr_transmit_status()
1262 if (info->port.tty->stopped || info->port.tty->hw_stopped) { in mgsl_isr_transmit_status()
1263 usc_stop_transmitter(info); in mgsl_isr_transmit_status()
1266 info->pending_bh |= BH_TRANSMIT; in mgsl_isr_transmit_status()
1279 static void mgsl_isr_io_pin( struct mgsl_struct *info ) in mgsl_isr_io_pin() argument
1282 u16 status = usc_InReg( info, MISR ); in mgsl_isr_io_pin()
1288 usc_ClearIrqPendingBits( info, IO_PIN ); in mgsl_isr_io_pin()
1289 usc_UnlatchIostatusBits( info, status ); in mgsl_isr_io_pin()
1293 icount = &info->icount; in mgsl_isr_io_pin()
1296 if ((info->ri_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT) in mgsl_isr_io_pin()
1297 usc_DisablestatusIrqs(info,SICR_RI); in mgsl_isr_io_pin()
1300 info->input_signal_events.ri_up++; in mgsl_isr_io_pin()
1302 info->input_signal_events.ri_down++; in mgsl_isr_io_pin()
1305 if ((info->dsr_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT) in mgsl_isr_io_pin()
1306 usc_DisablestatusIrqs(info,SICR_DSR); in mgsl_isr_io_pin()
1309 info->input_signal_events.dsr_up++; in mgsl_isr_io_pin()
1311 info->input_signal_events.dsr_down++; in mgsl_isr_io_pin()
1314 if ((info->dcd_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT) in mgsl_isr_io_pin()
1315 usc_DisablestatusIrqs(info,SICR_DCD); in mgsl_isr_io_pin()
1318 info->input_signal_events.dcd_up++; in mgsl_isr_io_pin()
1320 info->input_signal_events.dcd_down++; in mgsl_isr_io_pin()
1322 if (info->netcount) { in mgsl_isr_io_pin()
1324 netif_carrier_on(info->netdev); in mgsl_isr_io_pin()
1326 netif_carrier_off(info->netdev); in mgsl_isr_io_pin()
1332 if ((info->cts_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT) in mgsl_isr_io_pin()
1333 usc_DisablestatusIrqs(info,SICR_CTS); in mgsl_isr_io_pin()
1336 info->input_signal_events.cts_up++; in mgsl_isr_io_pin()
1338 info->input_signal_events.cts_down++; in mgsl_isr_io_pin()
1340 wake_up_interruptible(&info->status_event_wait_q); in mgsl_isr_io_pin()
1341 wake_up_interruptible(&info->event_wait_q); in mgsl_isr_io_pin()
1343 if ( (info->port.flags & ASYNC_CHECK_CD) && in mgsl_isr_io_pin()
1346 printk("%s CD now %s...", info->device_name, in mgsl_isr_io_pin()
1349 wake_up_interruptible(&info->port.open_wait); in mgsl_isr_io_pin()
1353 if (info->port.tty) in mgsl_isr_io_pin()
1354 tty_hangup(info->port.tty); in mgsl_isr_io_pin()
1358 if (tty_port_cts_enabled(&info->port) && in mgsl_isr_io_pin()
1360 if (info->port.tty->hw_stopped) { in mgsl_isr_io_pin()
1364 if (info->port.tty) in mgsl_isr_io_pin()
1365 info->port.tty->hw_stopped = 0; in mgsl_isr_io_pin()
1366 usc_start_transmitter(info); in mgsl_isr_io_pin()
1367 info->pending_bh |= BH_TRANSMIT; in mgsl_isr_io_pin()
1374 if (info->port.tty) in mgsl_isr_io_pin()
1375 info->port.tty->hw_stopped = 1; in mgsl_isr_io_pin()
1376 usc_stop_transmitter(info); in mgsl_isr_io_pin()
1382 info->pending_bh |= BH_STATUS; in mgsl_isr_io_pin()
1386 usc_OutReg( info, SICR, in mgsl_isr_io_pin()
1387 (unsigned short)(usc_InReg(info,SICR) & ~(SICR_TXC_ACTIVE+SICR_TXC_INACTIVE)) ); in mgsl_isr_io_pin()
1388 usc_UnlatchIostatusBits( info, MISCSTATUS_TXC_LATCHED ); in mgsl_isr_io_pin()
1389 info->irq_occurred = true; in mgsl_isr_io_pin()
1401 static void mgsl_isr_transmit_data( struct mgsl_struct *info ) in mgsl_isr_transmit_data() argument
1405 __FILE__,__LINE__,info->xmit_cnt); in mgsl_isr_transmit_data()
1407 usc_ClearIrqPendingBits( info, TRANSMIT_DATA ); in mgsl_isr_transmit_data()
1409 if (info->port.tty->stopped || info->port.tty->hw_stopped) { in mgsl_isr_transmit_data()
1410 usc_stop_transmitter(info); in mgsl_isr_transmit_data()
1414 if ( info->xmit_cnt ) in mgsl_isr_transmit_data()
1415 usc_load_txfifo( info ); in mgsl_isr_transmit_data()
1417 info->tx_active = false; in mgsl_isr_transmit_data()
1419 if (info->xmit_cnt < WAKEUP_CHARS) in mgsl_isr_transmit_data()
1420 info->pending_bh |= BH_TRANSMIT; in mgsl_isr_transmit_data()
1433 static void mgsl_isr_receive_data( struct mgsl_struct *info ) in mgsl_isr_receive_data() argument
1439 struct mgsl_icount *icount = &info->icount; in mgsl_isr_receive_data()
1445 usc_ClearIrqPendingBits( info, RECEIVE_DATA ); in mgsl_isr_receive_data()
1448 usc_RCmd( info, RCmd_SelectRicrRxFifostatus ); in mgsl_isr_receive_data()
1452 usc_OutReg( info, RICR+LSBONLY, (u16)(usc_InReg(info, RICR+LSBONLY) & ~BIT3 )); in mgsl_isr_receive_data()
1456 while( (Fifocount = (usc_InReg(info,RICR) >> 8)) ) { in mgsl_isr_receive_data()
1460 outw( (inw(info->io_base + CCAR) & 0x0780) | (RDR+LSBONLY), in mgsl_isr_receive_data()
1461 info->io_base + CCAR ); in mgsl_isr_receive_data()
1462 DataByte = inb( info->io_base + CCAR ); in mgsl_isr_receive_data()
1465 status = usc_InReg(info, RCSR); in mgsl_isr_receive_data()
1468 usc_UnlatchRxstatusBits(info,RXSTATUS_ALL); in mgsl_isr_receive_data()
1487 usc_RTCmd(info,RTCmd_PurgeRxFifo); in mgsl_isr_receive_data()
1492 if (status & info->ignore_status_mask) in mgsl_isr_receive_data()
1495 status &= info->read_status_mask; in mgsl_isr_receive_data()
1499 if (info->port.flags & ASYNC_SAK) in mgsl_isr_receive_data()
1500 do_SAK(info->port.tty); in mgsl_isr_receive_data()
1506 tty_insert_flip_char(&info->port, DataByte, flag); in mgsl_isr_receive_data()
1512 work += tty_insert_flip_char(&info->port, 0, TTY_OVERRUN); in mgsl_isr_receive_data()
1523 tty_flip_buffer_push(&info->port); in mgsl_isr_receive_data()
1533 static void mgsl_isr_misc( struct mgsl_struct *info ) in mgsl_isr_misc() argument
1535 u16 status = usc_InReg( info, MISR ); in mgsl_isr_misc()
1542 (info->params.mode == MGSL_MODE_HDLC)) { in mgsl_isr_misc()
1545 usc_EnableReceiver(info,DISABLE_UNCONDITIONAL); in mgsl_isr_misc()
1546 usc_DmaCmd(info, DmaCmd_ResetRxChannel); in mgsl_isr_misc()
1547 usc_UnlatchRxstatusBits(info, RXSTATUS_ALL); in mgsl_isr_misc()
1548 usc_ClearIrqPendingBits(info, RECEIVE_DATA | RECEIVE_STATUS); in mgsl_isr_misc()
1549 usc_DisableInterrupts(info, RECEIVE_DATA | RECEIVE_STATUS); in mgsl_isr_misc()
1552 info->pending_bh |= BH_RECEIVE; in mgsl_isr_misc()
1553 info->rx_rcc_underrun = true; in mgsl_isr_misc()
1556 usc_ClearIrqPendingBits( info, MISC ); in mgsl_isr_misc()
1557 usc_UnlatchMiscstatusBits( info, status ); in mgsl_isr_misc()
1569 static void mgsl_isr_null( struct mgsl_struct *info ) in mgsl_isr_null() argument
1593 static void mgsl_isr_receive_dma( struct mgsl_struct *info ) in mgsl_isr_receive_dma() argument
1598 usc_OutDmaReg( info, CDIR, BIT9 | BIT1 ); in mgsl_isr_receive_dma()
1602 status = usc_InDmaReg( info, RDMR ); in mgsl_isr_receive_dma()
1606 __FILE__,__LINE__,info->device_name,status); in mgsl_isr_receive_dma()
1608 info->pending_bh |= BH_RECEIVE; in mgsl_isr_receive_dma()
1611 info->rx_overflow = true; in mgsl_isr_receive_dma()
1612 info->icount.buf_overrun++; in mgsl_isr_receive_dma()
1637 static void mgsl_isr_transmit_dma( struct mgsl_struct *info ) in mgsl_isr_transmit_dma() argument
1642 usc_OutDmaReg(info, CDIR, BIT8 | BIT0 ); in mgsl_isr_transmit_dma()
1647 status = usc_InDmaReg( info, TDMR ); in mgsl_isr_transmit_dma()
1651 __FILE__,__LINE__,info->device_name,status); in mgsl_isr_transmit_dma()
1654 --info->tx_dma_buffers_used; in mgsl_isr_transmit_dma()
1659 if ( load_next_tx_holding_buffer(info) ) { in mgsl_isr_transmit_dma()
1663 info->pending_bh |= BH_TRANSMIT; in mgsl_isr_transmit_dma()
1682 struct mgsl_struct *info = dev_id; in mgsl_interrupt() local
1688 __FILE__, __LINE__, info->irq_level); in mgsl_interrupt()
1690 spin_lock(&info->irq_spinlock); in mgsl_interrupt()
1694 UscVector = usc_InReg(info, IVR) >> 9; in mgsl_interrupt()
1695 DmaVector = usc_InDmaReg(info, DIVR); in mgsl_interrupt()
1699 __FILE__,__LINE__,info->device_name,UscVector,DmaVector); in mgsl_interrupt()
1706 (*UscIsrTable[UscVector])(info); in mgsl_interrupt()
1708 mgsl_isr_transmit_dma(info); in mgsl_interrupt()
1710 mgsl_isr_receive_dma(info); in mgsl_interrupt()
1712 if ( info->isr_overflow ) { in mgsl_interrupt()
1714 __FILE__, __LINE__, info->device_name, info->irq_level); in mgsl_interrupt()
1715 usc_DisableMasterIrqBit(info); in mgsl_interrupt()
1716 usc_DisableDmaInterrupts(info,DICR_MASTER); in mgsl_interrupt()
1725 if ( info->pending_bh && !info->bh_running && !info->bh_requested ) { in mgsl_interrupt()
1728 __FILE__,__LINE__,info->device_name); in mgsl_interrupt()
1729 schedule_work(&info->task); in mgsl_interrupt()
1730 info->bh_requested = true; in mgsl_interrupt()
1733 spin_unlock(&info->irq_spinlock); in mgsl_interrupt()
1737 __FILE__, __LINE__, info->irq_level); in mgsl_interrupt()
1749 static int startup(struct mgsl_struct * info) in startup() argument
1754 printk("%s(%d):mgsl_startup(%s)\n",__FILE__,__LINE__,info->device_name); in startup()
1756 if (info->port.flags & ASYNC_INITIALIZED) in startup()
1759 if (!info->xmit_buf) { in startup()
1761 info->xmit_buf = (unsigned char *)get_zeroed_page(GFP_KERNEL); in startup()
1762 if (!info->xmit_buf) { in startup()
1764 __FILE__,__LINE__,info->device_name); in startup()
1769 info->pending_bh = 0; in startup()
1771 memset(&info->icount, 0, sizeof(info->icount)); in startup()
1773 setup_timer(&info->tx_timer, mgsl_tx_timeout, (unsigned long)info); in startup()
1776 retval = mgsl_claim_resources(info); in startup()
1780 retval = mgsl_adapter_test(info); in startup()
1783 if (capable(CAP_SYS_ADMIN) && info->port.tty) in startup()
1784 set_bit(TTY_IO_ERROR, &info->port.tty->flags); in startup()
1785 mgsl_release_resources(info); in startup()
1790 mgsl_change_params(info); in startup()
1792 if (info->port.tty) in startup()
1793 clear_bit(TTY_IO_ERROR, &info->port.tty->flags); in startup()
1795 info->port.flags |= ASYNC_INITIALIZED; in startup()
1808 static void shutdown(struct mgsl_struct * info) in shutdown() argument
1812 if (!(info->port.flags & ASYNC_INITIALIZED)) in shutdown()
1817 __FILE__,__LINE__, info->device_name ); in shutdown()
1821 wake_up_interruptible(&info->status_event_wait_q); in shutdown()
1822 wake_up_interruptible(&info->event_wait_q); in shutdown()
1824 del_timer_sync(&info->tx_timer); in shutdown()
1826 if (info->xmit_buf) { in shutdown()
1827 free_page((unsigned long) info->xmit_buf); in shutdown()
1828 info->xmit_buf = NULL; in shutdown()
1831 spin_lock_irqsave(&info->irq_spinlock,flags); in shutdown()
1832 usc_DisableMasterIrqBit(info); in shutdown()
1833 usc_stop_receiver(info); in shutdown()
1834 usc_stop_transmitter(info); in shutdown()
1835 usc_DisableInterrupts(info,RECEIVE_DATA | RECEIVE_STATUS | in shutdown()
1837 usc_DisableDmaInterrupts(info,DICR_MASTER + DICR_TRANSMIT + DICR_RECEIVE); in shutdown()
1842 usc_OutReg(info, PCR, (u16)((usc_InReg(info, PCR) | BIT15) | BIT14)); in shutdown()
1847 usc_OutReg(info, PCR, (u16)((usc_InReg(info, PCR) | BIT13) | BIT12)); in shutdown()
1849 if (!info->port.tty || info->port.tty->termios.c_cflag & HUPCL) { in shutdown()
1850 info->serial_signals &= ~(SerialSignal_RTS | SerialSignal_DTR); in shutdown()
1851 usc_set_serial_signals(info); in shutdown()
1854 spin_unlock_irqrestore(&info->irq_spinlock,flags); in shutdown()
1856 mgsl_release_resources(info); in shutdown()
1858 if (info->port.tty) in shutdown()
1859 set_bit(TTY_IO_ERROR, &info->port.tty->flags); in shutdown()
1861 info->port.flags &= ~ASYNC_INITIALIZED; in shutdown()
1865 static void mgsl_program_hw(struct mgsl_struct *info) in mgsl_program_hw() argument
1869 spin_lock_irqsave(&info->irq_spinlock,flags); in mgsl_program_hw()
1871 usc_stop_receiver(info); in mgsl_program_hw()
1872 usc_stop_transmitter(info); in mgsl_program_hw()
1873 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0; in mgsl_program_hw()
1875 if (info->params.mode == MGSL_MODE_HDLC || in mgsl_program_hw()
1876 info->params.mode == MGSL_MODE_RAW || in mgsl_program_hw()
1877 info->netcount) in mgsl_program_hw()
1878 usc_set_sync_mode(info); in mgsl_program_hw()
1880 usc_set_async_mode(info); in mgsl_program_hw()
1882 usc_set_serial_signals(info); in mgsl_program_hw()
1884 info->dcd_chkcount = 0; in mgsl_program_hw()
1885 info->cts_chkcount = 0; in mgsl_program_hw()
1886 info->ri_chkcount = 0; in mgsl_program_hw()
1887 info->dsr_chkcount = 0; in mgsl_program_hw()
1889 usc_EnableStatusIrqs(info,SICR_CTS+SICR_DSR+SICR_DCD+SICR_RI); in mgsl_program_hw()
1890 usc_EnableInterrupts(info, IO_PIN); in mgsl_program_hw()
1891 usc_get_serial_signals(info); in mgsl_program_hw()
1893 if (info->netcount || info->port.tty->termios.c_cflag & CREAD) in mgsl_program_hw()
1894 usc_start_receiver(info); in mgsl_program_hw()
1896 spin_unlock_irqrestore(&info->irq_spinlock,flags); in mgsl_program_hw()
1901 static void mgsl_change_params(struct mgsl_struct *info) in mgsl_change_params() argument
1906 if (!info->port.tty) in mgsl_change_params()
1911 __FILE__,__LINE__, info->device_name ); in mgsl_change_params()
1913 cflag = info->port.tty->termios.c_cflag; in mgsl_change_params()
1918 info->serial_signals |= SerialSignal_RTS | SerialSignal_DTR; in mgsl_change_params()
1920 info->serial_signals &= ~(SerialSignal_RTS | SerialSignal_DTR); in mgsl_change_params()
1925 case CS5: info->params.data_bits = 5; break; in mgsl_change_params()
1926 case CS6: info->params.data_bits = 6; break; in mgsl_change_params()
1927 case CS7: info->params.data_bits = 7; break; in mgsl_change_params()
1928 case CS8: info->params.data_bits = 8; break; in mgsl_change_params()
1930 default: info->params.data_bits = 7; break; in mgsl_change_params()
1934 info->params.stop_bits = 2; in mgsl_change_params()
1936 info->params.stop_bits = 1; in mgsl_change_params()
1938 info->params.parity = ASYNC_PARITY_NONE; in mgsl_change_params()
1941 info->params.parity = ASYNC_PARITY_ODD; in mgsl_change_params()
1943 info->params.parity = ASYNC_PARITY_EVEN; in mgsl_change_params()
1946 info->params.parity = ASYNC_PARITY_SPACE; in mgsl_change_params()
1953 bits_per_char = info->params.data_bits + in mgsl_change_params()
1954 info->params.stop_bits + 1; in mgsl_change_params()
1960 if (info->params.data_rate <= 460800) in mgsl_change_params()
1961 info->params.data_rate = tty_get_baud_rate(info->port.tty); in mgsl_change_params()
1963 if ( info->params.data_rate ) { in mgsl_change_params()
1964 info->timeout = (32*HZ*bits_per_char) / in mgsl_change_params()
1965 info->params.data_rate; in mgsl_change_params()
1967 info->timeout += HZ/50; /* Add .02 seconds of slop */ in mgsl_change_params()
1970 info->port.flags |= ASYNC_CTS_FLOW; in mgsl_change_params()
1972 info->port.flags &= ~ASYNC_CTS_FLOW; in mgsl_change_params()
1975 info->port.flags &= ~ASYNC_CHECK_CD; in mgsl_change_params()
1977 info->port.flags |= ASYNC_CHECK_CD; in mgsl_change_params()
1981 info->read_status_mask = RXSTATUS_OVERRUN; in mgsl_change_params()
1982 if (I_INPCK(info->port.tty)) in mgsl_change_params()
1983 info->read_status_mask |= RXSTATUS_PARITY_ERROR | RXSTATUS_FRAMING_ERROR; in mgsl_change_params()
1984 if (I_BRKINT(info->port.tty) || I_PARMRK(info->port.tty)) in mgsl_change_params()
1985 info->read_status_mask |= RXSTATUS_BREAK_RECEIVED; in mgsl_change_params()
1987 if (I_IGNPAR(info->port.tty)) in mgsl_change_params()
1988 info->ignore_status_mask |= RXSTATUS_PARITY_ERROR | RXSTATUS_FRAMING_ERROR; in mgsl_change_params()
1989 if (I_IGNBRK(info->port.tty)) { in mgsl_change_params()
1990 info->ignore_status_mask |= RXSTATUS_BREAK_RECEIVED; in mgsl_change_params()
1994 if (I_IGNPAR(info->port.tty)) in mgsl_change_params()
1995 info->ignore_status_mask |= RXSTATUS_OVERRUN; in mgsl_change_params()
1998 mgsl_program_hw(info); in mgsl_change_params()
2013 struct mgsl_struct *info = tty->driver_data; in mgsl_put_char() local
2019 __FILE__, __LINE__, ch, info->device_name); in mgsl_put_char()
2022 if (mgsl_paranoia_check(info, tty->name, "mgsl_put_char")) in mgsl_put_char()
2025 if (!info->xmit_buf) in mgsl_put_char()
2028 spin_lock_irqsave(&info->irq_spinlock, flags); in mgsl_put_char()
2030 if ((info->params.mode == MGSL_MODE_ASYNC ) || !info->tx_active) { in mgsl_put_char()
2031 if (info->xmit_cnt < SERIAL_XMIT_SIZE - 1) { in mgsl_put_char()
2032 info->xmit_buf[info->xmit_head++] = ch; in mgsl_put_char()
2033 info->xmit_head &= SERIAL_XMIT_SIZE-1; in mgsl_put_char()
2034 info->xmit_cnt++; in mgsl_put_char()
2038 spin_unlock_irqrestore(&info->irq_spinlock, flags); in mgsl_put_char()
2053 struct mgsl_struct *info = tty->driver_data; in mgsl_flush_chars() local
2058 __FILE__,__LINE__,info->device_name,info->xmit_cnt); in mgsl_flush_chars()
2060 if (mgsl_paranoia_check(info, tty->name, "mgsl_flush_chars")) in mgsl_flush_chars()
2063 if (info->xmit_cnt <= 0 || tty->stopped || tty->hw_stopped || in mgsl_flush_chars()
2064 !info->xmit_buf) in mgsl_flush_chars()
2069 __FILE__,__LINE__,info->device_name ); in mgsl_flush_chars()
2071 spin_lock_irqsave(&info->irq_spinlock,flags); in mgsl_flush_chars()
2073 if (!info->tx_active) { in mgsl_flush_chars()
2074 if ( (info->params.mode == MGSL_MODE_HDLC || in mgsl_flush_chars()
2075 info->params.mode == MGSL_MODE_RAW) && info->xmit_cnt ) { in mgsl_flush_chars()
2079 mgsl_load_tx_dma_buffer(info, in mgsl_flush_chars()
2080 info->xmit_buf,info->xmit_cnt); in mgsl_flush_chars()
2082 usc_start_transmitter(info); in mgsl_flush_chars()
2085 spin_unlock_irqrestore(&info->irq_spinlock,flags); in mgsl_flush_chars()
2105 struct mgsl_struct *info = tty->driver_data; in mgsl_write() local
2110 __FILE__,__LINE__,info->device_name,count); in mgsl_write()
2112 if (mgsl_paranoia_check(info, tty->name, "mgsl_write")) in mgsl_write()
2115 if (!info->xmit_buf) in mgsl_write()
2118 if ( info->params.mode == MGSL_MODE_HDLC || in mgsl_write()
2119 info->params.mode == MGSL_MODE_RAW ) { in mgsl_write()
2121 if (info->tx_active) { in mgsl_write()
2123 if ( info->params.mode == MGSL_MODE_HDLC ) { in mgsl_write()
2132 if (info->tx_holding_count >= info->num_tx_holding_buffers ) { in mgsl_write()
2140 save_tx_buffer_request(info,buf,count); in mgsl_write()
2145 spin_lock_irqsave(&info->irq_spinlock,flags); in mgsl_write()
2146 load_next_tx_holding_buffer(info); in mgsl_write()
2147 spin_unlock_irqrestore(&info->irq_spinlock,flags); in mgsl_write()
2155 if ( (info->params.flags & HDLC_FLAG_HDLC_LOOPMODE) && in mgsl_write()
2156 !usc_loopmode_active(info) ) in mgsl_write()
2162 if ( info->xmit_cnt ) { in mgsl_write()
2169 mgsl_load_tx_dma_buffer(info, in mgsl_write()
2170 info->xmit_buf,info->xmit_cnt); in mgsl_write()
2173 __FILE__,__LINE__,info->device_name); in mgsl_write()
2177 __FILE__,__LINE__,info->device_name); in mgsl_write()
2179 info->xmit_cnt = count; in mgsl_write()
2180 mgsl_load_tx_dma_buffer(info,buf,count); in mgsl_write()
2184 spin_lock_irqsave(&info->irq_spinlock,flags); in mgsl_write()
2186 min(SERIAL_XMIT_SIZE - info->xmit_cnt - 1, in mgsl_write()
2187 SERIAL_XMIT_SIZE - info->xmit_head)); in mgsl_write()
2189 spin_unlock_irqrestore(&info->irq_spinlock,flags); in mgsl_write()
2192 memcpy(info->xmit_buf + info->xmit_head, buf, c); in mgsl_write()
2193 info->xmit_head = ((info->xmit_head + c) & in mgsl_write()
2195 info->xmit_cnt += c; in mgsl_write()
2196 spin_unlock_irqrestore(&info->irq_spinlock,flags); in mgsl_write()
2203 if (info->xmit_cnt && !tty->stopped && !tty->hw_stopped) { in mgsl_write()
2204 spin_lock_irqsave(&info->irq_spinlock,flags); in mgsl_write()
2205 if (!info->tx_active) in mgsl_write()
2206 usc_start_transmitter(info); in mgsl_write()
2207 spin_unlock_irqrestore(&info->irq_spinlock,flags); in mgsl_write()
2212 __FILE__,__LINE__,info->device_name,ret); in mgsl_write()
2227 struct mgsl_struct *info = tty->driver_data; in mgsl_write_room() local
2230 if (mgsl_paranoia_check(info, tty->name, "mgsl_write_room")) in mgsl_write_room()
2232 ret = SERIAL_XMIT_SIZE - info->xmit_cnt - 1; in mgsl_write_room()
2238 __FILE__,__LINE__, info->device_name,ret ); in mgsl_write_room()
2240 if ( info->params.mode == MGSL_MODE_HDLC || in mgsl_write_room()
2241 info->params.mode == MGSL_MODE_RAW ) { in mgsl_write_room()
2243 if ( info->tx_active ) in mgsl_write_room()
2262 struct mgsl_struct *info = tty->driver_data; in mgsl_chars_in_buffer() local
2266 __FILE__,__LINE__, info->device_name ); in mgsl_chars_in_buffer()
2268 if (mgsl_paranoia_check(info, tty->name, "mgsl_chars_in_buffer")) in mgsl_chars_in_buffer()
2273 __FILE__,__LINE__, info->device_name,info->xmit_cnt ); in mgsl_chars_in_buffer()
2275 if ( info->params.mode == MGSL_MODE_HDLC || in mgsl_chars_in_buffer()
2276 info->params.mode == MGSL_MODE_RAW ) { in mgsl_chars_in_buffer()
2278 if ( info->tx_active ) in mgsl_chars_in_buffer()
2279 return info->max_frame_size; in mgsl_chars_in_buffer()
2284 return info->xmit_cnt; in mgsl_chars_in_buffer()
2296 struct mgsl_struct *info = tty->driver_data; in mgsl_flush_buffer() local
2301 __FILE__,__LINE__, info->device_name ); in mgsl_flush_buffer()
2303 if (mgsl_paranoia_check(info, tty->name, "mgsl_flush_buffer")) in mgsl_flush_buffer()
2306 spin_lock_irqsave(&info->irq_spinlock,flags); in mgsl_flush_buffer()
2307 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0; in mgsl_flush_buffer()
2308 del_timer(&info->tx_timer); in mgsl_flush_buffer()
2309 spin_unlock_irqrestore(&info->irq_spinlock,flags); in mgsl_flush_buffer()
2324 struct mgsl_struct *info = tty->driver_data; in mgsl_send_xchar() local
2329 __FILE__,__LINE__, info->device_name, ch ); in mgsl_send_xchar()
2331 if (mgsl_paranoia_check(info, tty->name, "mgsl_send_xchar")) in mgsl_send_xchar()
2334 info->x_char = ch; in mgsl_send_xchar()
2337 spin_lock_irqsave(&info->irq_spinlock,flags); in mgsl_send_xchar()
2338 if (!info->tx_enabled) in mgsl_send_xchar()
2339 usc_start_transmitter(info); in mgsl_send_xchar()
2340 spin_unlock_irqrestore(&info->irq_spinlock,flags); in mgsl_send_xchar()
2353 struct mgsl_struct *info = tty->driver_data; in mgsl_throttle() local
2358 __FILE__,__LINE__, info->device_name ); in mgsl_throttle()
2360 if (mgsl_paranoia_check(info, tty->name, "mgsl_throttle")) in mgsl_throttle()
2367 spin_lock_irqsave(&info->irq_spinlock,flags); in mgsl_throttle()
2368 info->serial_signals &= ~SerialSignal_RTS; in mgsl_throttle()
2369 usc_set_serial_signals(info); in mgsl_throttle()
2370 spin_unlock_irqrestore(&info->irq_spinlock,flags); in mgsl_throttle()
2383 struct mgsl_struct *info = tty->driver_data; in mgsl_unthrottle() local
2388 __FILE__,__LINE__, info->device_name ); in mgsl_unthrottle()
2390 if (mgsl_paranoia_check(info, tty->name, "mgsl_unthrottle")) in mgsl_unthrottle()
2394 if (info->x_char) in mgsl_unthrottle()
2395 info->x_char = 0; in mgsl_unthrottle()
2401 spin_lock_irqsave(&info->irq_spinlock,flags); in mgsl_unthrottle()
2402 info->serial_signals |= SerialSignal_RTS; in mgsl_unthrottle()
2403 usc_set_serial_signals(info); in mgsl_unthrottle()
2404 spin_unlock_irqrestore(&info->irq_spinlock,flags); in mgsl_unthrottle()
2418 static int mgsl_get_stats(struct mgsl_struct * info, struct mgsl_icount __user *user_icount) in mgsl_get_stats() argument
2424 __FILE__,__LINE__, info->device_name); in mgsl_get_stats()
2427 memset(&info->icount, 0, sizeof(info->icount)); in mgsl_get_stats()
2429 mutex_lock(&info->port.mutex); in mgsl_get_stats()
2430 COPY_TO_USER(err, user_icount, &info->icount, sizeof(struct mgsl_icount)); in mgsl_get_stats()
2431 mutex_unlock(&info->port.mutex); in mgsl_get_stats()
2449 static int mgsl_get_params(struct mgsl_struct * info, MGSL_PARAMS __user *user_params) in mgsl_get_params() argument
2454 __FILE__,__LINE__, info->device_name); in mgsl_get_params()
2456 mutex_lock(&info->port.mutex); in mgsl_get_params()
2457 COPY_TO_USER(err,user_params, &info->params, sizeof(MGSL_PARAMS)); in mgsl_get_params()
2458 mutex_unlock(&info->port.mutex); in mgsl_get_params()
2462 __FILE__,__LINE__,info->device_name); in mgsl_get_params()
2481 static int mgsl_set_params(struct mgsl_struct * info, MGSL_PARAMS __user *new_params) in mgsl_set_params() argument
2489 info->device_name ); in mgsl_set_params()
2494 __FILE__,__LINE__,info->device_name); in mgsl_set_params()
2498 mutex_lock(&info->port.mutex); in mgsl_set_params()
2499 spin_lock_irqsave(&info->irq_spinlock,flags); in mgsl_set_params()
2500 memcpy(&info->params,&tmp_params,sizeof(MGSL_PARAMS)); in mgsl_set_params()
2501 spin_unlock_irqrestore(&info->irq_spinlock,flags); in mgsl_set_params()
2503 mgsl_change_params(info); in mgsl_set_params()
2504 mutex_unlock(&info->port.mutex); in mgsl_set_params()
2519 static int mgsl_get_txidle(struct mgsl_struct * info, int __user *idle_mode) in mgsl_get_txidle() argument
2525 __FILE__,__LINE__, info->device_name, info->idle_mode); in mgsl_get_txidle()
2527 COPY_TO_USER(err,idle_mode, &info->idle_mode, sizeof(int)); in mgsl_get_txidle()
2531 __FILE__,__LINE__,info->device_name); in mgsl_get_txidle()
2546 static int mgsl_set_txidle(struct mgsl_struct * info, int idle_mode) in mgsl_set_txidle() argument
2552 info->device_name, idle_mode ); in mgsl_set_txidle()
2554 spin_lock_irqsave(&info->irq_spinlock,flags); in mgsl_set_txidle()
2555 info->idle_mode = idle_mode; in mgsl_set_txidle()
2556 usc_set_txidle( info ); in mgsl_set_txidle()
2557 spin_unlock_irqrestore(&info->irq_spinlock,flags); in mgsl_set_txidle()
2573 static int mgsl_txenable(struct mgsl_struct * info, int enable) in mgsl_txenable() argument
2579 info->device_name, enable); in mgsl_txenable()
2581 spin_lock_irqsave(&info->irq_spinlock,flags); in mgsl_txenable()
2583 if ( !info->tx_enabled ) { in mgsl_txenable()
2585 usc_start_transmitter(info); in mgsl_txenable()
2593 if ( info->params.flags & HDLC_FLAG_HDLC_LOOPMODE ) in mgsl_txenable()
2594 usc_loopmode_insert_request( info ); in mgsl_txenable()
2597 if ( info->tx_enabled ) in mgsl_txenable()
2598 usc_stop_transmitter(info); in mgsl_txenable()
2600 spin_unlock_irqrestore(&info->irq_spinlock,flags); in mgsl_txenable()
2610 static int mgsl_txabort(struct mgsl_struct * info) in mgsl_txabort() argument
2616 info->device_name); in mgsl_txabort()
2618 spin_lock_irqsave(&info->irq_spinlock,flags); in mgsl_txabort()
2619 if ( info->tx_active && info->params.mode == MGSL_MODE_HDLC ) in mgsl_txabort()
2621 if ( info->params.flags & HDLC_FLAG_HDLC_LOOPMODE ) in mgsl_txabort()
2622 usc_loopmode_cancel_transmit( info ); in mgsl_txabort()
2624 usc_TCmd(info,TCmd_SendAbort); in mgsl_txabort()
2626 spin_unlock_irqrestore(&info->irq_spinlock,flags); in mgsl_txabort()
2637 static int mgsl_rxenable(struct mgsl_struct * info, int enable) in mgsl_rxenable() argument
2643 info->device_name, enable); in mgsl_rxenable()
2645 spin_lock_irqsave(&info->irq_spinlock,flags); in mgsl_rxenable()
2647 if ( !info->rx_enabled ) in mgsl_rxenable()
2648 usc_start_receiver(info); in mgsl_rxenable()
2650 if ( info->rx_enabled ) in mgsl_rxenable()
2651 usc_stop_receiver(info); in mgsl_rxenable()
2653 spin_unlock_irqrestore(&info->irq_spinlock,flags); in mgsl_rxenable()
2666 static int mgsl_wait_event(struct mgsl_struct * info, int __user * mask_ptr) in mgsl_wait_event() argument
2684 info->device_name, mask); in mgsl_wait_event()
2686 spin_lock_irqsave(&info->irq_spinlock,flags); in mgsl_wait_event()
2689 usc_get_serial_signals(info); in mgsl_wait_event()
2690 s = info->serial_signals; in mgsl_wait_event()
2697 spin_unlock_irqrestore(&info->irq_spinlock,flags); in mgsl_wait_event()
2702 cprev = info->icount; in mgsl_wait_event()
2703 oldsigs = info->input_signal_events; in mgsl_wait_event()
2707 u16 oldreg = usc_InReg(info,RICR); in mgsl_wait_event()
2712 usc_OutReg(info, RICR, newreg); in mgsl_wait_event()
2716 add_wait_queue(&info->event_wait_q, &wait); in mgsl_wait_event()
2718 spin_unlock_irqrestore(&info->irq_spinlock,flags); in mgsl_wait_event()
2729 spin_lock_irqsave(&info->irq_spinlock,flags); in mgsl_wait_event()
2730 cnow = info->icount; in mgsl_wait_event()
2731 newsigs = info->input_signal_events; in mgsl_wait_event()
2733 spin_unlock_irqrestore(&info->irq_spinlock,flags); in mgsl_wait_event()
2768 remove_wait_queue(&info->event_wait_q, &wait); in mgsl_wait_event()
2772 spin_lock_irqsave(&info->irq_spinlock,flags); in mgsl_wait_event()
2773 if (!waitqueue_active(&info->event_wait_q)) { in mgsl_wait_event()
2775 usc_OutReg(info, RICR, usc_InReg(info,RICR) & in mgsl_wait_event()
2778 spin_unlock_irqrestore(&info->irq_spinlock,flags); in mgsl_wait_event()
2788 static int modem_input_wait(struct mgsl_struct *info,int arg) in modem_input_wait() argument
2796 spin_lock_irqsave(&info->irq_spinlock,flags); in modem_input_wait()
2797 cprev = info->icount; in modem_input_wait()
2798 add_wait_queue(&info->status_event_wait_q, &wait); in modem_input_wait()
2800 spin_unlock_irqrestore(&info->irq_spinlock,flags); in modem_input_wait()
2810 spin_lock_irqsave(&info->irq_spinlock,flags); in modem_input_wait()
2811 cnow = info->icount; in modem_input_wait()
2813 spin_unlock_irqrestore(&info->irq_spinlock,flags); in modem_input_wait()
2833 remove_wait_queue(&info->status_event_wait_q, &wait); in modem_input_wait()
2842 struct mgsl_struct *info = tty->driver_data; in tiocmget() local
2846 spin_lock_irqsave(&info->irq_spinlock,flags); in tiocmget()
2847 usc_get_serial_signals(info); in tiocmget()
2848 spin_unlock_irqrestore(&info->irq_spinlock,flags); in tiocmget()
2850 result = ((info->serial_signals & SerialSignal_RTS) ? TIOCM_RTS:0) + in tiocmget()
2851 ((info->serial_signals & SerialSignal_DTR) ? TIOCM_DTR:0) + in tiocmget()
2852 ((info->serial_signals & SerialSignal_DCD) ? TIOCM_CAR:0) + in tiocmget()
2853 ((info->serial_signals & SerialSignal_RI) ? TIOCM_RNG:0) + in tiocmget()
2854 ((info->serial_signals & SerialSignal_DSR) ? TIOCM_DSR:0) + in tiocmget()
2855 ((info->serial_signals & SerialSignal_CTS) ? TIOCM_CTS:0); in tiocmget()
2859 __FILE__,__LINE__, info->device_name, result ); in tiocmget()
2868 struct mgsl_struct *info = tty->driver_data; in tiocmset() local
2873 __FILE__,__LINE__,info->device_name, set, clear); in tiocmset()
2876 info->serial_signals |= SerialSignal_RTS; in tiocmset()
2878 info->serial_signals |= SerialSignal_DTR; in tiocmset()
2880 info->serial_signals &= ~SerialSignal_RTS; in tiocmset()
2882 info->serial_signals &= ~SerialSignal_DTR; in tiocmset()
2884 spin_lock_irqsave(&info->irq_spinlock,flags); in tiocmset()
2885 usc_set_serial_signals(info); in tiocmset()
2886 spin_unlock_irqrestore(&info->irq_spinlock,flags); in tiocmset()
2899 struct mgsl_struct * info = tty->driver_data; in mgsl_break() local
2904 __FILE__,__LINE__, info->device_name, break_state); in mgsl_break()
2906 if (mgsl_paranoia_check(info, tty->name, "mgsl_break")) in mgsl_break()
2909 spin_lock_irqsave(&info->irq_spinlock,flags); in mgsl_break()
2911 usc_OutReg(info,IOCR,(u16)(usc_InReg(info,IOCR) | BIT7)); in mgsl_break()
2913 usc_OutReg(info,IOCR,(u16)(usc_InReg(info,IOCR) & ~BIT7)); in mgsl_break()
2914 spin_unlock_irqrestore(&info->irq_spinlock,flags); in mgsl_break()
2929 struct mgsl_struct * info = tty->driver_data; in msgl_get_icount() local
2933 spin_lock_irqsave(&info->irq_spinlock,flags); in msgl_get_icount()
2934 cnow = info->icount; in msgl_get_icount()
2935 spin_unlock_irqrestore(&info->irq_spinlock,flags); in msgl_get_icount()
2964 struct mgsl_struct * info = tty->driver_data; in mgsl_ioctl() local
2968 info->device_name, cmd ); in mgsl_ioctl()
2970 if (mgsl_paranoia_check(info, tty->name, "mgsl_ioctl")) in mgsl_ioctl()
2979 return mgsl_ioctl_common(info, cmd, arg); in mgsl_ioctl()
2982 static int mgsl_ioctl_common(struct mgsl_struct *info, unsigned int cmd, unsigned long arg) in mgsl_ioctl_common() argument
2988 return mgsl_get_params(info, argp); in mgsl_ioctl_common()
2990 return mgsl_set_params(info, argp); in mgsl_ioctl_common()
2992 return mgsl_get_txidle(info, argp); in mgsl_ioctl_common()
2994 return mgsl_set_txidle(info,(int)arg); in mgsl_ioctl_common()
2996 return mgsl_txenable(info,(int)arg); in mgsl_ioctl_common()
2998 return mgsl_rxenable(info,(int)arg); in mgsl_ioctl_common()
3000 return mgsl_txabort(info); in mgsl_ioctl_common()
3002 return mgsl_get_stats(info, argp); in mgsl_ioctl_common()
3004 return mgsl_wait_event(info, argp); in mgsl_ioctl_common()
3006 return mgsl_loopmode_send_done(info); in mgsl_ioctl_common()
3011 return modem_input_wait(info,(int)arg); in mgsl_ioctl_common()
3032 struct mgsl_struct *info = tty->driver_data; in mgsl_set_termios() local
3039 mgsl_change_params(info); in mgsl_set_termios()
3044 info->serial_signals &= ~(SerialSignal_RTS | SerialSignal_DTR); in mgsl_set_termios()
3045 spin_lock_irqsave(&info->irq_spinlock,flags); in mgsl_set_termios()
3046 usc_set_serial_signals(info); in mgsl_set_termios()
3047 spin_unlock_irqrestore(&info->irq_spinlock,flags); in mgsl_set_termios()
3053 info->serial_signals |= SerialSignal_DTR; in mgsl_set_termios()
3056 info->serial_signals |= SerialSignal_RTS; in mgsl_set_termios()
3058 spin_lock_irqsave(&info->irq_spinlock,flags); in mgsl_set_termios()
3059 usc_set_serial_signals(info); in mgsl_set_termios()
3060 spin_unlock_irqrestore(&info->irq_spinlock,flags); in mgsl_set_termios()
3086 struct mgsl_struct * info = tty->driver_data; in mgsl_close() local
3088 if (mgsl_paranoia_check(info, tty->name, "mgsl_close")) in mgsl_close()
3093 __FILE__,__LINE__, info->device_name, info->port.count); in mgsl_close()
3095 if (tty_port_close_start(&info->port, tty, filp) == 0) in mgsl_close()
3098 mutex_lock(&info->port.mutex); in mgsl_close()
3099 if (info->port.flags & ASYNC_INITIALIZED) in mgsl_close()
3100 mgsl_wait_until_sent(tty, info->timeout); in mgsl_close()
3103 shutdown(info); in mgsl_close()
3104 mutex_unlock(&info->port.mutex); in mgsl_close()
3106 tty_port_close_end(&info->port, tty); in mgsl_close()
3107 info->port.tty = NULL; in mgsl_close()
3111 tty->driver->name, info->port.count); in mgsl_close()
3128 struct mgsl_struct * info = tty->driver_data; in mgsl_wait_until_sent() local
3131 if (!info ) in mgsl_wait_until_sent()
3136 __FILE__,__LINE__, info->device_name ); in mgsl_wait_until_sent()
3138 if (mgsl_paranoia_check(info, tty->name, "mgsl_wait_until_sent")) in mgsl_wait_until_sent()
3141 if (!(info->port.flags & ASYNC_INITIALIZED)) in mgsl_wait_until_sent()
3152 if ( info->params.data_rate ) { in mgsl_wait_until_sent()
3153 char_time = info->timeout/(32 * 5); in mgsl_wait_until_sent()
3162 if ( info->params.mode == MGSL_MODE_HDLC || in mgsl_wait_until_sent()
3163 info->params.mode == MGSL_MODE_RAW ) { in mgsl_wait_until_sent()
3164 while (info->tx_active) { in mgsl_wait_until_sent()
3172 while (!(usc_InReg(info,TCSR) & TXSTATUS_ALL_SENT) && in mgsl_wait_until_sent()
3173 info->tx_enabled) { in mgsl_wait_until_sent()
3185 __FILE__,__LINE__, info->device_name ); in mgsl_wait_until_sent()
3199 struct mgsl_struct * info = tty->driver_data; in mgsl_hangup() local
3203 __FILE__,__LINE__, info->device_name ); in mgsl_hangup()
3205 if (mgsl_paranoia_check(info, tty->name, "mgsl_hangup")) in mgsl_hangup()
3209 shutdown(info); in mgsl_hangup()
3211 info->port.count = 0; in mgsl_hangup()
3212 info->port.flags &= ~ASYNC_NORMAL_ACTIVE; in mgsl_hangup()
3213 info->port.tty = NULL; in mgsl_hangup()
3215 wake_up_interruptible(&info->port.open_wait); in mgsl_hangup()
3228 struct mgsl_struct *info = container_of(port, struct mgsl_struct, port); in carrier_raised() local
3230 spin_lock_irqsave(&info->irq_spinlock, flags); in carrier_raised()
3231 usc_get_serial_signals(info); in carrier_raised()
3232 spin_unlock_irqrestore(&info->irq_spinlock, flags); in carrier_raised()
3233 return (info->serial_signals & SerialSignal_DCD) ? 1 : 0; in carrier_raised()
3238 struct mgsl_struct *info = container_of(port, struct mgsl_struct, port); in dtr_rts() local
3241 spin_lock_irqsave(&info->irq_spinlock,flags); in dtr_rts()
3243 info->serial_signals |= SerialSignal_RTS | SerialSignal_DTR; in dtr_rts()
3245 info->serial_signals &= ~(SerialSignal_RTS | SerialSignal_DTR); in dtr_rts()
3246 usc_set_serial_signals(info); in dtr_rts()
3247 spin_unlock_irqrestore(&info->irq_spinlock,flags); in dtr_rts()
3265 struct mgsl_struct *info) in block_til_ready() argument
3272 struct tty_port *port = &info->port; in block_til_ready()
3301 spin_lock_irqsave(&info->irq_spinlock, flags); in block_til_ready()
3303 spin_unlock_irqrestore(&info->irq_spinlock, flags); in block_til_ready()
3318 dcd = tty_port_carrier_raised(&info->port); in block_til_ready()
3358 struct mgsl_struct *info; in mgsl_install() local
3369 info = mgsl_device_list; in mgsl_install()
3370 while (info && info->line != line) in mgsl_install()
3371 info = info->next_device; in mgsl_install()
3372 if (mgsl_paranoia_check(info, tty->name, "mgsl_open")) in mgsl_install()
3374 tty->driver_data = info; in mgsl_install()
3376 return tty_port_install(&info->port, driver, tty); in mgsl_install()
3391 struct mgsl_struct *info = tty->driver_data; in mgsl_open() local
3395 info->port.tty = tty; in mgsl_open()
3399 __FILE__,__LINE__,tty->driver->name, info->port.count); in mgsl_open()
3402 if (info->port.flags & ASYNC_CLOSING){ in mgsl_open()
3403 wait_event_interruptible_tty(tty, info->port.close_wait, in mgsl_open()
3404 !(info->port.flags & ASYNC_CLOSING)); in mgsl_open()
3405 retval = ((info->port.flags & ASYNC_HUP_NOTIFY) ? in mgsl_open()
3410 info->port.low_latency = (info->port.flags & ASYNC_LOW_LATENCY) ? 1 : 0; in mgsl_open()
3412 spin_lock_irqsave(&info->netlock, flags); in mgsl_open()
3413 if (info->netcount) { in mgsl_open()
3415 spin_unlock_irqrestore(&info->netlock, flags); in mgsl_open()
3418 info->port.count++; in mgsl_open()
3419 spin_unlock_irqrestore(&info->netlock, flags); in mgsl_open()
3421 if (info->port.count == 1) { in mgsl_open()
3423 retval = startup(info); in mgsl_open()
3428 retval = block_til_ready(tty, filp, info); in mgsl_open()
3432 __FILE__,__LINE__, info->device_name, retval); in mgsl_open()
3438 __FILE__,__LINE__, info->device_name); in mgsl_open()
3444 info->port.tty = NULL; /* tty layer will release tty struct */ in mgsl_open()
3445 if(info->port.count) in mgsl_open()
3446 info->port.count--; in mgsl_open()
3457 static inline void line_info(struct seq_file *m, struct mgsl_struct *info) in line_info() argument
3462 if (info->bus_type == MGSL_BUS_TYPE_PCI) { in line_info()
3464 info->device_name, info->io_base, info->irq_level, in line_info()
3465 info->phys_memory_base, info->phys_lcr_base); in line_info()
3468 info->device_name, info->io_base, in line_info()
3469 info->irq_level, info->dma_level); in line_info()
3473 spin_lock_irqsave(&info->irq_spinlock,flags); in line_info()
3474 usc_get_serial_signals(info); in line_info()
3475 spin_unlock_irqrestore(&info->irq_spinlock,flags); in line_info()
3479 if (info->serial_signals & SerialSignal_RTS) in line_info()
3481 if (info->serial_signals & SerialSignal_CTS) in line_info()
3483 if (info->serial_signals & SerialSignal_DTR) in line_info()
3485 if (info->serial_signals & SerialSignal_DSR) in line_info()
3487 if (info->serial_signals & SerialSignal_DCD) in line_info()
3489 if (info->serial_signals & SerialSignal_RI) in line_info()
3492 if (info->params.mode == MGSL_MODE_HDLC || in line_info()
3493 info->params.mode == MGSL_MODE_RAW ) { in line_info()
3495 info->icount.txok, info->icount.rxok); in line_info()
3496 if (info->icount.txunder) in line_info()
3497 seq_printf(m, " txunder:%d", info->icount.txunder); in line_info()
3498 if (info->icount.txabort) in line_info()
3499 seq_printf(m, " txabort:%d", info->icount.txabort); in line_info()
3500 if (info->icount.rxshort) in line_info()
3501 seq_printf(m, " rxshort:%d", info->icount.rxshort); in line_info()
3502 if (info->icount.rxlong) in line_info()
3503 seq_printf(m, " rxlong:%d", info->icount.rxlong); in line_info()
3504 if (info->icount.rxover) in line_info()
3505 seq_printf(m, " rxover:%d", info->icount.rxover); in line_info()
3506 if (info->icount.rxcrc) in line_info()
3507 seq_printf(m, " rxcrc:%d", info->icount.rxcrc); in line_info()
3510 info->icount.tx, info->icount.rx); in line_info()
3511 if (info->icount.frame) in line_info()
3512 seq_printf(m, " fe:%d", info->icount.frame); in line_info()
3513 if (info->icount.parity) in line_info()
3514 seq_printf(m, " pe:%d", info->icount.parity); in line_info()
3515 if (info->icount.brk) in line_info()
3516 seq_printf(m, " brk:%d", info->icount.brk); in line_info()
3517 if (info->icount.overrun) in line_info()
3518 seq_printf(m, " oe:%d", info->icount.overrun); in line_info()
3525 info->tx_active,info->bh_requested,info->bh_running, in line_info()
3526 info->pending_bh); in line_info()
3528 spin_lock_irqsave(&info->irq_spinlock,flags); in line_info()
3530 u16 Tcsr = usc_InReg( info, TCSR ); in line_info()
3531 u16 Tdmr = usc_InDmaReg( info, TDMR ); in line_info()
3532 u16 Ticr = usc_InReg( info, TICR ); in line_info()
3533 u16 Rscr = usc_InReg( info, RCSR ); in line_info()
3534 u16 Rdmr = usc_InDmaReg( info, RDMR ); in line_info()
3535 u16 Ricr = usc_InReg( info, RICR ); in line_info()
3536 u16 Icr = usc_InReg( info, ICR ); in line_info()
3537 u16 Dccr = usc_InReg( info, DCCR ); in line_info()
3538 u16 Tmr = usc_InReg( info, TMR ); in line_info()
3539 u16 Tccr = usc_InReg( info, TCCR ); in line_info()
3540 u16 Ccar = inw( info->io_base + CCAR ); in line_info()
3545 spin_unlock_irqrestore(&info->irq_spinlock,flags); in line_info()
3551 struct mgsl_struct *info; in mgsl_proc_show() local
3555 info = mgsl_device_list; in mgsl_proc_show()
3556 while( info ) { in mgsl_proc_show()
3557 line_info(m, info); in mgsl_proc_show()
3558 info = info->next_device; in mgsl_proc_show()
3584 static int mgsl_allocate_dma_buffers(struct mgsl_struct *info) in mgsl_allocate_dma_buffers() argument
3588 info->last_mem_alloc = 0; in mgsl_allocate_dma_buffers()
3595 BuffersPerFrame = (unsigned short)(info->max_frame_size/DMABUFFERSIZE); in mgsl_allocate_dma_buffers()
3596 if ( info->max_frame_size % DMABUFFERSIZE ) in mgsl_allocate_dma_buffers()
3599 if ( info->bus_type == MGSL_BUS_TYPE_PCI ) { in mgsl_allocate_dma_buffers()
3622 info->tx_buffer_count = info->num_tx_dma_buffers * BuffersPerFrame; in mgsl_allocate_dma_buffers()
3623 info->rx_buffer_count = 62 - info->tx_buffer_count; in mgsl_allocate_dma_buffers()
3635 info->tx_buffer_count = info->num_tx_dma_buffers * BuffersPerFrame; in mgsl_allocate_dma_buffers()
3636 info->rx_buffer_count = (BuffersPerFrame * MAXRXFRAMES) + 6; in mgsl_allocate_dma_buffers()
3643 if ( (info->tx_buffer_count + info->rx_buffer_count) > 62 ) in mgsl_allocate_dma_buffers()
3644 info->rx_buffer_count = 62 - info->tx_buffer_count; in mgsl_allocate_dma_buffers()
3650 __FILE__,__LINE__, info->tx_buffer_count,info->rx_buffer_count); in mgsl_allocate_dma_buffers()
3652 if ( mgsl_alloc_buffer_list_memory( info ) < 0 || in mgsl_allocate_dma_buffers()
3653 mgsl_alloc_frame_memory(info, info->rx_buffer_list, info->rx_buffer_count) < 0 || in mgsl_allocate_dma_buffers()
3654 mgsl_alloc_frame_memory(info, info->tx_buffer_list, info->tx_buffer_count) < 0 || in mgsl_allocate_dma_buffers()
3655 mgsl_alloc_intermediate_rxbuffer_memory(info) < 0 || in mgsl_allocate_dma_buffers()
3656 mgsl_alloc_intermediate_txbuffer_memory(info) < 0 ) { in mgsl_allocate_dma_buffers()
3661 mgsl_reset_rx_dma_buffers( info ); in mgsl_allocate_dma_buffers()
3662 mgsl_reset_tx_dma_buffers( info ); in mgsl_allocate_dma_buffers()
3691 static int mgsl_alloc_buffer_list_memory( struct mgsl_struct *info ) in mgsl_alloc_buffer_list_memory() argument
3695 if ( info->bus_type == MGSL_BUS_TYPE_PCI ) { in mgsl_alloc_buffer_list_memory()
3697 info->buffer_list = info->memory_base + info->last_mem_alloc; in mgsl_alloc_buffer_list_memory()
3698 info->buffer_list_phys = info->last_mem_alloc; in mgsl_alloc_buffer_list_memory()
3699 info->last_mem_alloc += BUFFERLISTSIZE; in mgsl_alloc_buffer_list_memory()
3707 …info->buffer_list = dma_alloc_coherent(NULL, BUFFERLISTSIZE, &info->buffer_list_dma_addr, GFP_KERN… in mgsl_alloc_buffer_list_memory()
3708 if (info->buffer_list == NULL) in mgsl_alloc_buffer_list_memory()
3710 info->buffer_list_phys = (u32)(info->buffer_list_dma_addr); in mgsl_alloc_buffer_list_memory()
3715 memset( info->buffer_list, 0, BUFFERLISTSIZE ); in mgsl_alloc_buffer_list_memory()
3720 info->rx_buffer_list = (DMABUFFERENTRY *)info->buffer_list; in mgsl_alloc_buffer_list_memory()
3721 info->tx_buffer_list = (DMABUFFERENTRY *)info->buffer_list; in mgsl_alloc_buffer_list_memory()
3722 info->tx_buffer_list += info->rx_buffer_count; in mgsl_alloc_buffer_list_memory()
3733 for ( i = 0; i < info->rx_buffer_count; i++ ) { in mgsl_alloc_buffer_list_memory()
3735 info->rx_buffer_list[i].phys_entry = in mgsl_alloc_buffer_list_memory()
3736 info->buffer_list_phys + (i * sizeof(DMABUFFERENTRY)); in mgsl_alloc_buffer_list_memory()
3741 info->rx_buffer_list[i].link = info->buffer_list_phys; in mgsl_alloc_buffer_list_memory()
3743 if ( i < info->rx_buffer_count - 1 ) in mgsl_alloc_buffer_list_memory()
3744 info->rx_buffer_list[i].link += (i + 1) * sizeof(DMABUFFERENTRY); in mgsl_alloc_buffer_list_memory()
3747 for ( i = 0; i < info->tx_buffer_count; i++ ) { in mgsl_alloc_buffer_list_memory()
3749 info->tx_buffer_list[i].phys_entry = info->buffer_list_phys + in mgsl_alloc_buffer_list_memory()
3750 ((info->rx_buffer_count + i) * sizeof(DMABUFFERENTRY)); in mgsl_alloc_buffer_list_memory()
3755 info->tx_buffer_list[i].link = info->buffer_list_phys + in mgsl_alloc_buffer_list_memory()
3756 info->rx_buffer_count * sizeof(DMABUFFERENTRY); in mgsl_alloc_buffer_list_memory()
3758 if ( i < info->tx_buffer_count - 1 ) in mgsl_alloc_buffer_list_memory()
3759 info->tx_buffer_list[i].link += (i + 1) * sizeof(DMABUFFERENTRY); in mgsl_alloc_buffer_list_memory()
3775 static void mgsl_free_buffer_list_memory( struct mgsl_struct *info ) in mgsl_free_buffer_list_memory() argument
3777 if (info->buffer_list && info->bus_type != MGSL_BUS_TYPE_PCI) in mgsl_free_buffer_list_memory()
3778 dma_free_coherent(NULL, BUFFERLISTSIZE, info->buffer_list, info->buffer_list_dma_addr); in mgsl_free_buffer_list_memory()
3780 info->buffer_list = NULL; in mgsl_free_buffer_list_memory()
3781 info->rx_buffer_list = NULL; in mgsl_free_buffer_list_memory()
3782 info->tx_buffer_list = NULL; in mgsl_free_buffer_list_memory()
3802 static int mgsl_alloc_frame_memory(struct mgsl_struct *info,DMABUFFERENTRY *BufferList,int Bufferco… in mgsl_alloc_frame_memory() argument
3810 if ( info->bus_type == MGSL_BUS_TYPE_PCI ) { in mgsl_alloc_frame_memory()
3812 BufferList[i].virt_addr = info->memory_base + info->last_mem_alloc; in mgsl_alloc_frame_memory()
3813 phys_addr = info->last_mem_alloc; in mgsl_alloc_frame_memory()
3814 info->last_mem_alloc += DMABUFFERSIZE; in mgsl_alloc_frame_memory()
3843 static void mgsl_free_frame_memory(struct mgsl_struct *info, DMABUFFERENTRY *BufferList, int Buffer… in mgsl_free_frame_memory() argument
3850 if ( info->bus_type != MGSL_BUS_TYPE_PCI ) in mgsl_free_frame_memory()
3866 static void mgsl_free_dma_buffers( struct mgsl_struct *info ) in mgsl_free_dma_buffers() argument
3868 mgsl_free_frame_memory( info, info->rx_buffer_list, info->rx_buffer_count ); in mgsl_free_dma_buffers()
3869 mgsl_free_frame_memory( info, info->tx_buffer_list, info->tx_buffer_count ); in mgsl_free_dma_buffers()
3870 mgsl_free_buffer_list_memory( info ); in mgsl_free_dma_buffers()
3887 static int mgsl_alloc_intermediate_rxbuffer_memory(struct mgsl_struct *info) in mgsl_alloc_intermediate_rxbuffer_memory() argument
3889 info->intermediate_rxbuffer = kmalloc(info->max_frame_size, GFP_KERNEL | GFP_DMA); in mgsl_alloc_intermediate_rxbuffer_memory()
3890 if ( info->intermediate_rxbuffer == NULL ) in mgsl_alloc_intermediate_rxbuffer_memory()
3893 info->flag_buf = kzalloc(info->max_frame_size, GFP_KERNEL); in mgsl_alloc_intermediate_rxbuffer_memory()
3894 if (!info->flag_buf) { in mgsl_alloc_intermediate_rxbuffer_memory()
3895 kfree(info->intermediate_rxbuffer); in mgsl_alloc_intermediate_rxbuffer_memory()
3896 info->intermediate_rxbuffer = NULL; in mgsl_alloc_intermediate_rxbuffer_memory()
3913 static void mgsl_free_intermediate_rxbuffer_memory(struct mgsl_struct *info) in mgsl_free_intermediate_rxbuffer_memory() argument
3915 kfree(info->intermediate_rxbuffer); in mgsl_free_intermediate_rxbuffer_memory()
3916 info->intermediate_rxbuffer = NULL; in mgsl_free_intermediate_rxbuffer_memory()
3917 kfree(info->flag_buf); in mgsl_free_intermediate_rxbuffer_memory()
3918 info->flag_buf = NULL; in mgsl_free_intermediate_rxbuffer_memory()
3935 static int mgsl_alloc_intermediate_txbuffer_memory(struct mgsl_struct *info) in mgsl_alloc_intermediate_txbuffer_memory() argument
3941 info->device_name, __FILE__,__LINE__,info->num_tx_holding_buffers); in mgsl_alloc_intermediate_txbuffer_memory()
3943 memset(info->tx_holding_buffers,0,sizeof(info->tx_holding_buffers)); in mgsl_alloc_intermediate_txbuffer_memory()
3945 for ( i=0; i<info->num_tx_holding_buffers; ++i) { in mgsl_alloc_intermediate_txbuffer_memory()
3946 info->tx_holding_buffers[i].buffer = in mgsl_alloc_intermediate_txbuffer_memory()
3947 kmalloc(info->max_frame_size, GFP_KERNEL); in mgsl_alloc_intermediate_txbuffer_memory()
3948 if (info->tx_holding_buffers[i].buffer == NULL) { in mgsl_alloc_intermediate_txbuffer_memory()
3950 kfree(info->tx_holding_buffers[i].buffer); in mgsl_alloc_intermediate_txbuffer_memory()
3951 info->tx_holding_buffers[i].buffer = NULL; in mgsl_alloc_intermediate_txbuffer_memory()
3971 static void mgsl_free_intermediate_txbuffer_memory(struct mgsl_struct *info) in mgsl_free_intermediate_txbuffer_memory() argument
3975 for ( i=0; i<info->num_tx_holding_buffers; ++i ) { in mgsl_free_intermediate_txbuffer_memory()
3976 kfree(info->tx_holding_buffers[i].buffer); in mgsl_free_intermediate_txbuffer_memory()
3977 info->tx_holding_buffers[i].buffer = NULL; in mgsl_free_intermediate_txbuffer_memory()
3980 info->get_tx_holding_index = 0; in mgsl_free_intermediate_txbuffer_memory()
3981 info->put_tx_holding_index = 0; in mgsl_free_intermediate_txbuffer_memory()
3982 info->tx_holding_count = 0; in mgsl_free_intermediate_txbuffer_memory()
4001 static bool load_next_tx_holding_buffer(struct mgsl_struct *info) in load_next_tx_holding_buffer() argument
4005 if ( info->tx_holding_count ) { in load_next_tx_holding_buffer()
4010 &info->tx_holding_buffers[info->get_tx_holding_index]; in load_next_tx_holding_buffer()
4011 int num_free = num_free_tx_dma_buffers(info); in load_next_tx_holding_buffer()
4017 info->xmit_cnt = ptx->buffer_size; in load_next_tx_holding_buffer()
4018 mgsl_load_tx_dma_buffer(info,ptx->buffer,ptx->buffer_size); in load_next_tx_holding_buffer()
4020 --info->tx_holding_count; in load_next_tx_holding_buffer()
4021 if ( ++info->get_tx_holding_index >= info->num_tx_holding_buffers) in load_next_tx_holding_buffer()
4022 info->get_tx_holding_index=0; in load_next_tx_holding_buffer()
4025 mod_timer(&info->tx_timer, jiffies + msecs_to_jiffies(5000)); in load_next_tx_holding_buffer()
4047 static int save_tx_buffer_request(struct mgsl_struct *info,const char *Buffer, unsigned int BufferS… in save_tx_buffer_request() argument
4051 if ( info->tx_holding_count >= info->num_tx_holding_buffers ) { in save_tx_buffer_request()
4055 ptx = &info->tx_holding_buffers[info->put_tx_holding_index]; in save_tx_buffer_request()
4059 ++info->tx_holding_count; in save_tx_buffer_request()
4060 if ( ++info->put_tx_holding_index >= info->num_tx_holding_buffers) in save_tx_buffer_request()
4061 info->put_tx_holding_index=0; in save_tx_buffer_request()
4066 static int mgsl_claim_resources(struct mgsl_struct *info) in mgsl_claim_resources() argument
4068 if (request_region(info->io_base,info->io_addr_size,"synclink") == NULL) { in mgsl_claim_resources()
4070 __FILE__,__LINE__,info->device_name, info->io_base); in mgsl_claim_resources()
4073 info->io_addr_requested = true; in mgsl_claim_resources()
4075 if ( request_irq(info->irq_level,mgsl_interrupt,info->irq_flags, in mgsl_claim_resources()
4076 info->device_name, info ) < 0 ) { in mgsl_claim_resources()
4078 __FILE__,__LINE__,info->device_name, info->irq_level ); in mgsl_claim_resources()
4081 info->irq_requested = true; in mgsl_claim_resources()
4083 if ( info->bus_type == MGSL_BUS_TYPE_PCI ) { in mgsl_claim_resources()
4084 if (request_mem_region(info->phys_memory_base,0x40000,"synclink") == NULL) { in mgsl_claim_resources()
4086 __FILE__,__LINE__,info->device_name, info->phys_memory_base); in mgsl_claim_resources()
4089 info->shared_mem_requested = true; in mgsl_claim_resources()
4090 if (request_mem_region(info->phys_lcr_base + info->lcr_offset,128,"synclink") == NULL) { in mgsl_claim_resources()
4092 __FILE__,__LINE__,info->device_name, info->phys_lcr_base + info->lcr_offset); in mgsl_claim_resources()
4095 info->lcr_mem_requested = true; in mgsl_claim_resources()
4097 info->memory_base = ioremap_nocache(info->phys_memory_base, in mgsl_claim_resources()
4099 if (!info->memory_base) { in mgsl_claim_resources()
4101 __FILE__,__LINE__,info->device_name, info->phys_memory_base ); in mgsl_claim_resources()
4105 if ( !mgsl_memory_test(info) ) { in mgsl_claim_resources()
4107 __FILE__,__LINE__,info->device_name, info->phys_memory_base ); in mgsl_claim_resources()
4111 info->lcr_base = ioremap_nocache(info->phys_lcr_base, in mgsl_claim_resources()
4113 if (!info->lcr_base) { in mgsl_claim_resources()
4115 __FILE__,__LINE__,info->device_name, info->phys_lcr_base ); in mgsl_claim_resources()
4118 info->lcr_base += info->lcr_offset; in mgsl_claim_resources()
4123 if (request_dma(info->dma_level,info->device_name) < 0){ in mgsl_claim_resources()
4125 __FILE__,__LINE__,info->device_name, info->dma_level ); in mgsl_claim_resources()
4126 mgsl_release_resources( info ); in mgsl_claim_resources()
4129 info->dma_requested = true; in mgsl_claim_resources()
4132 set_dma_mode(info->dma_level,DMA_MODE_CASCADE); in mgsl_claim_resources()
4133 enable_dma(info->dma_level); in mgsl_claim_resources()
4136 if ( mgsl_allocate_dma_buffers(info) < 0 ) { in mgsl_claim_resources()
4138 __FILE__,__LINE__,info->device_name, info->dma_level ); in mgsl_claim_resources()
4144 mgsl_release_resources(info); in mgsl_claim_resources()
4149 static void mgsl_release_resources(struct mgsl_struct *info) in mgsl_release_resources() argument
4153 __FILE__,__LINE__,info->device_name ); in mgsl_release_resources()
4155 if ( info->irq_requested ) { in mgsl_release_resources()
4156 free_irq(info->irq_level, info); in mgsl_release_resources()
4157 info->irq_requested = false; in mgsl_release_resources()
4159 if ( info->dma_requested ) { in mgsl_release_resources()
4160 disable_dma(info->dma_level); in mgsl_release_resources()
4161 free_dma(info->dma_level); in mgsl_release_resources()
4162 info->dma_requested = false; in mgsl_release_resources()
4164 mgsl_free_dma_buffers(info); in mgsl_release_resources()
4165 mgsl_free_intermediate_rxbuffer_memory(info); in mgsl_release_resources()
4166 mgsl_free_intermediate_txbuffer_memory(info); in mgsl_release_resources()
4168 if ( info->io_addr_requested ) { in mgsl_release_resources()
4169 release_region(info->io_base,info->io_addr_size); in mgsl_release_resources()
4170 info->io_addr_requested = false; in mgsl_release_resources()
4172 if ( info->shared_mem_requested ) { in mgsl_release_resources()
4173 release_mem_region(info->phys_memory_base,0x40000); in mgsl_release_resources()
4174 info->shared_mem_requested = false; in mgsl_release_resources()
4176 if ( info->lcr_mem_requested ) { in mgsl_release_resources()
4177 release_mem_region(info->phys_lcr_base + info->lcr_offset,128); in mgsl_release_resources()
4178 info->lcr_mem_requested = false; in mgsl_release_resources()
4180 if (info->memory_base){ in mgsl_release_resources()
4181 iounmap(info->memory_base); in mgsl_release_resources()
4182 info->memory_base = NULL; in mgsl_release_resources()
4184 if (info->lcr_base){ in mgsl_release_resources()
4185 iounmap(info->lcr_base - info->lcr_offset); in mgsl_release_resources()
4186 info->lcr_base = NULL; in mgsl_release_resources()
4191 __FILE__,__LINE__,info->device_name ); in mgsl_release_resources()
4203 static void mgsl_add_device( struct mgsl_struct *info ) in mgsl_add_device() argument
4205 info->next_device = NULL; in mgsl_add_device()
4206 info->line = mgsl_device_count; in mgsl_add_device()
4207 sprintf(info->device_name,"ttySL%d",info->line); in mgsl_add_device()
4209 if (info->line < MAX_TOTAL_DEVICES) { in mgsl_add_device()
4210 if (maxframe[info->line]) in mgsl_add_device()
4211 info->max_frame_size = maxframe[info->line]; in mgsl_add_device()
4213 if (txdmabufs[info->line]) { in mgsl_add_device()
4214 info->num_tx_dma_buffers = txdmabufs[info->line]; in mgsl_add_device()
4215 if (info->num_tx_dma_buffers < 1) in mgsl_add_device()
4216 info->num_tx_dma_buffers = 1; in mgsl_add_device()
4219 if (txholdbufs[info->line]) { in mgsl_add_device()
4220 info->num_tx_holding_buffers = txholdbufs[info->line]; in mgsl_add_device()
4221 if (info->num_tx_holding_buffers < 1) in mgsl_add_device()
4222 info->num_tx_holding_buffers = 1; in mgsl_add_device()
4223 else if (info->num_tx_holding_buffers > MAX_TX_HOLDING_BUFFERS) in mgsl_add_device()
4224 info->num_tx_holding_buffers = MAX_TX_HOLDING_BUFFERS; in mgsl_add_device()
4231 mgsl_device_list = info; in mgsl_add_device()
4236 current_dev->next_device = info; in mgsl_add_device()
4239 if ( info->max_frame_size < 4096 ) in mgsl_add_device()
4240 info->max_frame_size = 4096; in mgsl_add_device()
4241 else if ( info->max_frame_size > 65535 ) in mgsl_add_device()
4242 info->max_frame_size = 65535; in mgsl_add_device()
4244 if ( info->bus_type == MGSL_BUS_TYPE_PCI ) { in mgsl_add_device()
4246 info->hw_version + 1, info->device_name, info->io_base, info->irq_level, in mgsl_add_device()
4247 info->phys_memory_base, info->phys_lcr_base, in mgsl_add_device()
4248 info->max_frame_size ); in mgsl_add_device()
4251 info->device_name, info->io_base, info->irq_level, info->dma_level, in mgsl_add_device()
4252 info->max_frame_size ); in mgsl_add_device()
4256 hdlcdev_init(info); in mgsl_add_device()
4276 struct mgsl_struct *info; in mgsl_allocate_device() local
4278 info = kzalloc(sizeof(struct mgsl_struct), in mgsl_allocate_device()
4281 if (!info) { in mgsl_allocate_device()
4284 tty_port_init(&info->port); in mgsl_allocate_device()
4285 info->port.ops = &mgsl_port_ops; in mgsl_allocate_device()
4286 info->magic = MGSL_MAGIC; in mgsl_allocate_device()
4287 INIT_WORK(&info->task, mgsl_bh_handler); in mgsl_allocate_device()
4288 info->max_frame_size = 4096; in mgsl_allocate_device()
4289 info->port.close_delay = 5*HZ/10; in mgsl_allocate_device()
4290 info->port.closing_wait = 30*HZ; in mgsl_allocate_device()
4291 init_waitqueue_head(&info->status_event_wait_q); in mgsl_allocate_device()
4292 init_waitqueue_head(&info->event_wait_q); in mgsl_allocate_device()
4293 spin_lock_init(&info->irq_spinlock); in mgsl_allocate_device()
4294 spin_lock_init(&info->netlock); in mgsl_allocate_device()
4295 memcpy(&info->params,&default_params,sizeof(MGSL_PARAMS)); in mgsl_allocate_device()
4296 info->idle_mode = HDLC_TXIDLE_FLAGS; in mgsl_allocate_device()
4297 info->num_tx_dma_buffers = 1; in mgsl_allocate_device()
4298 info->num_tx_holding_buffers = 0; in mgsl_allocate_device()
4301 return info; in mgsl_allocate_device()
4373 struct mgsl_struct *info; in mgsl_enum_isa_devices() local
4383 info = mgsl_allocate_device(); in mgsl_enum_isa_devices()
4384 if ( !info ) { in mgsl_enum_isa_devices()
4392 info->io_base = (unsigned int)io[i]; in mgsl_enum_isa_devices()
4393 info->irq_level = (unsigned int)irq[i]; in mgsl_enum_isa_devices()
4394 info->irq_level = irq_canonicalize(info->irq_level); in mgsl_enum_isa_devices()
4395 info->dma_level = (unsigned int)dma[i]; in mgsl_enum_isa_devices()
4396 info->bus_type = MGSL_BUS_TYPE_ISA; in mgsl_enum_isa_devices()
4397 info->io_addr_size = 16; in mgsl_enum_isa_devices()
4398 info->irq_flags = 0; in mgsl_enum_isa_devices()
4400 mgsl_add_device( info ); in mgsl_enum_isa_devices()
4407 struct mgsl_struct *info; in synclink_cleanup() local
4419 info = mgsl_device_list; in synclink_cleanup()
4420 while(info) { in synclink_cleanup()
4422 hdlcdev_exit(info); in synclink_cleanup()
4424 mgsl_release_resources(info); in synclink_cleanup()
4425 tmp = info; in synclink_cleanup()
4426 info = info->next_device; in synclink_cleanup()
4491 static void usc_RTCmd( struct mgsl_struct *info, u16 Cmd ) in usc_RTCmd() argument
4496 outw( Cmd + info->loopback_bits, info->io_base + CCAR ); in usc_RTCmd()
4499 if ( info->bus_type == MGSL_BUS_TYPE_PCI ) in usc_RTCmd()
4500 inw( info->io_base + CCAR ); in usc_RTCmd()
4518 static void usc_DmaCmd( struct mgsl_struct *info, u16 Cmd ) in usc_DmaCmd() argument
4521 outw( Cmd + info->mbre_bit, info->io_base ); in usc_DmaCmd()
4524 if ( info->bus_type == MGSL_BUS_TYPE_PCI ) in usc_DmaCmd()
4525 inw( info->io_base ); in usc_DmaCmd()
4545 static void usc_OutDmaReg( struct mgsl_struct *info, u16 RegAddr, u16 RegValue ) in usc_OutDmaReg() argument
4550 outw( RegAddr + info->mbre_bit, info->io_base ); in usc_OutDmaReg()
4551 outw( RegValue, info->io_base ); in usc_OutDmaReg()
4554 if ( info->bus_type == MGSL_BUS_TYPE_PCI ) in usc_OutDmaReg()
4555 inw( info->io_base ); in usc_OutDmaReg()
4574 static u16 usc_InDmaReg( struct mgsl_struct *info, u16 RegAddr ) in usc_InDmaReg() argument
4579 outw( RegAddr + info->mbre_bit, info->io_base ); in usc_InDmaReg()
4580 return inw( info->io_base ); in usc_InDmaReg()
4601 static void usc_OutReg( struct mgsl_struct *info, u16 RegAddr, u16 RegValue ) in usc_OutReg() argument
4603 outw( RegAddr + info->loopback_bits, info->io_base + CCAR ); in usc_OutReg()
4604 outw( RegValue, info->io_base + CCAR ); in usc_OutReg()
4607 if ( info->bus_type == MGSL_BUS_TYPE_PCI ) in usc_OutReg()
4608 inw( info->io_base + CCAR ); in usc_OutReg()
4626 static u16 usc_InReg( struct mgsl_struct *info, u16 RegAddr ) in usc_InReg() argument
4628 outw( RegAddr + info->loopback_bits, info->io_base + CCAR ); in usc_InReg()
4629 return inw( info->io_base + CCAR ); in usc_InReg()
4640 static void usc_set_sdlc_mode( struct mgsl_struct *info ) in usc_set_sdlc_mode() argument
4654 usc_OutReg(info,TMCR,0x1f); in usc_set_sdlc_mode()
4655 RegValue=usc_InReg(info,TMDR); in usc_set_sdlc_mode()
4658 if ( info->params.flags & HDLC_FLAG_HDLC_LOOPMODE ) in usc_set_sdlc_mode()
4692 if (info->params.mode == MGSL_MODE_RAW) { in usc_set_sdlc_mode()
4695 usc_OutReg( info, IOCR, /* Set IOCR DCD is RxSync Detect Input */ in usc_set_sdlc_mode()
4696 (unsigned short)((usc_InReg(info, IOCR) & ~(BIT13|BIT12)) | BIT12)); in usc_set_sdlc_mode()
4716 if ( info->params.flags & HDLC_FLAG_UNDERRUN_ABORT15 ) in usc_set_sdlc_mode()
4718 else if ( info->params.flags & HDLC_FLAG_UNDERRUN_FLAG ) in usc_set_sdlc_mode()
4720 else if ( info->params.flags & HDLC_FLAG_UNDERRUN_CRC ) in usc_set_sdlc_mode()
4724 if ( info->params.preamble != HDLC_PREAMBLE_PATTERN_NONE ) in usc_set_sdlc_mode()
4728 if ( info->params.mode == MGSL_MODE_HDLC && in usc_set_sdlc_mode()
4729 (info->params.flags & HDLC_FLAG_SHARE_ZERO) ) in usc_set_sdlc_mode()
4732 if ( info->params.addr_filter != 0xff ) in usc_set_sdlc_mode()
4735 usc_OutReg( info, RSR, info->params.addr_filter ); in usc_set_sdlc_mode()
4739 usc_OutReg( info, CMR, RegValue ); in usc_set_sdlc_mode()
4740 info->cmr_value = RegValue; in usc_set_sdlc_mode()
4759 switch ( info->params.encoding ) { in usc_set_sdlc_mode()
4769 if ( (info->params.crc_type & HDLC_CRC_MASK) == HDLC_CRC_16_CCITT ) in usc_set_sdlc_mode()
4771 else if ( (info->params.crc_type & HDLC_CRC_MASK) == HDLC_CRC_32_CCITT ) in usc_set_sdlc_mode()
4774 usc_OutReg( info, RMR, RegValue ); in usc_set_sdlc_mode()
4783 usc_OutReg( info, RCLR, RCLRVALUE ); in usc_set_sdlc_mode()
4785 usc_RCmd( info, RCmd_SelectRicrdma_level ); in usc_set_sdlc_mode()
4805 RegValue = usc_InReg( info, RICR ) & 0xc0; in usc_set_sdlc_mode()
4807 if ( info->bus_type == MGSL_BUS_TYPE_PCI ) in usc_set_sdlc_mode()
4808 usc_OutReg( info, RICR, (u16)(0x030a | RegValue) ); in usc_set_sdlc_mode()
4810 usc_OutReg( info, RICR, (u16)(0x140a | RegValue) ); in usc_set_sdlc_mode()
4814 usc_UnlatchRxstatusBits( info, RXSTATUS_ALL ); in usc_set_sdlc_mode()
4815 usc_ClearIrqPendingBits( info, RECEIVE_STATUS ); in usc_set_sdlc_mode()
4834 switch ( info->params.encoding ) { in usc_set_sdlc_mode()
4844 if ( (info->params.crc_type & HDLC_CRC_MASK) == HDLC_CRC_16_CCITT ) in usc_set_sdlc_mode()
4846 else if ( (info->params.crc_type & HDLC_CRC_MASK) == HDLC_CRC_32_CCITT ) in usc_set_sdlc_mode()
4849 usc_OutReg( info, TMR, RegValue ); in usc_set_sdlc_mode()
4851 usc_set_txidle( info ); in usc_set_sdlc_mode()
4854 usc_TCmd( info, TCmd_SelectTicrdma_level ); in usc_set_sdlc_mode()
4871 if ( info->bus_type == MGSL_BUS_TYPE_PCI ) in usc_set_sdlc_mode()
4872 usc_OutReg( info, TICR, 0x0736 ); in usc_set_sdlc_mode()
4874 usc_OutReg( info, TICR, 0x1436 ); in usc_set_sdlc_mode()
4876 usc_UnlatchTxstatusBits( info, TXSTATUS_ALL ); in usc_set_sdlc_mode()
4877 usc_ClearIrqPendingBits( info, TRANSMIT_STATUS ); in usc_set_sdlc_mode()
4896 info->tcsr_value = 0; in usc_set_sdlc_mode()
4899 info->tcsr_value |= TCSR_UNDERWAIT; in usc_set_sdlc_mode()
4901 usc_OutReg( info, TCSR, info->tcsr_value ); in usc_set_sdlc_mode()
4918 if ( info->params.flags & HDLC_FLAG_RXC_DPLL ) in usc_set_sdlc_mode()
4920 else if ( info->params.flags & HDLC_FLAG_RXC_BRG ) in usc_set_sdlc_mode()
4922 else if ( info->params.flags & HDLC_FLAG_RXC_TXCPIN) in usc_set_sdlc_mode()
4927 if ( info->params.flags & HDLC_FLAG_TXC_DPLL ) in usc_set_sdlc_mode()
4929 else if ( info->params.flags & HDLC_FLAG_TXC_BRG ) in usc_set_sdlc_mode()
4931 else if ( info->params.flags & HDLC_FLAG_TXC_RXCPIN) in usc_set_sdlc_mode()
4936 usc_OutReg( info, CMCR, RegValue ); in usc_set_sdlc_mode()
4956 if ( info->params.flags & (HDLC_FLAG_RXC_DPLL | HDLC_FLAG_TXC_DPLL) ) { in usc_set_sdlc_mode()
4964 if ( info->bus_type == MGSL_BUS_TYPE_PCI ) in usc_set_sdlc_mode()
4969 if ( info->params.flags & HDLC_FLAG_DPLL_DIV16 ) { in usc_set_sdlc_mode()
4973 else if ( info->params.flags & HDLC_FLAG_DPLL_DIV8 ) { in usc_set_sdlc_mode()
4994 if ( info->params.clock_speed ) in usc_set_sdlc_mode()
4996 Tc = (u16)((XtalSpeed/DpllDivisor)/info->params.clock_speed); in usc_set_sdlc_mode()
4997 if ( !((((XtalSpeed/DpllDivisor) % info->params.clock_speed) * 2) in usc_set_sdlc_mode()
4998 / info->params.clock_speed) ) in usc_set_sdlc_mode()
5006 usc_OutReg( info, TC1R, Tc ); in usc_set_sdlc_mode()
5010 switch ( info->params.encoding ) { in usc_set_sdlc_mode()
5022 usc_OutReg( info, HCR, RegValue ); in usc_set_sdlc_mode()
5043 usc_OutReg( info, CCSR, 0x1020 ); in usc_set_sdlc_mode()
5046 if ( info->params.flags & HDLC_FLAG_AUTO_CTS ) { in usc_set_sdlc_mode()
5047 usc_OutReg( info, SICR, in usc_set_sdlc_mode()
5048 (u16)(usc_InReg(info,SICR) | SICR_CTS_INACTIVE) ); in usc_set_sdlc_mode()
5053 usc_EnableMasterIrqBit( info ); in usc_set_sdlc_mode()
5055 usc_ClearIrqPendingBits( info, RECEIVE_STATUS | RECEIVE_DATA | in usc_set_sdlc_mode()
5059 usc_OutReg(info, SICR, (u16)(usc_InReg(info,SICR) | BIT3)); in usc_set_sdlc_mode()
5060 usc_EnableInterrupts(info, MISC); in usc_set_sdlc_mode()
5062 info->mbre_bit = 0; in usc_set_sdlc_mode()
5063 outw( 0, info->io_base ); /* clear Master Bus Enable (DCAR) */ in usc_set_sdlc_mode()
5064 usc_DmaCmd( info, DmaCmd_ResetAllChannels ); /* disable both DMA channels */ in usc_set_sdlc_mode()
5065 info->mbre_bit = BIT8; in usc_set_sdlc_mode()
5066 outw( BIT8, info->io_base ); /* set Master Bus Enable (DCAR) */ in usc_set_sdlc_mode()
5068 if (info->bus_type == MGSL_BUS_TYPE_ISA) { in usc_set_sdlc_mode()
5071 usc_OutReg(info, PCR, (u16)((usc_InReg(info, PCR) | BIT15) & ~BIT14)); in usc_set_sdlc_mode()
5096 if ( info->bus_type == MGSL_BUS_TYPE_PCI ) { in usc_set_sdlc_mode()
5098 usc_OutDmaReg( info, DCR, 0xa00b ); in usc_set_sdlc_mode()
5101 usc_OutDmaReg( info, DCR, 0x800b ); in usc_set_sdlc_mode()
5117 usc_OutDmaReg( info, RDMR, 0xf200 ); in usc_set_sdlc_mode()
5133 usc_OutDmaReg( info, TDMR, 0xf200 ); in usc_set_sdlc_mode()
5149 usc_OutDmaReg( info, DICR, 0x9000 ); in usc_set_sdlc_mode()
5151 usc_InDmaReg( info, RDMR ); /* clear pending receive DMA IRQ bits */ in usc_set_sdlc_mode()
5152 usc_InDmaReg( info, TDMR ); /* clear pending transmit DMA IRQ bits */ in usc_set_sdlc_mode()
5153 usc_OutDmaReg( info, CDIR, 0x0303 ); /* clear IUS and Pending for Tx and Rx */ in usc_set_sdlc_mode()
5171 switch ( info->params.preamble_length ) { in usc_set_sdlc_mode()
5177 switch ( info->params.preamble ) { in usc_set_sdlc_mode()
5184 usc_OutReg( info, CCR, RegValue ); in usc_set_sdlc_mode()
5194 if ( info->bus_type == MGSL_BUS_TYPE_PCI ) { in usc_set_sdlc_mode()
5196 usc_OutDmaReg( info, BDCR, 0x0000 ); in usc_set_sdlc_mode()
5199 usc_OutDmaReg( info, BDCR, 0x2000 ); in usc_set_sdlc_mode()
5201 usc_stop_transmitter(info); in usc_set_sdlc_mode()
5202 usc_stop_receiver(info); in usc_set_sdlc_mode()
5216 static void usc_enable_loopback(struct mgsl_struct *info, int enable) in usc_enable_loopback() argument
5220 usc_OutReg(info,IOCR,usc_InReg(info,IOCR) | (BIT7 | BIT6)); in usc_enable_loopback()
5235 usc_OutReg( info, CMCR, 0x0f64 ); in usc_enable_loopback()
5239 if (info->params.clock_speed) { in usc_enable_loopback()
5240 if (info->bus_type == MGSL_BUS_TYPE_PCI) in usc_enable_loopback()
5241 usc_OutReg(info, TC0R, (u16)((11059200/info->params.clock_speed)-1)); in usc_enable_loopback()
5243 usc_OutReg(info, TC0R, (u16)((14745600/info->params.clock_speed)-1)); in usc_enable_loopback()
5245 usc_OutReg(info, TC0R, (u16)8); in usc_enable_loopback()
5249 usc_OutReg( info, HCR, (u16)((usc_InReg( info, HCR ) & ~BIT1) | BIT0) ); in usc_enable_loopback()
5252 usc_OutReg(info, IOCR, (u16)((usc_InReg(info, IOCR) & 0xfff8) | 0x0004)); in usc_enable_loopback()
5255 info->loopback_bits = 0x300; in usc_enable_loopback()
5256 outw( 0x0300, info->io_base + CCAR ); in usc_enable_loopback()
5259 usc_OutReg(info,IOCR,usc_InReg(info,IOCR) & ~(BIT7 | BIT6)); in usc_enable_loopback()
5262 info->loopback_bits = 0; in usc_enable_loopback()
5263 outw( 0,info->io_base + CCAR ); in usc_enable_loopback()
5280 static void usc_enable_aux_clock( struct mgsl_struct *info, u32 data_rate ) in usc_enable_aux_clock() argument
5286 if ( info->bus_type == MGSL_BUS_TYPE_PCI ) in usc_enable_aux_clock()
5304 usc_OutReg( info, TC0R, Tc ); in usc_enable_aux_clock()
5312 usc_OutReg( info, HCR, (u16)((usc_InReg( info, HCR ) & ~BIT1) | BIT0) ); in usc_enable_aux_clock()
5315 usc_OutReg( info, IOCR, (u16)((usc_InReg(info, IOCR) & 0xfff8) | 0x0004) ); in usc_enable_aux_clock()
5318 usc_OutReg( info, HCR, (u16)(usc_InReg( info, HCR ) & ~BIT0) ); in usc_enable_aux_clock()
5337 static void usc_process_rxoverrun_sync( struct mgsl_struct *info ) in usc_process_rxoverrun_sync() argument
5346 DMABUFFERENTRY *buffer_list = info->rx_buffer_list; in usc_process_rxoverrun_sync()
5349 usc_DmaCmd( info, DmaCmd_PauseRxChannel ); in usc_process_rxoverrun_sync()
5350 usc_RCmd( info, RCmd_EnterHuntmode ); in usc_process_rxoverrun_sync()
5351 usc_RTCmd( info, RTCmd_PurgeRxFifo ); in usc_process_rxoverrun_sync()
5356 frame_start_index = start_index = end_index = info->current_rx_buffer; in usc_process_rxoverrun_sync()
5389 if ( end_index == info->rx_buffer_count ) in usc_process_rxoverrun_sync()
5397 mgsl_reset_rx_dma_buffers( info ); in usc_process_rxoverrun_sync()
5418 *((unsigned long *)&(info->rx_buffer_list[start_index++].count)) = DMABUFFERSIZE; in usc_process_rxoverrun_sync()
5421 if ( start_index == info->rx_buffer_count ) in usc_process_rxoverrun_sync()
5431 usc_UnlatchRxstatusBits(info,RXSTATUS_ALL); in usc_process_rxoverrun_sync()
5432 usc_ClearIrqPendingBits(info, RECEIVE_DATA|RECEIVE_STATUS); in usc_process_rxoverrun_sync()
5433 usc_UnlatchRxstatusBits(info, RECEIVE_DATA|RECEIVE_STATUS); in usc_process_rxoverrun_sync()
5435 usc_EnableReceiver(info,DISABLE_UNCONDITIONAL); in usc_process_rxoverrun_sync()
5438 usc_OutReg( info, CCSR, (u16)(usc_InReg(info,CCSR) | BIT13) ); in usc_process_rxoverrun_sync()
5441 phys_addr = info->rx_buffer_list[frame_start_index].phys_entry; in usc_process_rxoverrun_sync()
5442 usc_OutDmaReg( info, NRARL, (u16)phys_addr ); in usc_process_rxoverrun_sync()
5443 usc_OutDmaReg( info, NRARU, (u16)(phys_addr >> 16) ); in usc_process_rxoverrun_sync()
5445 usc_UnlatchRxstatusBits( info, RXSTATUS_ALL ); in usc_process_rxoverrun_sync()
5446 usc_ClearIrqPendingBits( info, RECEIVE_DATA | RECEIVE_STATUS ); in usc_process_rxoverrun_sync()
5447 usc_EnableInterrupts( info, RECEIVE_STATUS ); in usc_process_rxoverrun_sync()
5452 usc_OutDmaReg( info, RDIAR, BIT3 | BIT2 ); in usc_process_rxoverrun_sync()
5453 usc_OutDmaReg( info, DICR, (u16)(usc_InDmaReg(info,DICR) | BIT1) ); in usc_process_rxoverrun_sync()
5454 usc_DmaCmd( info, DmaCmd_InitRxChannel ); in usc_process_rxoverrun_sync()
5455 if ( info->params.flags & HDLC_FLAG_AUTO_DCD ) in usc_process_rxoverrun_sync()
5456 usc_EnableReceiver(info,ENABLE_AUTO_DCD); in usc_process_rxoverrun_sync()
5458 usc_EnableReceiver(info,ENABLE_UNCONDITIONAL); in usc_process_rxoverrun_sync()
5463 usc_OutReg( info, CCSR, (u16)(usc_InReg(info,CCSR) | BIT13) ); in usc_process_rxoverrun_sync()
5464 usc_RTCmd( info, RTCmd_PurgeRxFifo ); in usc_process_rxoverrun_sync()
5476 static void usc_stop_receiver( struct mgsl_struct *info ) in usc_stop_receiver() argument
5480 __FILE__,__LINE__, info->device_name ); in usc_stop_receiver()
5484 usc_DmaCmd( info, DmaCmd_ResetRxChannel ); in usc_stop_receiver()
5486 usc_UnlatchRxstatusBits( info, RXSTATUS_ALL ); in usc_stop_receiver()
5487 usc_ClearIrqPendingBits( info, RECEIVE_DATA | RECEIVE_STATUS ); in usc_stop_receiver()
5488 usc_DisableInterrupts( info, RECEIVE_DATA | RECEIVE_STATUS ); in usc_stop_receiver()
5490 usc_EnableReceiver(info,DISABLE_UNCONDITIONAL); in usc_stop_receiver()
5493 usc_OutReg( info, CCSR, (u16)(usc_InReg(info,CCSR) | BIT13) ); in usc_stop_receiver()
5494 usc_RTCmd( info, RTCmd_PurgeRxFifo ); in usc_stop_receiver()
5496 info->rx_enabled = false; in usc_stop_receiver()
5497 info->rx_overflow = false; in usc_stop_receiver()
5498 info->rx_rcc_underrun = false; in usc_stop_receiver()
5509 static void usc_start_receiver( struct mgsl_struct *info ) in usc_start_receiver() argument
5515 __FILE__,__LINE__, info->device_name ); in usc_start_receiver()
5517 mgsl_reset_rx_dma_buffers( info ); in usc_start_receiver()
5518 usc_stop_receiver( info ); in usc_start_receiver()
5520 usc_OutReg( info, CCSR, (u16)(usc_InReg(info,CCSR) | BIT13) ); in usc_start_receiver()
5521 usc_RTCmd( info, RTCmd_PurgeRxFifo ); in usc_start_receiver()
5523 if ( info->params.mode == MGSL_MODE_HDLC || in usc_start_receiver()
5524 info->params.mode == MGSL_MODE_RAW ) { in usc_start_receiver()
5530 phys_addr = info->rx_buffer_list[0].phys_entry; in usc_start_receiver()
5531 usc_OutDmaReg( info, NRARL, (u16)phys_addr ); in usc_start_receiver()
5532 usc_OutDmaReg( info, NRARU, (u16)(phys_addr >> 16) ); in usc_start_receiver()
5534 usc_UnlatchRxstatusBits( info, RXSTATUS_ALL ); in usc_start_receiver()
5535 usc_ClearIrqPendingBits( info, RECEIVE_DATA | RECEIVE_STATUS ); in usc_start_receiver()
5536 usc_EnableInterrupts( info, RECEIVE_STATUS ); in usc_start_receiver()
5541 usc_OutDmaReg( info, RDIAR, BIT3 | BIT2 ); in usc_start_receiver()
5542 usc_OutDmaReg( info, DICR, (u16)(usc_InDmaReg(info,DICR) | BIT1) ); in usc_start_receiver()
5543 usc_DmaCmd( info, DmaCmd_InitRxChannel ); in usc_start_receiver()
5544 if ( info->params.flags & HDLC_FLAG_AUTO_DCD ) in usc_start_receiver()
5545 usc_EnableReceiver(info,ENABLE_AUTO_DCD); in usc_start_receiver()
5547 usc_EnableReceiver(info,ENABLE_UNCONDITIONAL); in usc_start_receiver()
5549 usc_UnlatchRxstatusBits(info, RXSTATUS_ALL); in usc_start_receiver()
5550 usc_ClearIrqPendingBits(info, RECEIVE_DATA | RECEIVE_STATUS); in usc_start_receiver()
5551 usc_EnableInterrupts(info, RECEIVE_DATA); in usc_start_receiver()
5553 usc_RTCmd( info, RTCmd_PurgeRxFifo ); in usc_start_receiver()
5554 usc_RCmd( info, RCmd_EnterHuntmode ); in usc_start_receiver()
5556 usc_EnableReceiver(info,ENABLE_UNCONDITIONAL); in usc_start_receiver()
5559 usc_OutReg( info, CCSR, 0x1020 ); in usc_start_receiver()
5561 info->rx_enabled = true; in usc_start_receiver()
5573 static void usc_start_transmitter( struct mgsl_struct *info ) in usc_start_transmitter() argument
5580 __FILE__,__LINE__, info->device_name ); in usc_start_transmitter()
5582 if ( info->xmit_cnt ) { in usc_start_transmitter()
5588 info->drop_rts_on_tx_done = false; in usc_start_transmitter()
5590 if ( info->params.flags & HDLC_FLAG_AUTO_RTS ) { in usc_start_transmitter()
5591 usc_get_serial_signals( info ); in usc_start_transmitter()
5592 if ( !(info->serial_signals & SerialSignal_RTS) ) { in usc_start_transmitter()
5593 info->serial_signals |= SerialSignal_RTS; in usc_start_transmitter()
5594 usc_set_serial_signals( info ); in usc_start_transmitter()
5595 info->drop_rts_on_tx_done = true; in usc_start_transmitter()
5600 if ( info->params.mode == MGSL_MODE_ASYNC ) { in usc_start_transmitter()
5601 if ( !info->tx_active ) { in usc_start_transmitter()
5602 usc_UnlatchTxstatusBits(info, TXSTATUS_ALL); in usc_start_transmitter()
5603 usc_ClearIrqPendingBits(info, TRANSMIT_STATUS + TRANSMIT_DATA); in usc_start_transmitter()
5604 usc_EnableInterrupts(info, TRANSMIT_DATA); in usc_start_transmitter()
5605 usc_load_txfifo(info); in usc_start_transmitter()
5609 usc_DmaCmd( info, DmaCmd_ResetTxChannel ); in usc_start_transmitter()
5614 FrameSize = info->tx_buffer_list[info->start_tx_dma_buffer].rcc; in usc_start_transmitter()
5620 if ( info->params.mode == MGSL_MODE_RAW ) in usc_start_transmitter()
5621 info->tx_buffer_list[info->start_tx_dma_buffer].rcc = 0; in usc_start_transmitter()
5625 usc_OutReg( info, TCLR, (u16)FrameSize ); in usc_start_transmitter()
5627 usc_RTCmd( info, RTCmd_PurgeTxFifo ); in usc_start_transmitter()
5630 phys_addr = info->tx_buffer_list[info->start_tx_dma_buffer].phys_entry; in usc_start_transmitter()
5631 usc_OutDmaReg( info, NTARL, (u16)phys_addr ); in usc_start_transmitter()
5632 usc_OutDmaReg( info, NTARU, (u16)(phys_addr >> 16) ); in usc_start_transmitter()
5634 usc_UnlatchTxstatusBits( info, TXSTATUS_ALL ); in usc_start_transmitter()
5635 usc_ClearIrqPendingBits( info, TRANSMIT_STATUS ); in usc_start_transmitter()
5636 usc_EnableInterrupts( info, TRANSMIT_STATUS ); in usc_start_transmitter()
5638 if ( info->params.mode == MGSL_MODE_RAW && in usc_start_transmitter()
5639 info->num_tx_dma_buffers > 1 ) { in usc_start_transmitter()
5647 usc_OutDmaReg( info, TDIAR, BIT2|BIT3 ); in usc_start_transmitter()
5648 usc_OutDmaReg( info, DICR, (u16)(usc_InDmaReg(info,DICR) | BIT0) ); in usc_start_transmitter()
5652 usc_DmaCmd( info, DmaCmd_InitTxChannel ); in usc_start_transmitter()
5654 usc_TCmd( info, TCmd_SendFrame ); in usc_start_transmitter()
5656 mod_timer(&info->tx_timer, jiffies + in usc_start_transmitter()
5659 info->tx_active = true; in usc_start_transmitter()
5662 if ( !info->tx_enabled ) { in usc_start_transmitter()
5663 info->tx_enabled = true; in usc_start_transmitter()
5664 if ( info->params.flags & HDLC_FLAG_AUTO_CTS ) in usc_start_transmitter()
5665 usc_EnableTransmitter(info,ENABLE_AUTO_CTS); in usc_start_transmitter()
5667 usc_EnableTransmitter(info,ENABLE_UNCONDITIONAL); in usc_start_transmitter()
5679 static void usc_stop_transmitter( struct mgsl_struct *info ) in usc_stop_transmitter() argument
5683 __FILE__,__LINE__, info->device_name ); in usc_stop_transmitter()
5685 del_timer(&info->tx_timer); in usc_stop_transmitter()
5687 usc_UnlatchTxstatusBits( info, TXSTATUS_ALL ); in usc_stop_transmitter()
5688 usc_ClearIrqPendingBits( info, TRANSMIT_STATUS + TRANSMIT_DATA ); in usc_stop_transmitter()
5689 usc_DisableInterrupts( info, TRANSMIT_STATUS + TRANSMIT_DATA ); in usc_stop_transmitter()
5691 usc_EnableTransmitter(info,DISABLE_UNCONDITIONAL); in usc_stop_transmitter()
5692 usc_DmaCmd( info, DmaCmd_ResetTxChannel ); in usc_stop_transmitter()
5693 usc_RTCmd( info, RTCmd_PurgeTxFifo ); in usc_stop_transmitter()
5695 info->tx_enabled = false; in usc_stop_transmitter()
5696 info->tx_active = false; in usc_stop_transmitter()
5708 static void usc_load_txfifo( struct mgsl_struct *info ) in usc_load_txfifo() argument
5713 if ( !info->xmit_cnt && !info->x_char ) in usc_load_txfifo()
5717 usc_TCmd( info, TCmd_SelectTicrTxFifostatus ); in usc_load_txfifo()
5721 while( (Fifocount = usc_InReg(info, TICR) >> 8) && info->xmit_cnt ) { in usc_load_txfifo()
5725 if ( (info->xmit_cnt > 1) && (Fifocount > 1) && !info->x_char ) { in usc_load_txfifo()
5728 TwoBytes[0] = info->xmit_buf[info->xmit_tail++]; in usc_load_txfifo()
5729 info->xmit_tail = info->xmit_tail & (SERIAL_XMIT_SIZE-1); in usc_load_txfifo()
5730 TwoBytes[1] = info->xmit_buf[info->xmit_tail++]; in usc_load_txfifo()
5731 info->xmit_tail = info->xmit_tail & (SERIAL_XMIT_SIZE-1); in usc_load_txfifo()
5733 outw( *((u16 *)TwoBytes), info->io_base + DATAREG); in usc_load_txfifo()
5735 info->xmit_cnt -= 2; in usc_load_txfifo()
5736 info->icount.tx += 2; in usc_load_txfifo()
5740 outw( (inw( info->io_base + CCAR) & 0x0780) | (TDR+LSBONLY), in usc_load_txfifo()
5741 info->io_base + CCAR ); in usc_load_txfifo()
5743 if (info->x_char) { in usc_load_txfifo()
5745 outw( info->x_char,info->io_base + CCAR ); in usc_load_txfifo()
5746 info->x_char = 0; in usc_load_txfifo()
5748 outw( info->xmit_buf[info->xmit_tail++],info->io_base + CCAR ); in usc_load_txfifo()
5749 info->xmit_tail = info->xmit_tail & (SERIAL_XMIT_SIZE-1); in usc_load_txfifo()
5750 info->xmit_cnt--; in usc_load_txfifo()
5752 info->icount.tx++; in usc_load_txfifo()
5765 static void usc_reset( struct mgsl_struct *info ) in usc_reset() argument
5767 if ( info->bus_type == MGSL_BUS_TYPE_PCI ) { in usc_reset()
5774 volatile u32 *MiscCtrl = (u32 *)(info->lcr_base + 0x50); in usc_reset()
5775 u32 *LCR0BRDR = (u32 *)(info->lcr_base + 0x28); in usc_reset()
5777 info->misc_ctrl_value |= BIT30; in usc_reset()
5778 *MiscCtrl = info->misc_ctrl_value; in usc_reset()
5788 info->misc_ctrl_value &= ~BIT30; in usc_reset()
5789 *MiscCtrl = info->misc_ctrl_value; in usc_reset()
5803 outb( 0,info->io_base + 8 ); in usc_reset()
5806 info->mbre_bit = 0; in usc_reset()
5807 info->loopback_bits = 0; in usc_reset()
5808 info->usc_idle_mode = 0; in usc_reset()
5827 outw( 0x000c,info->io_base + SDPIN ); in usc_reset()
5830 outw( 0,info->io_base ); in usc_reset()
5831 outw( 0,info->io_base + CCAR ); in usc_reset()
5834 usc_RTCmd( info, RTCmd_SelectLittleEndian ); in usc_reset()
5851 usc_OutReg( info, PCR, 0xf0f5 ); in usc_reset()
5868 usc_OutReg( info, IOCR, 0x0004 ); in usc_reset()
5879 static void usc_set_async_mode( struct mgsl_struct *info ) in usc_set_async_mode() argument
5884 usc_DisableMasterIrqBit( info ); in usc_set_async_mode()
5886 outw( 0, info->io_base ); /* clear Master Bus Enable (DCAR) */ in usc_set_async_mode()
5887 usc_DmaCmd( info, DmaCmd_ResetAllChannels ); /* disable both DMA channels */ in usc_set_async_mode()
5889 usc_loopback_frame( info ); in usc_set_async_mode()
5904 if ( info->params.stop_bits != 1 ) in usc_set_async_mode()
5906 usc_OutReg( info, CMR, RegValue ); in usc_set_async_mode()
5923 if ( info->params.data_bits != 8 ) in usc_set_async_mode()
5926 if ( info->params.parity != ASYNC_PARITY_NONE ) { in usc_set_async_mode()
5928 if ( info->params.parity != ASYNC_PARITY_ODD ) in usc_set_async_mode()
5932 usc_OutReg( info, RMR, RegValue ); in usc_set_async_mode()
5937 usc_RCmd( info, RCmd_SelectRicrIntLevel ); in usc_set_async_mode()
5960 usc_OutReg( info, RICR, 0x0000 ); in usc_set_async_mode()
5962 usc_UnlatchRxstatusBits( info, RXSTATUS_ALL ); in usc_set_async_mode()
5963 usc_ClearIrqPendingBits( info, RECEIVE_STATUS ); in usc_set_async_mode()
5980 if ( info->params.data_bits != 8 ) in usc_set_async_mode()
5983 if ( info->params.parity != ASYNC_PARITY_NONE ) { in usc_set_async_mode()
5985 if ( info->params.parity != ASYNC_PARITY_ODD ) in usc_set_async_mode()
5989 usc_OutReg( info, TMR, RegValue ); in usc_set_async_mode()
5991 usc_set_txidle( info ); in usc_set_async_mode()
5996 usc_TCmd( info, TCmd_SelectTicrIntLevel ); in usc_set_async_mode()
6014 usc_OutReg( info, TICR, 0x1f40 ); in usc_set_async_mode()
6016 usc_UnlatchTxstatusBits( info, TXSTATUS_ALL ); in usc_set_async_mode()
6017 usc_ClearIrqPendingBits( info, TRANSMIT_STATUS ); in usc_set_async_mode()
6019 usc_enable_async_clock( info, info->params.data_rate ); in usc_set_async_mode()
6040 usc_OutReg( info, CCSR, 0x0020 ); in usc_set_async_mode()
6042 usc_DisableInterrupts( info, TRANSMIT_STATUS + TRANSMIT_DATA + in usc_set_async_mode()
6045 usc_ClearIrqPendingBits( info, TRANSMIT_STATUS + TRANSMIT_DATA + in usc_set_async_mode()
6048 usc_EnableMasterIrqBit( info ); in usc_set_async_mode()
6050 if (info->bus_type == MGSL_BUS_TYPE_ISA) { in usc_set_async_mode()
6053 usc_OutReg(info, PCR, (u16)((usc_InReg(info, PCR) | BIT13) & ~BIT12)); in usc_set_async_mode()
6056 if (info->params.loopback) { in usc_set_async_mode()
6057 info->loopback_bits = 0x300; in usc_set_async_mode()
6058 outw(0x0300, info->io_base + CCAR); in usc_set_async_mode()
6077 static void usc_loopback_frame( struct mgsl_struct *info ) in usc_loopback_frame() argument
6080 unsigned long oldmode = info->params.mode; in usc_loopback_frame()
6082 info->params.mode = MGSL_MODE_HDLC; in usc_loopback_frame()
6084 usc_DisableMasterIrqBit( info ); in usc_loopback_frame()
6086 usc_set_sdlc_mode( info ); in usc_loopback_frame()
6087 usc_enable_loopback( info, 1 ); in usc_loopback_frame()
6090 usc_OutReg( info, TC0R, 0 ); in usc_loopback_frame()
6106 usc_OutReg( info, CCR, 0x0100 ); in usc_loopback_frame()
6109 usc_RTCmd( info, RTCmd_PurgeRxFifo ); in usc_loopback_frame()
6110 usc_EnableReceiver(info,ENABLE_UNCONDITIONAL); in usc_loopback_frame()
6115 usc_OutReg( info, TCLR, 2 ); in usc_loopback_frame()
6116 usc_RTCmd( info, RTCmd_PurgeTxFifo ); in usc_loopback_frame()
6119 usc_UnlatchTxstatusBits(info,TXSTATUS_ALL); in usc_loopback_frame()
6120 outw(0,info->io_base + DATAREG); in usc_loopback_frame()
6123 usc_TCmd( info, TCmd_SendFrame ); in usc_loopback_frame()
6124 usc_EnableTransmitter(info,ENABLE_UNCONDITIONAL); in usc_loopback_frame()
6128 if (usc_InReg( info, RCSR ) & (BIT8 | BIT4 | BIT3 | BIT1)) in usc_loopback_frame()
6132 usc_enable_loopback(info, 0); in usc_loopback_frame()
6134 usc_EnableMasterIrqBit(info); in usc_loopback_frame()
6136 info->params.mode = oldmode; in usc_loopback_frame()
6145 static void usc_set_sync_mode( struct mgsl_struct *info ) in usc_set_sync_mode() argument
6147 usc_loopback_frame( info ); in usc_set_sync_mode()
6148 usc_set_sdlc_mode( info ); in usc_set_sync_mode()
6150 if (info->bus_type == MGSL_BUS_TYPE_ISA) { in usc_set_sync_mode()
6153 usc_OutReg(info, PCR, (u16)((usc_InReg(info, PCR) | BIT13) & ~BIT12)); in usc_set_sync_mode()
6156 usc_enable_aux_clock(info, info->params.clock_speed); in usc_set_sync_mode()
6158 if (info->params.loopback) in usc_set_sync_mode()
6159 usc_enable_loopback(info,1); in usc_set_sync_mode()
6168 static void usc_set_txidle( struct mgsl_struct *info ) in usc_set_txidle() argument
6174 switch( info->idle_mode ){ in usc_set_txidle()
6184 info->usc_idle_mode = usc_idle_mode; in usc_set_txidle()
6186 info->tcsr_value &= ~IDLEMODE_MASK; /* clear idle mode bits */ in usc_set_txidle()
6187 info->tcsr_value += usc_idle_mode; in usc_set_txidle()
6188 usc_OutReg(info, TCSR, info->tcsr_value); in usc_set_txidle()
6197 if ( info->params.mode == MGSL_MODE_RAW ) { in usc_set_txidle()
6199 switch( info->idle_mode ) { in usc_set_txidle()
6219 usc_SetTransmitSyncChars(info,syncpat,syncpat); in usc_set_txidle()
6231 static void usc_get_serial_signals( struct mgsl_struct *info ) in usc_get_serial_signals() argument
6236 info->serial_signals &= SerialSignal_RTS | SerialSignal_DTR; in usc_get_serial_signals()
6241 status = usc_InReg( info, MISR ); in usc_get_serial_signals()
6246 info->serial_signals |= SerialSignal_CTS; in usc_get_serial_signals()
6249 info->serial_signals |= SerialSignal_DCD; in usc_get_serial_signals()
6252 info->serial_signals |= SerialSignal_RI; in usc_get_serial_signals()
6255 info->serial_signals |= SerialSignal_DSR; in usc_get_serial_signals()
6267 static void usc_set_serial_signals( struct mgsl_struct *info ) in usc_set_serial_signals() argument
6270 unsigned char V24Out = info->serial_signals; in usc_set_serial_signals()
6274 Control = usc_InReg( info, PCR ); in usc_set_serial_signals()
6286 usc_OutReg( info, PCR, Control ); in usc_set_serial_signals()
6299 static void usc_enable_async_clock( struct mgsl_struct *info, u32 data_rate ) in usc_enable_async_clock() argument
6316 usc_OutReg( info, CMCR, 0x0f64 ); in usc_enable_async_clock()
6325 if ( info->bus_type == MGSL_BUS_TYPE_PCI ) in usc_enable_async_clock()
6326 usc_OutReg( info, TC0R, (u16)((691200/data_rate) - 1) ); in usc_enable_async_clock()
6328 usc_OutReg( info, TC0R, (u16)((921600/data_rate) - 1) ); in usc_enable_async_clock()
6337 usc_OutReg( info, HCR, in usc_enable_async_clock()
6338 (u16)((usc_InReg( info, HCR ) & ~BIT1) | BIT0) ); in usc_enable_async_clock()
6343 usc_OutReg( info, IOCR, in usc_enable_async_clock()
6344 (u16)((usc_InReg(info, IOCR) & 0xfff8) | 0x0004) ); in usc_enable_async_clock()
6347 usc_OutReg( info, HCR, (u16)(usc_InReg( info, HCR ) & ~BIT0) ); in usc_enable_async_clock()
6409 static void mgsl_reset_tx_dma_buffers( struct mgsl_struct *info ) in mgsl_reset_tx_dma_buffers() argument
6413 for ( i = 0; i < info->tx_buffer_count; i++ ) { in mgsl_reset_tx_dma_buffers()
6414 *((unsigned long *)&(info->tx_buffer_list[i].count)) = 0; in mgsl_reset_tx_dma_buffers()
6417 info->current_tx_buffer = 0; in mgsl_reset_tx_dma_buffers()
6418 info->start_tx_dma_buffer = 0; in mgsl_reset_tx_dma_buffers()
6419 info->tx_dma_buffers_used = 0; in mgsl_reset_tx_dma_buffers()
6421 info->get_tx_holding_index = 0; in mgsl_reset_tx_dma_buffers()
6422 info->put_tx_holding_index = 0; in mgsl_reset_tx_dma_buffers()
6423 info->tx_holding_count = 0; in mgsl_reset_tx_dma_buffers()
6435 static int num_free_tx_dma_buffers(struct mgsl_struct *info) in num_free_tx_dma_buffers() argument
6437 return info->tx_buffer_count - info->tx_dma_buffers_used; in num_free_tx_dma_buffers()
6450 static void mgsl_reset_rx_dma_buffers( struct mgsl_struct *info ) in mgsl_reset_rx_dma_buffers() argument
6454 for ( i = 0; i < info->rx_buffer_count; i++ ) { in mgsl_reset_rx_dma_buffers()
6455 *((unsigned long *)&(info->rx_buffer_list[i].count)) = DMABUFFERSIZE; in mgsl_reset_rx_dma_buffers()
6460 info->current_rx_buffer = 0; in mgsl_reset_rx_dma_buffers()
6478 static void mgsl_free_rx_frame_buffers( struct mgsl_struct *info, unsigned int StartIndex, unsigned… in mgsl_free_rx_frame_buffers() argument
6490 pBufEntry = &(info->rx_buffer_list[Index]); in mgsl_free_rx_frame_buffers()
6504 if ( Index == info->rx_buffer_count ) in mgsl_free_rx_frame_buffers()
6509 info->current_rx_buffer = Index; in mgsl_free_rx_frame_buffers()
6521 static bool mgsl_get_rx_frame(struct mgsl_struct *info) in mgsl_get_rx_frame() argument
6529 struct tty_struct *tty = info->port.tty; in mgsl_get_rx_frame()
6539 StartIndex = EndIndex = info->current_rx_buffer; in mgsl_get_rx_frame()
6541 while( !info->rx_buffer_list[EndIndex].status ) { in mgsl_get_rx_frame()
6549 if ( info->rx_buffer_list[EndIndex].count ) in mgsl_get_rx_frame()
6554 if ( EndIndex == info->rx_buffer_count ) in mgsl_get_rx_frame()
6564 if ( info->rx_enabled ){ in mgsl_get_rx_frame()
6565 spin_lock_irqsave(&info->irq_spinlock,flags); in mgsl_get_rx_frame()
6566 usc_start_receiver(info); in mgsl_get_rx_frame()
6567 spin_unlock_irqrestore(&info->irq_spinlock,flags); in mgsl_get_rx_frame()
6576 status = info->rx_buffer_list[EndIndex].status; in mgsl_get_rx_frame()
6581 info->icount.rxshort++; in mgsl_get_rx_frame()
6583 info->icount.rxabort++; in mgsl_get_rx_frame()
6585 info->icount.rxover++; in mgsl_get_rx_frame()
6587 info->icount.rxcrc++; in mgsl_get_rx_frame()
6588 if ( info->params.crc_type & HDLC_CRC_RETURN_EX ) in mgsl_get_rx_frame()
6594 info->netdev->stats.rx_errors++; in mgsl_get_rx_frame()
6595 info->netdev->stats.rx_frame_errors++; in mgsl_get_rx_frame()
6608 framesize = RCLRVALUE - info->rx_buffer_list[EndIndex].rcc; in mgsl_get_rx_frame()
6611 if ( info->params.crc_type == HDLC_CRC_16_CCITT ) in mgsl_get_rx_frame()
6613 else if ( info->params.crc_type == HDLC_CRC_32_CCITT ) in mgsl_get_rx_frame()
6619 __FILE__,__LINE__,info->device_name,status,framesize); in mgsl_get_rx_frame()
6622 mgsl_trace_block(info,info->rx_buffer_list[StartIndex].virt_addr, in mgsl_get_rx_frame()
6626 if ( ( (info->params.crc_type & HDLC_CRC_RETURN_EX) && in mgsl_get_rx_frame()
6627 ((framesize+1) > info->max_frame_size) ) || in mgsl_get_rx_frame()
6628 (framesize > info->max_frame_size) ) in mgsl_get_rx_frame()
6629 info->icount.rxlong++; in mgsl_get_rx_frame()
6634 unsigned char *ptmp = info->intermediate_rxbuffer; in mgsl_get_rx_frame()
6637 info->icount.rxok++; in mgsl_get_rx_frame()
6646 pBufEntry = &(info->rx_buffer_list[index]); in mgsl_get_rx_frame()
6651 if ( ++index == info->rx_buffer_count ) in mgsl_get_rx_frame()
6655 if ( info->params.crc_type & HDLC_CRC_RETURN_EX ) { in mgsl_get_rx_frame()
6663 __FILE__,__LINE__,info->device_name, in mgsl_get_rx_frame()
6668 if (info->netcount) in mgsl_get_rx_frame()
6669 hdlcdev_rx(info,info->intermediate_rxbuffer,framesize); in mgsl_get_rx_frame()
6672 ldisc_receive_buf(tty, info->intermediate_rxbuffer, info->flag_buf, framesize); in mgsl_get_rx_frame()
6676 mgsl_free_rx_frame_buffers( info, StartIndex, EndIndex ); in mgsl_get_rx_frame()
6682 if ( info->rx_enabled && info->rx_overflow ) { in mgsl_get_rx_frame()
6688 if ( !info->rx_buffer_list[EndIndex].status && in mgsl_get_rx_frame()
6689 info->rx_buffer_list[EndIndex].count ) { in mgsl_get_rx_frame()
6690 spin_lock_irqsave(&info->irq_spinlock,flags); in mgsl_get_rx_frame()
6691 usc_start_receiver(info); in mgsl_get_rx_frame()
6692 spin_unlock_irqrestore(&info->irq_spinlock,flags); in mgsl_get_rx_frame()
6719 static bool mgsl_get_raw_rx_frame(struct mgsl_struct *info) in mgsl_get_raw_rx_frame() argument
6727 struct tty_struct *tty = info->port.tty; in mgsl_get_raw_rx_frame()
6744 CurrentIndex = NextIndex = info->current_rx_buffer; in mgsl_get_raw_rx_frame()
6746 if ( NextIndex == info->rx_buffer_count ) in mgsl_get_raw_rx_frame()
6749 if ( info->rx_buffer_list[CurrentIndex].status != 0 || in mgsl_get_raw_rx_frame()
6750 (info->rx_buffer_list[CurrentIndex].count == 0 && in mgsl_get_raw_rx_frame()
6751 info->rx_buffer_list[NextIndex].count == 0)) { in mgsl_get_raw_rx_frame()
6759 status = info->rx_buffer_list[CurrentIndex].status; in mgsl_get_raw_rx_frame()
6764 info->icount.rxshort++; in mgsl_get_raw_rx_frame()
6766 info->icount.rxabort++; in mgsl_get_raw_rx_frame()
6768 info->icount.rxover++; in mgsl_get_raw_rx_frame()
6770 info->icount.rxcrc++; in mgsl_get_raw_rx_frame()
6808 if ( info->rx_buffer_list[CurrentIndex].rcc ) in mgsl_get_raw_rx_frame()
6809 framesize = RCLRVALUE - info->rx_buffer_list[CurrentIndex].rcc; in mgsl_get_raw_rx_frame()
6830 __FILE__,__LINE__,info->device_name,status,framesize); in mgsl_get_raw_rx_frame()
6833 mgsl_trace_block(info,info->rx_buffer_list[CurrentIndex].virt_addr, in mgsl_get_raw_rx_frame()
6840 pBufEntry = &(info->rx_buffer_list[CurrentIndex]); in mgsl_get_raw_rx_frame()
6841 memcpy( info->intermediate_rxbuffer, pBufEntry->virt_addr, framesize); in mgsl_get_raw_rx_frame()
6842 info->icount.rxok++; in mgsl_get_raw_rx_frame()
6844 ldisc_receive_buf(tty, info->intermediate_rxbuffer, info->flag_buf, framesize); in mgsl_get_raw_rx_frame()
6848 mgsl_free_rx_frame_buffers( info, CurrentIndex, CurrentIndex ); in mgsl_get_raw_rx_frame()
6854 if ( info->rx_enabled && info->rx_overflow ) { in mgsl_get_raw_rx_frame()
6860 if ( !info->rx_buffer_list[CurrentIndex].status && in mgsl_get_raw_rx_frame()
6861 info->rx_buffer_list[CurrentIndex].count ) { in mgsl_get_raw_rx_frame()
6862 spin_lock_irqsave(&info->irq_spinlock,flags); in mgsl_get_raw_rx_frame()
6863 usc_start_receiver(info); in mgsl_get_raw_rx_frame()
6864 spin_unlock_irqrestore(&info->irq_spinlock,flags); in mgsl_get_raw_rx_frame()
6884 static void mgsl_load_tx_dma_buffer(struct mgsl_struct *info, in mgsl_load_tx_dma_buffer() argument
6892 mgsl_trace_block(info,Buffer, min_t(int, BufferSize, DMABUFFERSIZE), 1); in mgsl_load_tx_dma_buffer()
6894 if (info->params.flags & HDLC_FLAG_HDLC_LOOPMODE) { in mgsl_load_tx_dma_buffer()
6898 info->cmr_value |= BIT13; in mgsl_load_tx_dma_buffer()
6905 i = info->current_tx_buffer; in mgsl_load_tx_dma_buffer()
6906 info->start_tx_dma_buffer = i; in mgsl_load_tx_dma_buffer()
6911 info->tx_buffer_list[i].status = info->cmr_value & 0xf000; in mgsl_load_tx_dma_buffer()
6912 info->tx_buffer_list[i].rcc = BufferSize; in mgsl_load_tx_dma_buffer()
6913 info->tx_buffer_list[i].count = BufferSize; in mgsl_load_tx_dma_buffer()
6920 pBufEntry = &info->tx_buffer_list[i++]; in mgsl_load_tx_dma_buffer()
6922 if ( i == info->tx_buffer_count ) in mgsl_load_tx_dma_buffer()
6934 if ( info->bus_type == MGSL_BUS_TYPE_PCI ) in mgsl_load_tx_dma_buffer()
6945 ++info->tx_dma_buffers_used; in mgsl_load_tx_dma_buffer()
6949 info->current_tx_buffer = i; in mgsl_load_tx_dma_buffer()
6961 static bool mgsl_register_test( struct mgsl_struct *info ) in mgsl_register_test() argument
6970 spin_lock_irqsave(&info->irq_spinlock,flags); in mgsl_register_test()
6971 usc_reset(info); in mgsl_register_test()
6975 if ( (usc_InReg( info, SICR ) != 0) || in mgsl_register_test()
6976 (usc_InReg( info, IVR ) != 0) || in mgsl_register_test()
6977 (usc_InDmaReg( info, DIVR ) != 0) ){ in mgsl_register_test()
6986 usc_OutReg( info, TC0R, BitPatterns[i] ); in mgsl_register_test()
6987 usc_OutReg( info, TC1R, BitPatterns[(i+1)%Patterncount] ); in mgsl_register_test()
6988 usc_OutReg( info, TCLR, BitPatterns[(i+2)%Patterncount] ); in mgsl_register_test()
6989 usc_OutReg( info, RCLR, BitPatterns[(i+3)%Patterncount] ); in mgsl_register_test()
6990 usc_OutReg( info, RSR, BitPatterns[(i+4)%Patterncount] ); in mgsl_register_test()
6991 usc_OutDmaReg( info, TBCR, BitPatterns[(i+5)%Patterncount] ); in mgsl_register_test()
6993 if ( (usc_InReg( info, TC0R ) != BitPatterns[i]) || in mgsl_register_test()
6994 (usc_InReg( info, TC1R ) != BitPatterns[(i+1)%Patterncount]) || in mgsl_register_test()
6995 (usc_InReg( info, TCLR ) != BitPatterns[(i+2)%Patterncount]) || in mgsl_register_test()
6996 (usc_InReg( info, RCLR ) != BitPatterns[(i+3)%Patterncount]) || in mgsl_register_test()
6997 (usc_InReg( info, RSR ) != BitPatterns[(i+4)%Patterncount]) || in mgsl_register_test()
6998 (usc_InDmaReg( info, TBCR ) != BitPatterns[(i+5)%Patterncount]) ){ in mgsl_register_test()
7005 usc_reset(info); in mgsl_register_test()
7006 spin_unlock_irqrestore(&info->irq_spinlock,flags); in mgsl_register_test()
7017 static bool mgsl_irq_test( struct mgsl_struct *info ) in mgsl_irq_test() argument
7022 spin_lock_irqsave(&info->irq_spinlock,flags); in mgsl_irq_test()
7023 usc_reset(info); in mgsl_irq_test()
7030 info->irq_occurred = false; in mgsl_irq_test()
7036 usc_OutReg( info, PCR, (unsigned short)((usc_InReg(info, PCR) | BIT13) & ~BIT12) ); in mgsl_irq_test()
7038 usc_EnableMasterIrqBit(info); in mgsl_irq_test()
7039 usc_EnableInterrupts(info, IO_PIN); in mgsl_irq_test()
7040 usc_ClearIrqPendingBits(info, IO_PIN); in mgsl_irq_test()
7042 usc_UnlatchIostatusBits(info, MISCSTATUS_TXC_LATCHED); in mgsl_irq_test()
7043 usc_EnableStatusIrqs(info, SICR_TXC_ACTIVE + SICR_TXC_INACTIVE); in mgsl_irq_test()
7045 spin_unlock_irqrestore(&info->irq_spinlock,flags); in mgsl_irq_test()
7048 while( EndTime-- && !info->irq_occurred ) { in mgsl_irq_test()
7052 spin_lock_irqsave(&info->irq_spinlock,flags); in mgsl_irq_test()
7053 usc_reset(info); in mgsl_irq_test()
7054 spin_unlock_irqrestore(&info->irq_spinlock,flags); in mgsl_irq_test()
7056 return info->irq_occurred; in mgsl_irq_test()
7069 static bool mgsl_dma_test( struct mgsl_struct *info ) in mgsl_dma_test() argument
7083 memcpy(&tmp_params,&info->params,sizeof(MGSL_PARAMS)); in mgsl_dma_test()
7085 memcpy(&info->params,&default_params,sizeof(MGSL_PARAMS)); in mgsl_dma_test()
7089 spin_lock_irqsave(&info->irq_spinlock,flags); in mgsl_dma_test()
7093 usc_reset(info); in mgsl_dma_test()
7094 usc_set_sdlc_mode(info); in mgsl_dma_test()
7095 usc_enable_loopback(info,1); in mgsl_dma_test()
7117 usc_OutDmaReg( info, RDMR, 0xe200 ); in mgsl_dma_test()
7119 spin_unlock_irqrestore(&info->irq_spinlock,flags); in mgsl_dma_test()
7129 info->tx_buffer_list[0].count = FrameSize; in mgsl_dma_test()
7130 info->tx_buffer_list[0].rcc = FrameSize; in mgsl_dma_test()
7131 info->tx_buffer_list[0].status = 0x4000; in mgsl_dma_test()
7135 TmpPtr = info->tx_buffer_list[0].virt_addr; in mgsl_dma_test()
7142 info->rx_buffer_list[0].status = 0; in mgsl_dma_test()
7143 info->rx_buffer_list[0].count = FrameSize + 4; in mgsl_dma_test()
7147 memset( info->rx_buffer_list[0].virt_addr, 0, FrameSize + 4 ); in mgsl_dma_test()
7152 info->tx_buffer_list[1].count = 0; in mgsl_dma_test()
7153 info->rx_buffer_list[1].count = 0; in mgsl_dma_test()
7160 spin_lock_irqsave(&info->irq_spinlock,flags); in mgsl_dma_test()
7163 usc_RTCmd( info, RTCmd_PurgeRxFifo ); in mgsl_dma_test()
7166 phys_addr = info->rx_buffer_list[0].phys_entry; in mgsl_dma_test()
7167 usc_OutDmaReg( info, NRARL, (unsigned short)phys_addr ); in mgsl_dma_test()
7168 usc_OutDmaReg( info, NRARU, (unsigned short)(phys_addr >> 16) ); in mgsl_dma_test()
7171 usc_InDmaReg( info, RDMR ); in mgsl_dma_test()
7172 usc_DmaCmd( info, DmaCmd_InitRxChannel ); in mgsl_dma_test()
7175 usc_OutReg( info, RMR, (unsigned short)((usc_InReg(info, RMR) & 0xfffc) | 0x0002) ); in mgsl_dma_test()
7177 spin_unlock_irqrestore(&info->irq_spinlock,flags); in mgsl_dma_test()
7193 spin_lock_irqsave(&info->irq_spinlock,flags); in mgsl_dma_test()
7194 status = usc_InDmaReg( info, RDMR ); in mgsl_dma_test()
7195 spin_unlock_irqrestore(&info->irq_spinlock,flags); in mgsl_dma_test()
7210 spin_lock_irqsave(&info->irq_spinlock,flags); in mgsl_dma_test()
7215 usc_OutReg( info, TCLR, (unsigned short)info->tx_buffer_list[0].count ); in mgsl_dma_test()
7216 usc_RTCmd( info, RTCmd_PurgeTxFifo ); in mgsl_dma_test()
7220 phys_addr = info->tx_buffer_list[0].phys_entry; in mgsl_dma_test()
7221 usc_OutDmaReg( info, NTARL, (unsigned short)phys_addr ); in mgsl_dma_test()
7222 usc_OutDmaReg( info, NTARU, (unsigned short)(phys_addr >> 16) ); in mgsl_dma_test()
7226 usc_OutReg( info, TCSR, (unsigned short)(( usc_InReg(info, TCSR) & 0x0f00) | 0xfa) ); in mgsl_dma_test()
7227 usc_DmaCmd( info, DmaCmd_InitTxChannel ); in mgsl_dma_test()
7231 usc_TCmd( info, TCmd_SelectTicrTxFifostatus ); in mgsl_dma_test()
7233 spin_unlock_irqrestore(&info->irq_spinlock,flags); in mgsl_dma_test()
7249 spin_lock_irqsave(&info->irq_spinlock,flags); in mgsl_dma_test()
7250 FifoLevel = usc_InReg(info, TICR) >> 8; in mgsl_dma_test()
7251 spin_unlock_irqrestore(&info->irq_spinlock,flags); in mgsl_dma_test()
7269 spin_lock_irqsave(&info->irq_spinlock,flags); in mgsl_dma_test()
7272 usc_TCmd( info, TCmd_SendFrame ); in mgsl_dma_test()
7273 usc_OutReg( info, TMR, (unsigned short)((usc_InReg(info, TMR) & 0xfffc) | 0x0002) ); in mgsl_dma_test()
7275 spin_unlock_irqrestore(&info->irq_spinlock,flags); in mgsl_dma_test()
7287 spin_lock_irqsave(&info->irq_spinlock,flags); in mgsl_dma_test()
7288 status = usc_InReg( info, TCSR ); in mgsl_dma_test()
7289 spin_unlock_irqrestore(&info->irq_spinlock,flags); in mgsl_dma_test()
7297 spin_lock_irqsave(&info->irq_spinlock,flags); in mgsl_dma_test()
7298 status = usc_InReg( info, TCSR ); in mgsl_dma_test()
7299 spin_unlock_irqrestore(&info->irq_spinlock,flags); in mgsl_dma_test()
7317 status=info->rx_buffer_list[0].status; in mgsl_dma_test()
7323 status=info->rx_buffer_list[0].status; in mgsl_dma_test()
7330 status = info->rx_buffer_list[0].status; in mgsl_dma_test()
7336 if ( memcmp( info->tx_buffer_list[0].virt_addr , in mgsl_dma_test()
7337 info->rx_buffer_list[0].virt_addr, FrameSize ) ){ in mgsl_dma_test()
7343 spin_lock_irqsave(&info->irq_spinlock,flags); in mgsl_dma_test()
7344 usc_reset( info ); in mgsl_dma_test()
7345 spin_unlock_irqrestore(&info->irq_spinlock,flags); in mgsl_dma_test()
7348 memcpy(&info->params,&tmp_params,sizeof(MGSL_PARAMS)); in mgsl_dma_test()
7361 static int mgsl_adapter_test( struct mgsl_struct *info ) in mgsl_adapter_test() argument
7365 __FILE__,__LINE__,info->device_name ); in mgsl_adapter_test()
7367 if ( !mgsl_register_test( info ) ) { in mgsl_adapter_test()
7368 info->init_error = DiagStatus_AddressFailure; in mgsl_adapter_test()
7370 __FILE__,__LINE__,info->device_name, (unsigned short)(info->io_base) ); in mgsl_adapter_test()
7374 if ( !mgsl_irq_test( info ) ) { in mgsl_adapter_test()
7375 info->init_error = DiagStatus_IrqFailure; in mgsl_adapter_test()
7377 __FILE__,__LINE__,info->device_name, (unsigned short)(info->irq_level) ); in mgsl_adapter_test()
7381 if ( !mgsl_dma_test( info ) ) { in mgsl_adapter_test()
7382 info->init_error = DiagStatus_DmaFailure; in mgsl_adapter_test()
7384 __FILE__,__LINE__,info->device_name, (unsigned short)(info->dma_level) ); in mgsl_adapter_test()
7390 __FILE__,__LINE__,info->device_name ); in mgsl_adapter_test()
7403 static bool mgsl_memory_test( struct mgsl_struct *info ) in mgsl_memory_test() argument
7412 if ( info->bus_type != MGSL_BUS_TYPE_PCI ) in mgsl_memory_test()
7415 TestAddr = (unsigned long *)info->memory_base; in mgsl_memory_test()
7433 TestAddr = (unsigned long *)info->memory_base; in mgsl_memory_test()
7441 memset( info->memory_base, 0, SHARED_MEM_ADDRESS_SIZE ); in mgsl_memory_test()
7506 static void mgsl_trace_block(struct mgsl_struct *info,const char* data, int count, int xmit) in mgsl_trace_block() argument
7511 printk("%s tx data:\n",info->device_name); in mgsl_trace_block()
7513 printk("%s rx data:\n",info->device_name); in mgsl_trace_block()
7548 struct mgsl_struct *info = (struct mgsl_struct*)context; in mgsl_tx_timeout() local
7553 __FILE__,__LINE__,info->device_name); in mgsl_tx_timeout()
7554 if(info->tx_active && in mgsl_tx_timeout()
7555 (info->params.mode == MGSL_MODE_HDLC || in mgsl_tx_timeout()
7556 info->params.mode == MGSL_MODE_RAW) ) { in mgsl_tx_timeout()
7557 info->icount.txtimeout++; in mgsl_tx_timeout()
7559 spin_lock_irqsave(&info->irq_spinlock,flags); in mgsl_tx_timeout()
7560 info->tx_active = false; in mgsl_tx_timeout()
7561 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0; in mgsl_tx_timeout()
7563 if ( info->params.flags & HDLC_FLAG_HDLC_LOOPMODE ) in mgsl_tx_timeout()
7564 usc_loopmode_cancel_transmit( info ); in mgsl_tx_timeout()
7566 spin_unlock_irqrestore(&info->irq_spinlock,flags); in mgsl_tx_timeout()
7569 if (info->netcount) in mgsl_tx_timeout()
7570 hdlcdev_tx_done(info); in mgsl_tx_timeout()
7573 mgsl_bh_transmit(info); in mgsl_tx_timeout()
7581 static int mgsl_loopmode_send_done( struct mgsl_struct * info ) in mgsl_loopmode_send_done() argument
7585 spin_lock_irqsave(&info->irq_spinlock,flags); in mgsl_loopmode_send_done()
7586 if (info->params.flags & HDLC_FLAG_HDLC_LOOPMODE) { in mgsl_loopmode_send_done()
7587 if (info->tx_active) in mgsl_loopmode_send_done()
7588 info->loopmode_send_done_requested = true; in mgsl_loopmode_send_done()
7590 usc_loopmode_send_done(info); in mgsl_loopmode_send_done()
7592 spin_unlock_irqrestore(&info->irq_spinlock,flags); in mgsl_loopmode_send_done()
7600 static void usc_loopmode_send_done( struct mgsl_struct * info ) in usc_loopmode_send_done() argument
7602 info->loopmode_send_done_requested = false; in usc_loopmode_send_done()
7604 info->cmr_value &= ~BIT13; in usc_loopmode_send_done()
7605 usc_OutReg(info, CMR, info->cmr_value); in usc_loopmode_send_done()
7610 static void usc_loopmode_cancel_transmit( struct mgsl_struct * info ) in usc_loopmode_cancel_transmit() argument
7613 usc_RTCmd( info, RTCmd_PurgeTxFifo ); in usc_loopmode_cancel_transmit()
7614 usc_DmaCmd( info, DmaCmd_ResetTxChannel ); in usc_loopmode_cancel_transmit()
7615 usc_loopmode_send_done( info ); in usc_loopmode_cancel_transmit()
7622 static void usc_loopmode_insert_request( struct mgsl_struct * info ) in usc_loopmode_insert_request() argument
7624 info->loopmode_insert_requested = true; in usc_loopmode_insert_request()
7629 usc_OutReg( info, RICR, in usc_loopmode_insert_request()
7630 (usc_InReg( info, RICR ) | RXSTATUS_ABORT_RECEIVED ) ); in usc_loopmode_insert_request()
7633 info->cmr_value |= BIT13; in usc_loopmode_insert_request()
7634 usc_OutReg(info, CMR, info->cmr_value); in usc_loopmode_insert_request()
7639 static int usc_loopmode_active( struct mgsl_struct * info) in usc_loopmode_active() argument
7641 return usc_InReg( info, CCSR ) & BIT7 ? 1 : 0 ; in usc_loopmode_active()
7659 struct mgsl_struct *info = dev_to_port(dev); in hdlcdev_attach() local
7664 if (info->port.count) in hdlcdev_attach()
7685 info->params.encoding = new_encoding; in hdlcdev_attach()
7686 info->params.crc_type = new_crctype; in hdlcdev_attach()
7689 if (info->netcount) in hdlcdev_attach()
7690 mgsl_program_hw(info); in hdlcdev_attach()
7704 struct mgsl_struct *info = dev_to_port(dev); in hdlcdev_xmit() local
7714 info->xmit_cnt = skb->len; in hdlcdev_xmit()
7715 mgsl_load_tx_dma_buffer(info, skb->data, skb->len); in hdlcdev_xmit()
7728 spin_lock_irqsave(&info->irq_spinlock,flags); in hdlcdev_xmit()
7729 if (!info->tx_active) in hdlcdev_xmit()
7730 usc_start_transmitter(info); in hdlcdev_xmit()
7731 spin_unlock_irqrestore(&info->irq_spinlock,flags); in hdlcdev_xmit()
7746 struct mgsl_struct *info = dev_to_port(dev); in hdlcdev_open() local
7758 spin_lock_irqsave(&info->netlock, flags); in hdlcdev_open()
7759 if (info->port.count != 0 || info->netcount != 0) { in hdlcdev_open()
7761 spin_unlock_irqrestore(&info->netlock, flags); in hdlcdev_open()
7764 info->netcount=1; in hdlcdev_open()
7765 spin_unlock_irqrestore(&info->netlock, flags); in hdlcdev_open()
7768 if ((rc = startup(info)) != 0) { in hdlcdev_open()
7769 spin_lock_irqsave(&info->netlock, flags); in hdlcdev_open()
7770 info->netcount=0; in hdlcdev_open()
7771 spin_unlock_irqrestore(&info->netlock, flags); in hdlcdev_open()
7776 info->serial_signals |= SerialSignal_RTS | SerialSignal_DTR; in hdlcdev_open()
7777 mgsl_program_hw(info); in hdlcdev_open()
7784 spin_lock_irqsave(&info->irq_spinlock, flags); in hdlcdev_open()
7785 usc_get_serial_signals(info); in hdlcdev_open()
7786 spin_unlock_irqrestore(&info->irq_spinlock, flags); in hdlcdev_open()
7787 if (info->serial_signals & SerialSignal_DCD) in hdlcdev_open()
7804 struct mgsl_struct *info = dev_to_port(dev); in hdlcdev_close() local
7813 shutdown(info); in hdlcdev_close()
7817 spin_lock_irqsave(&info->netlock, flags); in hdlcdev_close()
7818 info->netcount=0; in hdlcdev_close()
7819 spin_unlock_irqrestore(&info->netlock, flags); in hdlcdev_close()
7838 struct mgsl_struct *info = dev_to_port(dev); in hdlcdev_ioctl() local
7845 if (info->port.count) in hdlcdev_ioctl()
7860 flags = info->params.flags & (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL | in hdlcdev_ioctl()
7874 new_line.clock_rate = info->params.clock_speed; in hdlcdev_ioctl()
7875 new_line.loopback = info->params.loopback ? 1:0; in hdlcdev_ioctl()
7894 case CLOCK_DEFAULT: flags = info->params.flags & in hdlcdev_ioctl()
7905 info->params.flags &= ~(HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL | in hdlcdev_ioctl()
7909 info->params.flags |= flags; in hdlcdev_ioctl()
7911 info->params.loopback = new_line.loopback; in hdlcdev_ioctl()
7914 info->params.clock_speed = new_line.clock_rate; in hdlcdev_ioctl()
7916 info->params.clock_speed = 0; in hdlcdev_ioctl()
7919 if (info->netcount) in hdlcdev_ioctl()
7920 mgsl_program_hw(info); in hdlcdev_ioctl()
7935 struct mgsl_struct *info = dev_to_port(dev); in hdlcdev_tx_timeout() local
7944 spin_lock_irqsave(&info->irq_spinlock,flags); in hdlcdev_tx_timeout()
7945 usc_stop_transmitter(info); in hdlcdev_tx_timeout()
7946 spin_unlock_irqrestore(&info->irq_spinlock,flags); in hdlcdev_tx_timeout()
7957 static void hdlcdev_tx_done(struct mgsl_struct *info) in hdlcdev_tx_done() argument
7959 if (netif_queue_stopped(info->netdev)) in hdlcdev_tx_done()
7960 netif_wake_queue(info->netdev); in hdlcdev_tx_done()
7971 static void hdlcdev_rx(struct mgsl_struct *info, char *buf, int size) in hdlcdev_rx() argument
7974 struct net_device *dev = info->netdev; in hdlcdev_rx()
8013 static int hdlcdev_init(struct mgsl_struct *info) in hdlcdev_init() argument
8021 if (!(dev = alloc_hdlcdev(info))) { in hdlcdev_init()
8027 dev->base_addr = info->io_base; in hdlcdev_init()
8028 dev->irq = info->irq_level; in hdlcdev_init()
8029 dev->dma = info->dma_level; in hdlcdev_init()
8048 info->netdev = dev; in hdlcdev_init()
8058 static void hdlcdev_exit(struct mgsl_struct *info) in hdlcdev_exit() argument
8060 unregister_hdlc_device(info->netdev); in hdlcdev_exit()
8061 free_netdev(info->netdev); in hdlcdev_exit()
8062 info->netdev = NULL; in hdlcdev_exit()
8071 struct mgsl_struct *info; in synclink_init_one() local
8078 if (!(info = mgsl_allocate_device())) { in synclink_init_one()
8085 info->io_base = pci_resource_start(dev, 2); in synclink_init_one()
8086 info->irq_level = dev->irq; in synclink_init_one()
8087 info->phys_memory_base = pci_resource_start(dev, 3); in synclink_init_one()
8093 info->phys_lcr_base = pci_resource_start(dev, 0); in synclink_init_one()
8094 info->lcr_offset = info->phys_lcr_base & (PAGE_SIZE-1); in synclink_init_one()
8095 info->phys_lcr_base &= ~(PAGE_SIZE-1); in synclink_init_one()
8097 info->bus_type = MGSL_BUS_TYPE_PCI; in synclink_init_one()
8098 info->io_addr_size = 8; in synclink_init_one()
8099 info->irq_flags = IRQF_SHARED; in synclink_init_one()
8103 info->misc_ctrl_value = 0x007c4080; in synclink_init_one()
8104 info->hw_version = 1; in synclink_init_one()
8111 info->misc_ctrl_value = 0x087e4546; in synclink_init_one()
8112 info->hw_version = 0; in synclink_init_one()
8115 mgsl_add_device(info); in synclink_init_one()