Lines Matching refs:BIT2
494 #define TRANSMIT_DATA BIT2
512 #define RXSTATUS_ABORT BIT2
513 #define RXSTATUS_PARITY_ERROR BIT2
551 #define TXSTATUS_ALL_SENT BIT2
571 #define MISCSTATUS_DPLL_NO_SYNC BIT2
597 #define SICR_DPLL_NO_SYNC BIT2
631 #define TXSTATUS_ALL_SENT BIT2
1653 if ( status & BIT2 ) { in mgsl_isr_transmit_dma()
5452 usc_OutDmaReg( info, RDIAR, BIT3 | BIT2 ); in usc_process_rxoverrun_sync()
5541 usc_OutDmaReg( info, RDIAR, BIT3 | BIT2 ); in usc_start_receiver()
5647 usc_OutDmaReg( info, TDIAR, BIT2|BIT3 ); in usc_start_transmitter()
5924 RegValue |= BIT4 | BIT3 | BIT2; in usc_set_async_mode()
5981 RegValue |= BIT4 | BIT3 | BIT2; in usc_set_async_mode()
7291 while ( !(status & (BIT6 | BIT5 | BIT4 | BIT2 | BIT1)) ) { in mgsl_dma_test()