300 			writel(s->port.x_char,  in mxs_auart_tx_chars()
307 			writel(xmit->buf[xmit->tail],  in mxs_auart_tx_chars()
317 		writel(AUART_INTR_TXIEN,  in mxs_auart_tx_chars()
320 		writel(AUART_INTR_TXIEN,  in mxs_auart_tx_chars()
369 	writel(stat, s->port.membase + AUART_STAT);  in mxs_auart_rx_char()
383 	writel(stat, s->port.membase + AUART_STAT);  in mxs_auart_rx_chars()
429 	writel(ctrl, u->membase + AUART_CTRL2);  in mxs_auart_set_mctrl()
544 	writel(stat, s->port.membase + AUART_STAT);  in dma_rx_callback()
607 	writel(AUART_CTRL2_TXDMAE | AUART_CTRL2_RXDMAE | AUART_CTRL2_DMAONERR,  in mxs_auart_dma_exit()
760 	writel(ctrl, u->membase + AUART_LINECTRL);  in mxs_auart_settermios()
761 	writel(ctrl2, u->membase + AUART_CTRL2);  in mxs_auart_settermios()
770 			writel(AUART_INTR_RXIEN | AUART_INTR_RTIEN,  in mxs_auart_settermios()
806 	writel(istat & (AUART_INTR_RTIS  in mxs_auart_irq_handle()
826 		writel(AUART_INTR_CTSMIS,  in mxs_auart_irq_handle()
850 	writel(AUART_CTRL0_SFTRST, u->membase + AUART_CTRL0_CLR);  in mxs_auart_reset()
858 	writel(AUART_CTRL0_CLKGATE, u->membase + AUART_CTRL0_CLR);  in mxs_auart_reset()
870 	writel(AUART_CTRL0_CLKGATE, u->membase + AUART_CTRL0_CLR);  in mxs_auart_startup()
872 	writel(AUART_CTRL2_UARTEN, u->membase + AUART_CTRL2_SET);  in mxs_auart_startup()
874 	writel(AUART_INTR_RXIEN | AUART_INTR_RTIEN | AUART_INTR_CTSMIEN,  in mxs_auart_startup()
884 	writel(AUART_LINECTRL_FEN, u->membase + AUART_LINECTRL_SET);  in mxs_auart_startup()
902 	writel(AUART_CTRL2_UARTEN, u->membase + AUART_CTRL2_CLR);  in mxs_auart_shutdown()
904 	writel(AUART_INTR_RXIEN | AUART_INTR_RTIEN | AUART_INTR_CTSMIEN,  in mxs_auart_shutdown()
907 	writel(AUART_CTRL0_CLKGATE, u->membase + AUART_CTRL0_SET);  in mxs_auart_shutdown()
926 	writel(AUART_CTRL2_TXE, u->membase + AUART_CTRL2_SET);  in mxs_auart_start_tx()
933 	writel(AUART_CTRL2_TXE, u->membase + AUART_CTRL2_CLR);  in mxs_auart_stop_tx()
938 	writel(AUART_CTRL2_RXE, u->membase + AUART_CTRL2_CLR);  in mxs_auart_stop_rx()
944 		writel(AUART_LINECTRL_BRK,  in mxs_auart_break_ctl()
947 		writel(AUART_LINECTRL_BRK,  in mxs_auart_break_ctl()
984 	writel(ch, port->membase + AUART_DATA);  in mxs_auart_console_putchar()
1007 	writel(AUART_CTRL0_CLKGATE,  in auart_console_write()
1009 	writel(AUART_CTRL2_UARTEN | AUART_CTRL2_TXE,  in auart_console_write()
1028 		writel(old_ctrl0, port->membase + AUART_CTRL0);  in auart_console_write()
1029 		writel(old_ctrl2, port->membase + AUART_CTRL2);  in auart_console_write()